GB1248716A - Associative storage systems - Google Patents
Associative storage systemsInfo
- Publication number
- GB1248716A GB1248716A GB2911370A GB2911370A GB1248716A GB 1248716 A GB1248716 A GB 1248716A GB 2911370 A GB2911370 A GB 2911370A GB 2911370 A GB2911370 A GB 2911370A GB 1248716 A GB1248716 A GB 1248716A
- Authority
- GB
- United Kingdom
- Prior art keywords
- arrays
- array
- matrix
- control
- column
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
Landscapes
- Static Random-Access Memory (AREA)
- Multi Processors (AREA)
Abstract
1,248,716. Associative stores. INTERNATIONAL BUSINESS MACHINES CORP. 16 June, 1970, No. 29113/70. Heading G4C. An associative data storage system comprises two storage arrays interconnected such that one or more selected words from either one of the arrays can be applied to the other array as a search argument for accessing the other array. In a first embodiment with only two arrays as above, each storage cell is a 4-state cell (0, 1, " match anything ", " mismatch anything ") as in Specification 1,127,270 (referred to). Corresponding bit line pairs of the two arrays are connected through logic driver circuits which permit either array to be written into or interrogated using data read from the other array or inserted from outside, or either array to be read out to the other array or to outside. A second embodiment differs in having a matrix of arrays, corresponding bit line pairs being connected going down each column of this matrix and corresponding word/mismatch lines being connected going along each row. Logic circuits interconnecting adjacent arrays in the matrix are controlled by two pairs of control lines per row of arrays in the matrix. A ring counter reads out columns of auxiliary 4-state cells a column at a time, to at least partially control a column of latch circuits, some of which control a pair of the control lines (see above) each, and the rest of which each control and are partially controlled by a respective word/mismatch line from the matrix of arrays and control for read out a respective row of further auxiliary cells. Correspondingly positioned cells in these latter rows are connected by their bit lines in columns, each column causing the ring counter to skip a respective position or not according to the value read out.
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2911370A GB1248716A (en) | 1970-06-16 | 1970-06-16 | Associative storage systems |
FR7115071A FR2095279B1 (en) | 1970-06-16 | 1971-04-20 | |
JP3641871A JPS53254B1 (en) | 1970-06-16 | 1971-05-28 | |
DE19712126992 DE2126992A1 (en) | 1970-06-16 | 1971-06-01 | Associative storage system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB2911370A GB1248716A (en) | 1970-06-16 | 1970-06-16 | Associative storage systems |
Publications (1)
Publication Number | Publication Date |
---|---|
GB1248716A true GB1248716A (en) | 1971-10-06 |
Family
ID=10286369
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
GB2911370A Expired GB1248716A (en) | 1970-06-16 | 1970-06-16 | Associative storage systems |
Country Status (4)
Country | Link |
---|---|
JP (1) | JPS53254B1 (en) |
DE (1) | DE2126992A1 (en) |
FR (1) | FR2095279B1 (en) |
GB (1) | GB1248716A (en) |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS62230169A (en) * | 1986-03-31 | 1987-10-08 | Toshiba Corp | Wipe waveform selecting device |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3239818A (en) * | 1961-12-28 | 1966-03-08 | Ibm | Memory system |
US3349375A (en) * | 1963-11-07 | 1967-10-24 | Ibm | Associative logic for highly parallel computer and data processing systems |
US3320594A (en) * | 1964-03-10 | 1967-05-16 | Trw Inc | Associative computer |
GB1127270A (en) * | 1967-09-05 | 1968-09-18 | Ibm | Data storage cell |
GB1218406A (en) * | 1968-07-04 | 1971-01-06 | Ibm | An electronic data processing system |
GB1233484A (en) * | 1969-07-26 | 1971-05-26 |
-
1970
- 1970-06-16 GB GB2911370A patent/GB1248716A/en not_active Expired
-
1971
- 1971-04-20 FR FR7115071A patent/FR2095279B1/fr not_active Expired
- 1971-05-28 JP JP3641871A patent/JPS53254B1/ja active Pending
- 1971-06-01 DE DE19712126992 patent/DE2126992A1/en active Pending
Also Published As
Publication number | Publication date |
---|---|
DE2126992A1 (en) | 1971-12-23 |
FR2095279B1 (en) | 1977-06-24 |
FR2095279A1 (en) | 1972-02-11 |
JPS53254B1 (en) | 1978-01-06 |
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