FR2933236B1 - SUBSTRATE COMPRISING DIFFERENT TYPES OF SURFACE, AND METHOD OF MANUFACTURING THE SAME - Google Patents
SUBSTRATE COMPRISING DIFFERENT TYPES OF SURFACE, AND METHOD OF MANUFACTURING THE SAMEInfo
- Publication number
- FR2933236B1 FR2933236B1 FR0803700A FR0803700A FR2933236B1 FR 2933236 B1 FR2933236 B1 FR 2933236B1 FR 0803700 A FR0803700 A FR 0803700A FR 0803700 A FR0803700 A FR 0803700A FR 2933236 B1 FR2933236 B1 FR 2933236B1
- Authority
- FR
- France
- Prior art keywords
- substrate
- manufacturing
- same
- different types
- types
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
- H10D84/0167—Manufacturing their channels
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
- H01L21/76256—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
- H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
- H10D84/01—Manufacture or treatment
- H10D84/02—Manufacture or treatment characterised by using material-based technologies
- H10D84/08—Manufacture or treatment characterised by using material-based technologies using combinations of technologies, e.g. using both Si and SiC technologies or using both Si and Group III-V technologies
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
- H01L21/0274—Photolithographic processes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
- H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
- H10D62/124—Shapes, relative sizes or dispositions of the regions of semiconductor bodies or of junctions between the regions
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Recrystallisation Techniques (AREA)
- Thin Film Transistor (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0803700A FR2933236B1 (en) | 2008-06-30 | 2008-06-30 | SUBSTRATE COMPRISING DIFFERENT TYPES OF SURFACE, AND METHOD OF MANUFACTURING THE SAME |
KR1020107027233A KR101132318B1 (en) | 2008-06-30 | 2009-05-18 | Substrate comprising different types of surfaces and method for obtaining such substrates |
EP09773960A EP2304793A1 (en) | 2008-06-30 | 2009-05-18 | Substrate comprising different types of surfaces and method for obtaining such substrates |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0803700A FR2933236B1 (en) | 2008-06-30 | 2008-06-30 | SUBSTRATE COMPRISING DIFFERENT TYPES OF SURFACE, AND METHOD OF MANUFACTURING THE SAME |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2933236A1 FR2933236A1 (en) | 2010-01-01 |
FR2933236B1 true FR2933236B1 (en) | 2010-11-26 |
Family
ID=40551372
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0803700A Expired - Fee Related FR2933236B1 (en) | 2008-06-30 | 2008-06-30 | SUBSTRATE COMPRISING DIFFERENT TYPES OF SURFACE, AND METHOD OF MANUFACTURING THE SAME |
Country Status (3)
Country | Link |
---|---|
EP (1) | EP2304793A1 (en) |
KR (1) | KR101132318B1 (en) |
FR (1) | FR2933236B1 (en) |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5399507A (en) * | 1994-06-27 | 1995-03-21 | Motorola, Inc. | Fabrication of mixed thin-film and bulk semiconductor substrate for integrated circuit applications |
JP2647022B2 (en) * | 1994-10-24 | 1997-08-27 | 日本電気株式会社 | Pattern formation method |
US6912330B2 (en) * | 2001-05-17 | 2005-06-28 | Sioptical Inc. | Integrated optical/electronic circuits and associated methods of simultaneous generation thereof |
JP4322453B2 (en) * | 2001-09-27 | 2009-09-02 | 株式会社東芝 | Semiconductor device and manufacturing method thereof |
US7329923B2 (en) * | 2003-06-17 | 2008-02-12 | International Business Machines Corporation | High-performance CMOS devices on hybrid crystal oriented substrates |
US7034362B2 (en) * | 2003-10-17 | 2006-04-25 | International Business Machines Corporation | Double silicon-on-insulator (SOI) metal oxide semiconductor field effect transistor (MOSFET) structures |
US20080124847A1 (en) * | 2006-08-04 | 2008-05-29 | Toshiba America Electronic Components, Inc. | Reducing Crystal Defects from Hybrid Orientation Technology During Semiconductor Manufacture |
US7755140B2 (en) * | 2006-11-03 | 2010-07-13 | Intel Corporation | Process charging and electrostatic damage protection in silicon-on-insulator technology |
-
2008
- 2008-06-30 FR FR0803700A patent/FR2933236B1/en not_active Expired - Fee Related
-
2009
- 2009-05-18 KR KR1020107027233A patent/KR101132318B1/en not_active IP Right Cessation
- 2009-05-18 EP EP09773960A patent/EP2304793A1/en not_active Withdrawn
Also Published As
Publication number | Publication date |
---|---|
KR101132318B1 (en) | 2012-04-05 |
EP2304793A1 (en) | 2011-04-06 |
FR2933236A1 (en) | 2010-01-01 |
KR20110015425A (en) | 2011-02-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
EP1981085A4 (en) | TFT SUBSTRATE, REFLECTIVE TFT SUBSTRATE, AND METHOD OF MANUFACTURING THE SAME | |
EP1978548A4 (en) | METHOD FOR MANUFACTURING SILICEOUS FILM AND SUBSTRATE WITH SILICEOUS FILM THUS OBTAINED | |
FR2933233B1 (en) | GOOD RESISTANCE HIGH RESISTIVITY SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | |
EP1983499A4 (en) | REFLECTIVE TFT SUBSTRATE AND METHOD FOR MANUFACTURING REFLECTIVE TFT SUBSTRATE | |
EP2424337A4 (en) | SUBSTRATE FOR PRINTED CARD, PRINTED CARD, AND METHODS OF MANUFACTURING THE SAME | |
TWI365812B (en) | Transfer film, method of manufacturing the same, transfer method and object surface structure | |
FI20085113A0 (en) | Process for manufacturing graphene structures on substrates | |
FR2908406B1 (en) | POROUS LAYER, METHOD FOR MANUFACTURING THE SAME, AND APPLICATIONS THEREOF | |
EP1970354A4 (en) | NON-ALKALINE GLASS SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | |
EP2381018A4 (en) | COMPOSITE SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR DEVICE | |
DE602006006135D1 (en) | Silicon-containing antireflective coating composition, silicon-containing antireflective coating, substrate processing intermediate layer and substrate processing method | |
FR2943074B1 (en) | LASER MARKABLE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | |
FR2898431B1 (en) | METHOD FOR MANUFACTURING THIN FILM | |
EP2326155A4 (en) | Substrate module and method for manufacturing the same | |
EP1983553A4 (en) | METHOD FOR MANUFACTURING SOIL SUBSTRATE | |
EP2306197A4 (en) | BIOPUCE SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | |
EP2381752A4 (en) | MULTILAYER WIRING SUBSTRATE, AND METHOD FOR MANUFACTURING MULTILAYER WIRING SUBSTRATE | |
EP2261954A4 (en) | METHOD FOR MANUFACTURING SILICON SUBSTRATE ON INSULATION | |
FR2912552B1 (en) | MULTILAYER STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | |
EP2521180A4 (en) | ACTIVE MATRIX SUBSTRATE AND METHOD FOR MANUFACTURING THE SAME | |
EP2360701A4 (en) | SUPERCONDUCTING FILM FORMING SUBSTRATE, SUPERCONDUCTING MATERIAL, AND METHOD FOR MANUFACTURING THE SAME | |
TWI372586B (en) | Capacitor-embedded substrate and method of manufacturing the same | |
EP2077587A4 (en) | SOLAR CELL COMPONENT AND METHOD FOR MANUFACTURING THE SAME | |
EP2122672A4 (en) | LAMINATE STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | |
EP2441097A4 (en) | SEMICONDUCTOR SUBSTRATE, SEMICONDUCTOR DEVICE, AND METHODS OF MAKING THE SAME |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
ST | Notification of lapse |
Effective date: 20150227 |