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FR2914781B1 - Procede de realisation de depots localises - Google Patents

Procede de realisation de depots localises

Info

Publication number
FR2914781B1
FR2914781B1 FR0754249A FR0754249A FR2914781B1 FR 2914781 B1 FR2914781 B1 FR 2914781B1 FR 0754249 A FR0754249 A FR 0754249A FR 0754249 A FR0754249 A FR 0754249A FR 2914781 B1 FR2914781 B1 FR 2914781B1
Authority
FR
France
Prior art keywords
mask
cavity
substrate
outline
localized deposits
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
FR0754249A
Other languages
English (en)
Other versions
FR2914781A1 (fr
Inventor
Bruno Remiat
Laurent Vandroux
Florent Souche
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Commissariat a lEnergie Atomique et aux Energies Alternatives CEA
Original Assignee
Commissariat a lEnergie Atomique CEA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR0754249A priority Critical patent/FR2914781B1/fr
Application filed by Commissariat a lEnergie Atomique CEA filed Critical Commissariat a lEnergie Atomique CEA
Priority to PL08735767T priority patent/PL2132770T3/pl
Priority to JP2010501512A priority patent/JP5283687B2/ja
Priority to EP08735767A priority patent/EP2132770B1/fr
Priority to US12/593,272 priority patent/US8815108B2/en
Priority to ES08735767T priority patent/ES2374565T3/es
Priority to PCT/EP2008/054022 priority patent/WO2008125511A1/fr
Priority to AT08735767T priority patent/ATE528788T1/de
Publication of FR2914781A1 publication Critical patent/FR2914781A1/fr
Application granted granted Critical
Publication of FR2914781B1 publication Critical patent/FR2914781B1/fr
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
    • H01L21/0331—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers for lift-off processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Chemical & Material Sciences (AREA)
  • Drying Of Semiconductors (AREA)
  • Chemical Vapour Deposition (AREA)
  • Photovoltaic Devices (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Weting (AREA)
  • Ultra Sonic Daignosis Equipment (AREA)
  • Paper (AREA)
  • Magnetic Resonance Imaging Apparatus (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Application Of Or Painting With Fluid Materials (AREA)
FR0754249A 2007-04-03 2007-04-03 Procede de realisation de depots localises Expired - Fee Related FR2914781B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR0754249A FR2914781B1 (fr) 2007-04-03 2007-04-03 Procede de realisation de depots localises
JP2010501512A JP5283687B2 (ja) 2007-04-03 2008-04-03 局所皮膜の堆積方法
EP08735767A EP2132770B1 (fr) 2007-04-03 2008-04-03 Procede de realisation de depots localises
US12/593,272 US8815108B2 (en) 2007-04-03 2008-04-03 Method of depositing localized coatings
PL08735767T PL2132770T3 (pl) 2007-04-03 2008-04-03 Sposób realizowania zlokalizowanych powłok
ES08735767T ES2374565T3 (es) 2007-04-03 2008-04-03 Procedimiento de realización de depósitos localizados.
PCT/EP2008/054022 WO2008125511A1 (fr) 2007-04-03 2008-04-03 Procede de realisation de depots localises
AT08735767T ATE528788T1 (de) 2007-04-03 2008-04-03 Verfahren zum auftragen lokalisierter beschichtungen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0754249A FR2914781B1 (fr) 2007-04-03 2007-04-03 Procede de realisation de depots localises

Publications (2)

Publication Number Publication Date
FR2914781A1 FR2914781A1 (fr) 2008-10-10
FR2914781B1 true FR2914781B1 (fr) 2009-11-20

Family

ID=38666962

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0754249A Expired - Fee Related FR2914781B1 (fr) 2007-04-03 2007-04-03 Procede de realisation de depots localises

Country Status (8)

Country Link
US (1) US8815108B2 (fr)
EP (1) EP2132770B1 (fr)
JP (1) JP5283687B2 (fr)
AT (1) ATE528788T1 (fr)
ES (1) ES2374565T3 (fr)
FR (1) FR2914781B1 (fr)
PL (1) PL2132770T3 (fr)
WO (1) WO2008125511A1 (fr)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5340103B2 (ja) * 2009-09-30 2013-11-13 東京エレクトロン株式会社 太陽電池
US9121237B2 (en) 2011-07-28 2015-09-01 Baker Hughes Incorporated Methods of coating wellbore tools and components having such coatings
JP6179900B2 (ja) * 2012-03-30 2017-08-16 パナソニックＩｐマネジメント株式会社 太陽電池及びその製造方法
US8728951B2 (en) 2012-07-31 2014-05-20 Varian Semiconductor Equipment Associates, Inc. Method and system for ion-assisted processing
TWI501292B (zh) * 2012-09-26 2015-09-21 Ind Tech Res Inst 形成圖案化摻雜區的方法
JP5867467B2 (ja) * 2013-09-03 2016-02-24 トヨタ自動車株式会社 半導体装置の製造方法
WO2019138613A1 (fr) * 2018-01-09 2019-07-18 株式会社カネカ Procédé de fabrication d'une cellule solaire
JPWO2019163646A1 (ja) * 2018-02-23 2021-02-04 株式会社カネカ 太陽電池の製造方法
WO2020022044A1 (fr) * 2018-07-25 2020-01-30 株式会社カネカ Procédé de fabrication de cellule solaire
CN113766412B (zh) * 2021-11-05 2022-02-15 绍兴中芯集成电路制造股份有限公司 具有弧形底角的凹槽的制备方法、mems麦克风的制备方法

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8004573A (nl) 1979-09-19 1981-03-23 Gen Electric Werkwijze voor het vervaardigen van samengestelde voorwerpen.
JPS6167918A (ja) 1984-09-11 1986-04-08 Ricoh Co Ltd リフトオフ方法
US4614564A (en) * 1984-12-04 1986-09-30 The United States Of America As Represented By The United States Department Of Energy Process for selectively patterning epitaxial film growth on a semiconductor substrate
US4597160A (en) * 1985-08-09 1986-07-01 Rca Corporation Method of fabricating a polysilicon transistor with a high carrier mobility
US5554488A (en) * 1994-07-28 1996-09-10 Northern Telecom Limited Semiconductor device structure and method of formation thereof
US5550405A (en) 1994-12-21 1996-08-27 Advanced Micro Devices, Incorporated Processing techniques for achieving production-worthy, low dielectric, low interconnect resistance and high performance ICS
JP4056588B2 (ja) * 1996-11-06 2008-03-05 富士通株式会社 半導体装置及びその製造方法
JP2000077336A (ja) * 1998-08-28 2000-03-14 Sony Corp 半導体成長用基板およびその製造方法ならびに半導体装置
JP2002025935A (ja) 2000-07-11 2002-01-25 Advantest Corp 導体部材形成方法、パターン形成方法

Also Published As

Publication number Publication date
EP2132770A1 (fr) 2009-12-16
PL2132770T3 (pl) 2012-03-30
ATE528788T1 (de) 2011-10-15
US8815108B2 (en) 2014-08-26
EP2132770B1 (fr) 2011-10-12
ES2374565T3 (es) 2012-02-17
JP5283687B2 (ja) 2013-09-04
JP2010532817A (ja) 2010-10-14
US20100258524A1 (en) 2010-10-14
WO2008125511A1 (fr) 2008-10-23
FR2914781A1 (fr) 2008-10-10

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Legal Events

Date Code Title Description
ST Notification of lapse

Effective date: 20121228