[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

FR2868599B1 - Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur - Google Patents

Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur

Info

Publication number
FR2868599B1
FR2868599B1 FR0403273A FR0403273A FR2868599B1 FR 2868599 B1 FR2868599 B1 FR 2868599B1 FR 0403273 A FR0403273 A FR 0403273A FR 0403273 A FR0403273 A FR 0403273A FR 2868599 B1 FR2868599 B1 FR 2868599B1
Authority
FR
France
Prior art keywords
platelets
optimized
cleaning
semiconductor material
chemical treatment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
FR0403273A
Other languages
English (en)
Other versions
FR2868599A1 (fr
Inventor
Christophe Malleville
Tussot Corinne Maunand
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR0403273A priority Critical patent/FR2868599B1/fr
Priority to US10/875,233 priority patent/US20050218111A1/en
Priority to CNA2005800151000A priority patent/CN1954422A/zh
Priority to EP05718502A priority patent/EP1730772A1/fr
Priority to PCT/IB2005/001064 priority patent/WO2005096369A1/fr
Priority to JP2007505672A priority patent/JP4653862B2/ja
Priority to KR1020067020617A priority patent/KR100881682B1/ko
Publication of FR2868599A1 publication Critical patent/FR2868599A1/fr
Priority to US11/472,665 priority patent/US7645392B2/en
Application granted granted Critical
Publication of FR2868599B1 publication Critical patent/FR2868599B1/fr
Priority to JP2010180678A priority patent/JP2010268001A/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
  • Weting (AREA)
  • Drying Of Semiconductors (AREA)
FR0403273A 2004-03-30 2004-03-30 Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur Expired - Lifetime FR2868599B1 (fr)

Priority Applications (9)

Application Number Priority Date Filing Date Title
FR0403273A FR2868599B1 (fr) 2004-03-30 2004-03-30 Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur
US10/875,233 US20050218111A1 (en) 2004-03-30 2004-06-25 Methods for preparing a bonding surface of a semiconductor wafer
EP05718502A EP1730772A1 (fr) 2004-03-30 2005-03-30 Preparation d'une surface de tranche semi-conductrice afin de la lier a une autre tranche
PCT/IB2005/001064 WO2005096369A1 (fr) 2004-03-30 2005-03-30 Preparation d'une surface de tranche semi-conductrice afin de la lier a une autre tranche
CNA2005800151000A CN1954422A (zh) 2004-03-30 2005-03-30 用于与另一晶片接合的半导体晶片表面的制备
JP2007505672A JP4653862B2 (ja) 2004-03-30 2005-03-30 別のウェハと接合するための半導体ウェハ表面の調製
KR1020067020617A KR100881682B1 (ko) 2004-03-30 2005-03-30 다른 웨이퍼와의 접합을 위한 반도체 웨이퍼 표면 제조
US11/472,665 US7645392B2 (en) 2004-03-30 2006-06-21 Methods for preparing a bonding surface of a semiconductor wafer
JP2010180678A JP2010268001A (ja) 2004-03-30 2010-08-12 別のウェハと接合するための半導体ウェハ表面の調製

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0403273A FR2868599B1 (fr) 2004-03-30 2004-03-30 Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur

Publications (2)

Publication Number Publication Date
FR2868599A1 FR2868599A1 (fr) 2005-10-07
FR2868599B1 true FR2868599B1 (fr) 2006-07-07

Family

ID=34944614

Family Applications (1)

Application Number Title Priority Date Filing Date
FR0403273A Expired - Lifetime FR2868599B1 (fr) 2004-03-30 2004-03-30 Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur

Country Status (7)

Country Link
US (2) US20050218111A1 (fr)
EP (1) EP1730772A1 (fr)
JP (2) JP4653862B2 (fr)
KR (1) KR100881682B1 (fr)
CN (1) CN1954422A (fr)
FR (1) FR2868599B1 (fr)
WO (1) WO2005096369A1 (fr)

Families Citing this family (27)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6984571B1 (en) * 1999-10-01 2006-01-10 Ziptronix, Inc. Three dimensional device integration method and integrated device
FR2868599B1 (fr) * 2004-03-30 2006-07-07 Soitec Silicon On Insulator Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur
FR2884647B1 (fr) * 2005-04-15 2008-02-22 Soitec Silicon On Insulator Traitement de plaques de semi-conducteurs
FR2894067B1 (fr) * 2005-11-28 2008-02-15 Soitec Silicon On Insulator Procede de collage par adhesion moleculaire
US7601271B2 (en) 2005-11-28 2009-10-13 S.O.I.Tec Silicon On Insulator Technologies Process and equipment for bonding by molecular adhesion
JP5042506B2 (ja) 2006-02-16 2012-10-03 信越化学工業株式会社 半導体基板の製造方法
FR2914110B1 (fr) 2007-03-20 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat hybride
US20080268617A1 (en) * 2006-08-09 2008-10-30 Applied Materials, Inc. Methods for substrate surface cleaning suitable for fabricating silicon-on-insulator structures
FR2912839B1 (fr) * 2007-02-16 2009-05-15 Soitec Silicon On Insulator Amelioration de la qualite de l'interface de collage par nettoyage froid et collage a chaud
FR2915624A1 (fr) * 2007-04-26 2008-10-31 Soitec Silicon On Insulator Procedes de collage et de fabrication d'un substrat du type a couche enterree tres fine.
KR100936778B1 (ko) * 2007-06-01 2010-01-14 주식회사 엘트린 웨이퍼 본딩방법
US8119490B2 (en) * 2008-02-04 2012-02-21 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
JP4577382B2 (ja) * 2008-03-06 2010-11-10 信越半導体株式会社 貼り合わせウェーハの製造方法
JP5700617B2 (ja) * 2008-07-08 2015-04-15 株式会社半導体エネルギー研究所 Ｓｏｉ基板の作製方法
US7927975B2 (en) 2009-02-04 2011-04-19 Micron Technology, Inc. Semiconductor material manufacture
FR2950733B1 (fr) * 2009-09-25 2012-10-26 Commissariat Energie Atomique Procede de planarisation par ultrasons d'un substrat dont une surface a ete liberee par fracture d'une couche enterree fragilisee
JP5618656B2 (ja) * 2010-07-09 2014-11-05 株式会社半導体エネルギー研究所 半導体基板の作製方法
CN108470679B (zh) * 2011-01-25 2022-03-29 Ev 集团 E·索尔纳有限责任公司 用于永久接合晶片的方法
FR2981941B1 (fr) * 2011-10-26 2014-06-06 Commissariat Energie Atomique Procede de traitement et de collage direct d'une couche de materiau
US8735219B2 (en) 2012-08-30 2014-05-27 Ziptronix, Inc. Heterogeneous annealing method and device
JP6086105B2 (ja) * 2014-09-24 2017-03-01 信越半導体株式会社 Ｓｏｉウェーハの製造方法
WO2020010056A1 (fr) * 2018-07-03 2020-01-09 Invensas Bonding Technologies, Inc. Techniques d'assemblage de matériaux dissemblables en microélectronique
CN110398500A (zh) * 2019-08-06 2019-11-01 武汉鼎泽新材料技术有限公司 评价晶片清洗效率的方法及实验装置
KR20230003471A (ko) 2020-03-19 2023-01-06 아데이아 세미컨덕터 본딩 테크놀로지스 인코포레이티드 직접 결합된 구조체들을 위한 치수 보상 제어
FR3136108B1 (fr) * 2022-05-25 2024-04-19 Commissariat Energie Atomique Procédé de collage direct assisté par des élements cationiques
FR3136107B1 (fr) * 2022-05-25 2024-05-31 Commissariat Energie Atomique Procédé de collage direct assisté par une base forte
FR3136106B1 (fr) * 2022-05-25 2024-05-31 Commissariat Energie Atomique Procédé de collage direct assisté par une molécule basique

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3187109B2 (ja) * 1992-01-31 2001-07-11 キヤノン株式会社 半導体部材およびその製造方法
US5498293A (en) * 1994-06-23 1996-03-12 Mallinckrodt Baker, Inc. Cleaning wafer substrates of metal contamination while maintaining wafer smoothness
US5516730A (en) * 1994-08-26 1996-05-14 Memc Electronic Materials, Inc. Pre-thermal treatment cleaning process of wafers
US20020157686A1 (en) * 1997-05-09 2002-10-31 Semitool, Inc. Process and apparatus for treating a workpiece such as a semiconductor wafer
US6155909A (en) * 1997-05-12 2000-12-05 Silicon Genesis Corporation Controlled cleavage system using pressurized fluid
JP3697106B2 (ja) * 1998-05-15 2005-09-21 キヤノン株式会社 半導体基板の作製方法及び半導体薄膜の作製方法
JP3385972B2 (ja) * 1998-07-10 2003-03-10 信越半導体株式会社 貼り合わせウェーハの製造方法および貼り合わせウェーハ
FR2794891A1 (fr) 1999-06-14 2000-12-15 Lionel Girardie Preparation de substrats aux techniques de collage direct
US6526995B1 (en) 1999-06-29 2003-03-04 Intersil Americas Inc. Brushless multipass silicon wafer cleaning process for post chemical mechanical polishing using immersion
US6900113B2 (en) * 2000-05-30 2005-05-31 Shin-Etsu Handotai Co., Ltd. Method for producing bonded wafer and bonded wafer
US6995430B2 (en) * 2002-06-07 2006-02-07 Amberwave Systems Corporation Strained-semiconductor-on-insulator device structures
US7074623B2 (en) * 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US7335545B2 (en) * 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
FR2892228B1 (fr) * 2005-10-18 2008-01-25 Soitec Silicon On Insulator Procede de recyclage d'une plaquette donneuse epitaxiee
FR2868599B1 (fr) * 2004-03-30 2006-07-07 Soitec Silicon On Insulator Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur
US7919391B2 (en) * 2004-12-24 2011-04-05 S.O.I.Tec Silicon On Insulator Technologies Methods for preparing a bonding surface of a semiconductor wafer
US7575988B2 (en) * 2006-07-11 2009-08-18 S.O.I.Tec Silicon On Insulator Technologies Method of fabricating a hybrid substrate

Also Published As

Publication number Publication date
US7645392B2 (en) 2010-01-12
FR2868599A1 (fr) 2005-10-07
JP2010268001A (ja) 2010-11-25
KR100881682B1 (ko) 2009-02-06
KR20070005660A (ko) 2007-01-10
WO2005096369A1 (fr) 2005-10-13
US20060273068A1 (en) 2006-12-07
CN1954422A (zh) 2007-04-25
JP4653862B2 (ja) 2011-03-16
EP1730772A1 (fr) 2006-12-13
US20050218111A1 (en) 2005-10-06
JP2007533123A (ja) 2007-11-15

Similar Documents

Publication Publication Date Title
FR2868599B1 (fr) Traitement chimique optimise de type sc1 pour le nettoyage de plaquettes en materiau semiconducteur
DE602005007717D1 (de) Imidazolverbindungen zur behandlung von neurodegenerativen erkrankungen
ATE429218T1 (de) Pinolensäure zur behandlung von übergewicht
DE602006019560D1 (de) 2-cyanobenzolsulfonamidverbindungen zur behandlung von samen
ATE434620T1 (de) Dihydrothienopyrimidine zur behandlung von entzündlichen erkrankungen
FI20041152A (fi) Kemiallisen massan ksylanaasikäsittely
FR22C1033I1 (fr) Utilisation de dihydroimidazolones pour le traitement des chiens
FR2892230B1 (fr) Traitement d'une couche de germamium
ITMI20001481A0 (it) Apparato ad acqua per il trattamento di prodotti industriali di scarto.
ATE437861T1 (de) 2-(amino-substituierte)-4-arylpyramidine und verwandte verbindungen, die sich für die behandlung von entzündlichen krankheiten eignen
FR2885910B1 (fr) Composition aqueuse de nettoyage pour le traitement du cuivre de semi-conducteurs
FI20060226A (fi) Menetelmä kemiallisen massan käsittelemiseksi
FR2897533B1 (fr) Agent oxydant pour le traitement des cheveux
ITMO20050195A1 (it) Macchina per il trattamento extracorporeo di sangue
FI20050160A0 (fi) Menetelmä kuparipitoisten materiaalien käsittelemiseksi
FR2884647B1 (fr) Traitement de plaques de semi-conducteurs
ATE526970T1 (de) Behandlung von mastitis
FR2855050B1 (fr) Procede de traitement cosmetique des rougeurs
ATE478668T1 (de) Pyrroloä1,2-aüimidazoldion zur behandlung von peripherer neurotoxizität durch chemotherapeutische mittel
FR2868312B1 (fr) Patch pour le traitement des levres
FR2913419B1 (fr) Procede biologique pour le traitement des eaux usees.
DE60322983D1 (de) Pflanzliche zusammensetzung zur behandlung von gastrointestinalen erkrankungen
ITBO20030539A1 (it) Dispositivo per il trattamento di prodotti di forma
ATE339200T1 (de) Behandlung von hyperurikämie
TWI316266B (en) Method of processing semiconductor wafer

Legal Events

Date Code Title Description
CD Change of name or company name

Owner name: SOITEC, FR

Effective date: 20120423

PLFP Fee payment

Year of fee payment: 13

PLFP Fee payment

Year of fee payment: 14

PLFP Fee payment

Year of fee payment: 15

PLFP Fee payment

Year of fee payment: 17

PLFP Fee payment

Year of fee payment: 18

PLFP Fee payment

Year of fee payment: 19

PLFP Fee payment

Year of fee payment: 20