FR2860919B1 - Structures et procedes de fabrication de regions semiconductrices sur isolant - Google Patents
Structures et procedes de fabrication de regions semiconductrices sur isolantInfo
- Publication number
- FR2860919B1 FR2860919B1 FR0350665A FR0350665A FR2860919B1 FR 2860919 B1 FR2860919 B1 FR 2860919B1 FR 0350665 A FR0350665 A FR 0350665A FR 0350665 A FR0350665 A FR 0350665A FR 2860919 B1 FR2860919 B1 FR 2860919B1
- Authority
- FR
- France
- Prior art keywords
- insulation
- structures
- methods
- semiconductor regions
- producing semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000009413 insulation Methods 0.000 title 1
- 238000000034 method Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/76202—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using a local oxidation of silicon, e.g. LOCOS, SWAMI, SILO
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78603—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the insulating substrate or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0350665A FR2860919B1 (fr) | 2003-10-09 | 2003-10-09 | Structures et procedes de fabrication de regions semiconductrices sur isolant |
US10/960,436 US20050085026A1 (en) | 2003-10-09 | 2004-10-07 | Manufacturing method of semiconductor-on-insulator region structures |
US11/713,553 US7638844B2 (en) | 2003-10-09 | 2007-03-02 | Manufacturing method of semiconductor-on-insulator region structures |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0350665A FR2860919B1 (fr) | 2003-10-09 | 2003-10-09 | Structures et procedes de fabrication de regions semiconductrices sur isolant |
Publications (2)
Publication Number | Publication Date |
---|---|
FR2860919A1 FR2860919A1 (fr) | 2005-04-15 |
FR2860919B1 true FR2860919B1 (fr) | 2009-09-11 |
Family
ID=34355514
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
FR0350665A Expired - Fee Related FR2860919B1 (fr) | 2003-10-09 | 2003-10-09 | Structures et procedes de fabrication de regions semiconductrices sur isolant |
Country Status (2)
Country | Link |
---|---|
US (2) | US20050085026A1 (fr) |
FR (1) | FR2860919B1 (fr) |
Families Citing this family (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP1727194A1 (fr) * | 2005-05-27 | 2006-11-29 | Interuniversitair Microelektronica Centrum vzw ( IMEC) | Méthode de formation de motif par topographie haute résolution |
US8557668B2 (en) * | 2012-01-12 | 2013-10-15 | Globalfoundries Singapore Pte. Ltd. | Method for forming N-shaped bottom stress liner |
CN106610561B (zh) * | 2015-10-20 | 2020-03-24 | 无锡华润上华科技有限公司 | 光刻版的形成方法 |
US12062700B2 (en) | 2018-04-04 | 2024-08-13 | Qorvo Us, Inc. | Gallium-nitride-based module with enhanced electrical performance and process for making the same |
US12046505B2 (en) | 2018-04-20 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same utilizing localized SOI formation |
WO2020009759A1 (fr) | 2018-07-02 | 2020-01-09 | Qorvo Us, Inc. | Dispositif semi-conducteur radiofréquence et son procédé de fabrication |
US11646242B2 (en) | 2018-11-29 | 2023-05-09 | Qorvo Us, Inc. | Thermally enhanced semiconductor package with at least one heat extractor and process for making the same |
CN113632209A (zh) | 2019-01-23 | 2021-11-09 | Qorvo美国公司 | Rf半导体装置和其制造方法 |
US12125825B2 (en) | 2019-01-23 | 2024-10-22 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12057374B2 (en) | 2019-01-23 | 2024-08-06 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12046483B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12046570B2 (en) | 2019-01-23 | 2024-07-23 | Qorvo Us, Inc. | RF devices with enhanced performance and methods of forming the same |
US12074086B2 (en) | 2019-11-01 | 2024-08-27 | Qorvo Us, Inc. | RF devices with nanotube particles for enhanced performance and methods of forming the same |
US11923238B2 (en) | 2019-12-12 | 2024-03-05 | Qorvo Us, Inc. | Method of forming RF devices with enhanced performance including attaching a wafer to a support carrier by a bonding technique without any polymer adhesive |
US12129168B2 (en) | 2019-12-23 | 2024-10-29 | Qorvo Us, Inc. | Microelectronics package with vertically stacked MEMS device and controller device |
US12062571B2 (en) | 2021-03-05 | 2024-08-13 | Qorvo Us, Inc. | Selective etching process for SiGe and doped epitaxial silicon |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4897703A (en) * | 1988-01-29 | 1990-01-30 | Texas Instruments Incorporated | Recessed contact bipolar transistor and method |
NL8800847A (nl) * | 1988-04-05 | 1989-11-01 | Philips Nv | Werkwijze voor het vervaardigen van een halfgeleiderinrichting met een soi-struktuur. |
DE69332960T2 (de) * | 1992-01-28 | 2004-05-13 | Canon K.K. | Halbleiteranordnung |
KR0142797B1 (ko) * | 1994-06-17 | 1998-08-17 | 문정환 | 실리콘-온-인슐레이터구조의 제조방법 |
KR20000045305A (ko) * | 1998-12-30 | 2000-07-15 | 김영환 | 완전 공핍형 에스·오·아이 소자 및 그 제조방법 |
US6355493B1 (en) * | 1999-07-07 | 2002-03-12 | Silicon Wafer Technologies Inc. | Method for forming IC's comprising a highly-resistive or semi-insulating semiconductor substrate having a thin, low resistance active semiconductor layer thereon |
US6562666B1 (en) * | 2000-10-31 | 2003-05-13 | International Business Machines Corporation | Integrated circuits with reduced substrate capacitance |
FR2821483B1 (fr) * | 2001-02-28 | 2004-07-09 | St Microelectronics Sa | Procede de fabrication d'un transistor a grille isolee et a architecture du type substrat sur isolant, et transistor correspondant |
US6611023B1 (en) * | 2001-05-01 | 2003-08-26 | Advanced Micro Devices, Inc. | Field effect transistor with self alligned double gate and method of forming same |
-
2003
- 2003-10-09 FR FR0350665A patent/FR2860919B1/fr not_active Expired - Fee Related
-
2004
- 2004-10-07 US US10/960,436 patent/US20050085026A1/en not_active Abandoned
-
2007
- 2007-03-02 US US11/713,553 patent/US7638844B2/en active Active
Also Published As
Publication number | Publication date |
---|---|
US20080087959A1 (en) | 2008-04-17 |
US20050085026A1 (en) | 2005-04-21 |
FR2860919A1 (fr) | 2005-04-15 |
US7638844B2 (en) | 2009-12-29 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
PLFP | Fee payment |
Year of fee payment: 13 |
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PLFP | Fee payment |
Year of fee payment: 14 |
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PLFP | Fee payment |
Year of fee payment: 15 |
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PLFP | Fee payment |
Year of fee payment: 16 |
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PLFP | Fee payment |
Year of fee payment: 17 |
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PLFP | Fee payment |
Year of fee payment: 18 |
|
ST | Notification of lapse |
Effective date: 20220605 |