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FR2250449A5 - Protection system for data processor interruption - has double memory bank with each bank divided into two parts - Google Patents

Protection system for data processor interruption - has double memory bank with each bank divided into two parts

Info

Publication number
FR2250449A5
FR2250449A5 FR7338952A FR7338952A FR2250449A5 FR 2250449 A5 FR2250449 A5 FR 2250449A5 FR 7338952 A FR7338952 A FR 7338952A FR 7338952 A FR7338952 A FR 7338952A FR 2250449 A5 FR2250449 A5 FR 2250449A5
Authority
FR
France
Prior art keywords
bank
parts
memory bank
memory
divided
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
FR7338952A
Other languages
French (fr)
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SAS
Original Assignee
Societe Industrielle Honeywell Bull
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Societe Industrielle Honeywell Bull filed Critical Societe Industrielle Honeywell Bull
Priority to FR7338952A priority Critical patent/FR2250449A5/en
Application granted granted Critical
Publication of FR2250449A5 publication Critical patent/FR2250449A5/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/461—Saving or restoring of program or task context
    • G06F9/462—Saving or restoring of program or task context with multiple register sets

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

To protect the contents of the working memory of the arithmetic unit of the process during an interruption in the programme, or when the latter denotes the use of an common procedure, a double memory bank, comprising a main memory bank and an auxiliary memory bank, is used. Each memory bank is divided into two parts (R0-R14, R,-R15) and the auxiliary bank is assigned to the formal process, the main bank is assigned to the programmes interruption process. The two parts of the auxiliary bank have fewer register stages than the two parts of the main bank, the additional register stages being reserved for common procuders. The memory banks are addressed via a bistable circuit.
FR7338952A 1973-10-31 1973-10-31 Protection system for data processor interruption - has double memory bank with each bank divided into two parts Expired FR2250449A5 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
FR7338952A FR2250449A5 (en) 1973-10-31 1973-10-31 Protection system for data processor interruption - has double memory bank with each bank divided into two parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7338952A FR2250449A5 (en) 1973-10-31 1973-10-31 Protection system for data processor interruption - has double memory bank with each bank divided into two parts

Publications (1)

Publication Number Publication Date
FR2250449A5 true FR2250449A5 (en) 1975-05-30

Family

ID=9127212

Family Applications (1)

Application Number Title Priority Date Filing Date
FR7338952A Expired FR2250449A5 (en) 1973-10-31 1973-10-31 Protection system for data processor interruption - has double memory bank with each bank divided into two parts

Country Status (1)

Country Link
FR (1) FR2250449A5 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2434430A1 (en) * 1978-08-22 1980-03-21 Nippon Electric Co MICRO INSTRUCTION PROCESSING UNIT RESPONDING TO A PRIORITY OF INTERRUPTION
FR2464008A1 (en) * 1979-08-17 1981-02-27 Thomson Brandt Luminous gas discharge tube supply - measures discharge tube current to generate error signal which varies duty cycle of primary voltage of step up transformer
EP0369407A2 (en) * 1988-11-14 1990-05-23 Nec Corporation Central processing unit for data processor having emulation function
EP0892344A2 (en) * 1989-05-04 1999-01-20 Texas Instruments Incorporated Data processing device with context switching capability

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2434430A1 (en) * 1978-08-22 1980-03-21 Nippon Electric Co MICRO INSTRUCTION PROCESSING UNIT RESPONDING TO A PRIORITY OF INTERRUPTION
FR2464008A1 (en) * 1979-08-17 1981-02-27 Thomson Brandt Luminous gas discharge tube supply - measures discharge tube current to generate error signal which varies duty cycle of primary voltage of step up transformer
EP0369407A2 (en) * 1988-11-14 1990-05-23 Nec Corporation Central processing unit for data processor having emulation function
EP0369407A3 (en) * 1988-11-14 1991-10-16 Nec Corporation Central processing unit for data processor having emulation function
EP0892344A2 (en) * 1989-05-04 1999-01-20 Texas Instruments Incorporated Data processing device with context switching capability
EP0892344A3 (en) * 1989-05-04 1999-02-10 Texas Instruments Incorporated Data processing device with context switching capability

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Legal Events

Date Code Title Description
ST Notification of lapse