FI854317A - Minnesbussarkitektor. - Google Patents

Minnesbussarkitektor. Download PDF

Info

Publication number: FI854317A
Authority: FI; Finland
Prior art keywords: minnesbussarkitektor
Prior art date: 1984-11-02

Application number

FI854317A

Other languages

English (en)

Other versions

FI854317A0 (fi

Inventor

Gene Ray Stinson

Anna Stockel Williams

Maximilian Paul Jedda

Original Assignee

Measurex Corp

Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)

1984-11-02

Filing date

1985-11-04

Publication date

1986-05-03

1985-11-04 Application filed by Measurex Corp filed Critical Measurex Corp

1985-11-04 Publication of FI854317A0 publication Critical patent/FI854317A0/fi

1986-05-03 Publication of FI854317A publication Critical patent/FI854317A/fi

Classifications

- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4204—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus
- G06F13/4234—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus
- G06F13/4243—Bus transfer protocol, e.g. handshake; Synchronisation on a parallel bus being a memory bus with synchronous protocol

Landscapes

Engineering & Computer Science (AREA)
Theoretical Computer Science (AREA)
Physics & Mathematics (AREA)
General Engineering & Computer Science (AREA)
General Physics & Mathematics (AREA)
Bus Control (AREA)
Memory System (AREA)
Microcomputers (AREA)
Complex Calculations (AREA)

FI854317A 1984-11-02 1985-11-04 Minnesbussarkitektor. FI854317A (fi)

Applications Claiming Priority (1)

Application Number	Priority Date	Filing Date	Title
US66786584A	1984-11-02	1984-11-02

Publications (2)

Publication Number	Publication Date
FI854317A0 FI854317A0 (fi)	1985-11-04
FI854317A true FI854317A (fi)	1986-05-03

Family

ID=24679982

Family Applications (1)

Application Number	Title	Priority Date	Filing Date
FI854317A FI854317A (fi)	1984-11-02	1985-11-04	Minnesbussarkitektor.

Country Status (7)

Country	Link
EP (1)	EP0184320B1 (fi)
JP (1)	JPS61166647A (fi)
KR (1)	KR920010977B1 (fi)
CA (1)	CA1238426A (fi)
DE (1)	DE3583283D1 (fi)
FI (1)	FI854317A (fi)
IE (1)	IE57399B1 (fi)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
NL8800858A (nl) *	1988-04-05	1989-11-01	Philips Nv	Rekenmachinesysteem voorzien van een hoofdbus en een tussen processor en geheugen direkt verbonden extra kommunikatielijn.
DE58908907D1 (de) *	1988-09-29	1995-03-02	Siemens Ag	Universeller Standard-Bus.
GB2256068B (en) *	1991-05-21	1995-04-26	Research Machines Plc	Bus cycle control means
US5828861A (en) *	1992-03-06	1998-10-27	Seiko Epson Corporation	System and method for reducing the critical path in memory control unit and input/output control unit operations
US5623694A (en) *	1994-10-03	1997-04-22	International Business Machines Corporation	Aborting an I/O operation started before all system data is received by the I/O controller after detecting a remote retry operation
GB2455772A (en) *	2007-12-20	2009-06-24	Symbian Software Ltd	Early reporting of commands to a peripheral device

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number	Priority date	Publication date	Assignee	Title
US4240138A (en) *	1978-10-03	1980-12-16	Texas Instruments Incorporated	System for direct access to a memory associated with a microprocessor
DE3007939A1 (de) *	1980-03-01	1981-09-17	Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt	Anordnung zur kopplung von datenverarbeitungsanlagen
US4464715A (en) *	1982-02-24	1984-08-07	Daisy Systems Corporation	Memory accessing method

1985
- 1985-10-31 DE DE8585307880T patent/DE3583283D1/de not_active Expired - Fee Related
- 1985-10-31 EP EP85307880A patent/EP0184320B1/en not_active Expired - Lifetime
- 1985-11-01 CA CA000494452A patent/CA1238426A/en not_active Expired
- 1985-11-01 KR KR1019850008152A patent/KR920010977B1/ko not_active IP Right Cessation
- 1985-11-02 JP JP60246923A patent/JPS61166647A/ja active Pending
- 1985-11-04 IE IE2734/85A patent/IE57399B1/en unknown
- 1985-11-04 FI FI854317A patent/FI854317A/fi not_active Application Discontinuation

Also Published As

Publication number	Publication date
KR860004359A (ko)	1986-06-20
JPS61166647A (ja)	1986-07-28
CA1238426A (en)	1988-06-21
DE3583283D1 (de)	1991-07-25
IE852734L (en)	1986-05-02
KR920010977B1 (ko)	1992-12-26
EP0184320B1 (en)	1991-06-19
EP0184320A1 (en)	1986-06-11
IE57399B1 (en)	1992-08-26
FI854317A0 (fi)	1985-11-04

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Legal Events

Date	Code	Title	Description
1993-12-28	FD	Application lapsed
2004-08-31	FD	Application lapsed	Owner name: MEASUREX CORPORATION