[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

ES8308437A1 - "un aparato de tratamiento de datos". - Google Patents

"un aparato de tratamiento de datos".

Info

Publication number
ES8308437A1
ES8308437A1 ES515971A ES515971A ES8308437A1 ES 8308437 A1 ES8308437 A1 ES 8308437A1 ES 515971 A ES515971 A ES 515971A ES 515971 A ES515971 A ES 515971A ES 8308437 A1 ES8308437 A1 ES 8308437A1
Authority
ES
Spain
Prior art keywords
dasd
logical
devices
operations
peripheral system
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
ES515971A
Other languages
English (en)
Other versions
ES515971A0 (es
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of ES515971A0 publication Critical patent/ES515971A0/es
Publication of ES8308437A1 publication Critical patent/ES8308437A1/es
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/10—Program control for peripheral devices
    • G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
    • G06F13/122—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware performs an I/O function other than control of data transfer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0866—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches for peripheral storage systems, e.g. disk cache

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Retry When Errors Occur (AREA)
  • Debugging And Monitoring (AREA)

Abstract

APARATO DE TRATAMIENTO DE DATOS QUE LLEVA INCORPORADO UN SISTEMA ACOGEDOR O _(HUESPED DOTADO DE UNA PLURALIDAD DE CONEXIONES DE ENTRADA-SALIDA Y UN SISTEMA PERIFERICO DOTADO DE UNA PLURALIDAD DE DISPOSITIVOS SELECCIONABLES. CONSTA DE VARIOS DISPOSITIVOS DE ALMACENAJE (18) DE ACCESO DIRECTO QUE ESTAN CONECTADOS AL HUESPED A TRAVES DE UNA MEMORIA DE OCULTACION (40); DE UNA PLURALIDAD DE DIRECCIONES DE ACCESO (16, 17), DENOMINADAS TAMBIEN DISPOSITIVOS LOGICOS Y EXPOSICIONES (17); Y DE UN CONTROLADOR PROGRAMADO QUE MANTIENE LA INTEGRIDAD DE LOS DATOS Y DA ACOMODO A LA INDEPENDENCIA DE LOS DISPOSITIVOS LOGICOS, USANDO PARA ELLO FILAS DE ESPERA Y UNOS BLOQUES DE CONTROL.
ES515971A 1981-09-28 1982-09-27 "un aparato de tratamiento de datos". Expired ES8308437A1 (es)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/306,011 US4403288A (en) 1981-09-28 1981-09-28 Methods and apparatus for resetting peripheral devices addressable as a plurality of logical devices

Publications (2)

Publication Number Publication Date
ES515971A0 ES515971A0 (es) 1983-08-16
ES8308437A1 true ES8308437A1 (es) 1983-08-16

Family

ID=23183340

Family Applications (1)

Application Number Title Priority Date Filing Date
ES515971A Expired ES8308437A1 (es) 1981-09-28 1982-09-27 "un aparato de tratamiento de datos".

Country Status (5)

Country Link
US (1) US4403288A (es)
EP (1) EP0075688B1 (es)
JP (1) JPS5864527A (es)
DE (1) DE3279221D1 (es)
ES (1) ES8308437A1 (es)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4533996A (en) * 1982-02-23 1985-08-06 International Business Machines Corporation Peripheral systems accommodation of guest operating systems
US4525777A (en) * 1981-08-03 1985-06-25 Honeywell Information Systems Inc. Split-cycle cache system with SCU controlled cache clearing during cache store access period
US4464713A (en) * 1981-08-17 1984-08-07 International Business Machines Corporation Method and apparatus for converting addresses of a backing store having addressable data storage devices for accessing a cache attached to the backing store
US4636946A (en) * 1982-02-24 1987-01-13 International Business Machines Corporation Method and apparatus for grouping asynchronous recording operations
US4504902A (en) * 1982-03-25 1985-03-12 At&T Bell Laboratories Cache arrangement for direct memory access block transfer
US4553202A (en) * 1982-05-06 1985-11-12 International Business Machines Corporation User controlled dialog resource switching in a multi-tasking word processor
US4575814A (en) * 1982-05-26 1986-03-11 Westinghouse Electric Corp. Programmable interface memory
US4574346A (en) * 1982-09-29 1986-03-04 International Business Machines Corporation Method and apparatus for peripheral data handling hierarchies
US4638425A (en) * 1982-09-29 1987-01-20 International Business Machines Corporation Peripheral data storage having access controls with error recovery
US4583166A (en) * 1982-10-08 1986-04-15 International Business Machines Corporation Roll mode for cached data storage
CA1253627A (en) * 1982-11-09 1989-05-02 Paul B. Brown Dynamic addressing for variable track length cache memory
DE3382684T2 (de) * 1982-11-16 1993-08-26 Unisys Corp Blockzaehlersystem zur ueberwachung des datentransfers.
CA1211573A (en) * 1982-12-07 1986-09-16 Glenn T. Hotchkin System for regulating data transfer operations
US4607331A (en) * 1983-05-13 1986-08-19 Motorola, Inc. Method and apparatus for implementing an algorithm associated with stored information
JP2636212B2 (ja) * 1985-05-27 1997-07-30 株式会社日立製作所 磁気デイスク装置
JPH0664536B2 (ja) * 1986-01-17 1994-08-22 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション 仮想端末サブシステムの制御方法
US4787026A (en) * 1986-01-17 1988-11-22 International Business Machines Corporation Method to manage coprocessor in a virtual memory virtual machine data processing system
US4970640A (en) * 1987-08-28 1990-11-13 International Business Machines Corporation Device initiated partial system quiescing
US5129087A (en) * 1988-02-03 1992-07-07 International Business Machines, Corp. Computer system and a method of monitoring transient data structures in a computer system
US4954941A (en) * 1988-08-31 1990-09-04 Bell Communications Research, Inc. Method and apparatus for program updating
US5450564A (en) * 1990-05-04 1995-09-12 Unisys Corporation Method and apparatus for cache memory access with separate fetch and store queues
US5488709A (en) * 1990-06-27 1996-01-30 Mos Electronics, Corp. Cache including decoupling register circuits
WO1992000590A1 (en) * 1990-06-27 1992-01-09 Mos Electronics Corporation Random access cache memory
US5732241A (en) * 1990-06-27 1998-03-24 Mos Electronics, Corp. Random access cache memory controller and system
JP2752247B2 (ja) * 1990-11-29 1998-05-18 富士通株式会社 情報記憶装置
CA2066542A1 (en) * 1991-05-24 1992-11-25 Richard Bealkowski Method and apparatus for extending physical system addressable memory
US5423026A (en) * 1991-09-05 1995-06-06 International Business Machines Corporation Method and apparatus for performing control unit level recovery operations
US5297287A (en) * 1992-03-02 1994-03-22 S-Mos Systems, Incorporated System and method for resetting a microprocessor system
JP2957354B2 (ja) * 1992-05-13 1999-10-04 三菱電機株式会社 信号転送方法
US5487160A (en) * 1992-12-04 1996-01-23 At&T Global Information Solutions Company Concurrent image backup for disk storage system
US5530829A (en) * 1992-12-17 1996-06-25 International Business Machines Corporation Track and record mode caching scheme for a storage system employing a scatter index table with pointer and a track directory
US5805922A (en) * 1994-05-02 1998-09-08 Motorola, Inc. Queued serial peripheral interface having multiple queues for use in a data processing system
US5684986A (en) * 1995-06-07 1997-11-04 International Business Machines Corporation Embedded directory method and record for direct access storage device (DASD) data compression
US5752249A (en) * 1996-11-14 1998-05-12 Macon, Jr.; Charles E. System and method for instantiating a sharable, presistent parameterized collection class and real time process control system embodying the same
JP3290365B2 (ja) * 1996-11-19 2002-06-10 インターナショナル・ビジネス・マシーンズ・コーポレーション エラー回復プロシージャを実行する方法
US6643783B2 (en) * 1999-10-27 2003-11-04 Terence T. Flyntz Multi-level secure computer with token-based access control
JP4333370B2 (ja) * 2004-01-08 2009-09-16 株式会社日立製作所 データ処理システム
JP4637864B2 (ja) 2007-01-31 2011-02-23 トヨタ紡織株式会社 車両用シートの格納構造
GB201415796D0 (en) 2014-09-07 2014-10-22 Technion Res & Dev Foundation Logical-to-physical block mapping inside the disk controller: accessing data objects without operating system intervention
KR20170074264A (ko) * 2015-12-21 2017-06-30 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작방법

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4104718A (en) * 1974-12-16 1978-08-01 Compagnie Honeywell Bull (Societe Anonyme) System for protecting shared files in a multiprogrammed computer
US4205374A (en) * 1978-10-19 1980-05-27 International Business Machines Corporation Method and means for CPU recovery of non-logged data from a storage subsystem subject to selective resets
GB2052118A (en) * 1979-06-04 1981-01-21 Memorex Corp Disc Cache Subsystem

Also Published As

Publication number Publication date
EP0075688B1 (en) 1988-11-17
ES515971A0 (es) 1983-08-16
EP0075688A2 (en) 1983-04-06
DE3279221D1 (en) 1988-12-22
US4403288A (en) 1983-09-06
JPS5864527A (ja) 1983-04-16
EP0075688A3 (en) 1986-05-14
JPS6149709B2 (es) 1986-10-30

Similar Documents

Publication Publication Date Title
ES8308437A1 (es) "un aparato de tratamiento de datos".
EP0059794A3 (en) Data processing system
GB1493818A (en) Information processor input/output
JPS53118322A (en) Shared page control system for virtual storage data processing system
JPS57113162A (en) High-speed external storage device
JPS5779557A (en) Data processor
GB1424105A (en) Programmed digital data processing system
FR2170659A5 (es)
FR2438298B1 (fr) Memoire de commande d'un systeme de traitement de donnees
JPS5627461A (en) File share control system
JPS5489455A (en) Control system
JPS6478361A (en) Data processing system
JPS6426866A (en) Control method for image forming device
JPS5582358A (en) Error collection system of central processing unit
JPS5587220A (en) Interface controller
JPS5491156A (en) Data processing system
GB1404664A (en) Stored programme data processing system having a memory extension
JPS54107235A (en) Interrupt control system
JPS53142137A (en) Memory control unit
JPS57143669A (en) Debugging device for multiprocessor system
JPS5564693A (en) Buffer memory unit
JPS5682967A (en) Picture processing system
EP0115566A3 (en) Method for testing the operation of an i/o controller in a data processing system
JPS5622157A (en) Process system multiplexing system
Neuhauser Functional description of the Emmy main memory system

Legal Events

Date Code Title Description
FD1A Patent lapsed

Effective date: 19990201