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EP1014439B1 - Method of manufacturing an inter- or intra-metal dielectric comprising air in an integrated circuit - Google Patents

Method of manufacturing an inter- or intra-metal dielectric comprising air in an integrated circuit Download PDF

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Publication number
EP1014439B1
EP1014439B1 EP99402414A EP99402414A EP1014439B1 EP 1014439 B1 EP1014439 B1 EP 1014439B1 EP 99402414 A EP99402414 A EP 99402414A EP 99402414 A EP99402414 A EP 99402414A EP 1014439 B1 EP1014439 B1 EP 1014439B1
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EP
European Patent Office
Prior art keywords
germanium
layer
metal elements
air
deposition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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EP99402414A
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German (de)
French (fr)
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EP1014439A1 (en
Inventor
Jérome Alieu
Christophe Lair
Michel Haond
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STMicroelectronics SA
Orange SA
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STMicroelectronics SA
France Telecom SA
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5222—Capacitive arrangements or effects of, or between wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/7682—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing the dielectric comprising air gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Definitions

  • the present invention generally relates to the isolation of the conductive metal elements of the different metallization levels of an integrated circuit and more particularly to a method for producing such insulation of the conductive metal elements of the integrated circuit by air.
  • the invention also relates to an integrated circuit in which at least a portion of the conductive metal elements of the different metallization levels of the circuit are isolated from each other by means of air.
  • C total capacity
  • This total capacity consists of the capabilities of the semiconductor device (junction capacity, grid-drain capacity, etc.) as well as the inter-connection capacity.
  • the inter-connection capacitance itself comprises two capacitors, the capacitance between the conductive metallic elements of the same level of metallization generally called intra-metallic capacitance and the capacitance between conductive metal elements of two successive metallization levels of the circuit. built-in, commonly referred to as inter-metallic capability.
  • the capacity of the device and the inter-connection capacity represent respectively about 30 and 70% of the total capacitance of the integrated circuit. So we see immediately the interest of reducing the most important of these two capacities, that is to say, the ability to interconnect. On the other hand, in the inter-connection capacity, the intra-metallic capacity is the most important.
  • Air is the best known dielectric having the lowest dielectric constant, and therefore, it would be desirable to be able to achieve inter and intra-metal insulations in integrated circuits by means of air.
  • US-A-5,461,003 discloses a method of making insulating air trenches between metal tracks, comprising depositing a layer of polymers in a portion of the spaces between said metal tracks, and removing the layer of polymers for form the trenches filled with air.
  • US-A-5,598,026 discloses the use of germanium oxide GeO x as a selectively extractable material to form a porous insulating layer.
  • a layer of carbon of thickness equal to that desired for the inter-connection conductive metal elements is deposited on the insulating film separating two adjacent metallization levels by spraying.
  • the recesses for receiving the conductive metal elements are then formed in the carbon film and the metal is then deposited by chemical vapor deposition or physical vapor deposition in these recesses, and the assembly is then subjected to chemical mechanical polishing.
  • a thin layer of insulating material with a thickness generally of the order of 50 nm is then deposited over the entire surface, for example a film of silicon dioxide deposited by sputtering.
  • the assembly is subjected to heat treatment in an oxygen atmosphere furnace, typically at a temperature of about 450 ° C.
  • the oxygen diffuses through the thin film of insulating material, reacts with the carbon, converts it into carbon dioxide so that the spaces between the conductive metal element end up being filled with gas.
  • the article also mentions that the method can also be used to perform intra- and inter-metallic insulation.
  • a major disadvantage of the process described in the above document is the use of carbon, because carbon is a crippling contaminant of the equipment used for the production of integrated circuits.
  • Another disadvantage of the method is that it requires a heating in a furnace in an oxygen atmosphere at a temperature as high as 450 ° C to oxidize the carbon and transform it into CO 2 , high temperature which can adversely affect the integrity of the integrated circuit.
  • the CO 2 formed in order to carry out the isolation with air, the CO 2 formed must diffuse through the thin layer of SiO 2 , which obviously impairs the efficiency of the process.
  • the object of the present invention is therefore to provide a method for producing intra and / or inter-metallic isolation by air in an integrated circuit that overcomes the disadvantages of the prior art.
  • the present invention relates to such a method which avoids the use of carbon.
  • the present invention also relates to such a method which is simple and fast and which does not risk contaminating the equipment used for the production of integrated circuits.
  • Polycrystalline germanium is a unique material in the process of the present invention because germanium reacts strongly with oxygen at room temperature, for example oxygen or an oxidant, to form readily removable compounds, namely GeO which is volatile , GeO 2 which dissolves in water and GeOH 4 which dissolves in a diluted acid.
  • This dissolution by means of oxygenated chemistry appropriate to the advantage of being able to be carried out at ambient temperature. It is of course possible to proceed at a temperature above ambient temperature, generally not exceeding 200 ° C., to accelerate the germanium removal process.
  • germanium it is also possible to perform the removal of germanium by means of an oxidizing plasma, such as for example an oxygen or ozone plasma.
  • an oxidizing plasma such as for example an oxygen or ozone plasma.
  • germanium is not a critical chemical element in the manufacture of integrated circuits and for silicon technology because it is not a silicon contaminant.
  • a layer of an encapsulating insulating material can be deposited to close the inter-connection spaces filled with air.
  • inter-connection spaces may be filled with encapsulating insulating material or other solid insulating material.
  • a substrate 10 which may be a silicon semiconductor substrate covered with a layer of a configured insulator (contacts or vias) or a metallization level of an integrated circuit covered with a layer of a configured insulator (contacts or vias)
  • the conductive metal elements 11 is carried out, as shown in Figure 1a, the deposition, for example by chemical vapor deposition, a layer of germanium and mechanical polishing -chemical of this layer to fill the inter-connection spaces between the metal elements 11 with polycrystalline germanium 12.
  • a thin protective film such as a SiO 2 film 5 to 50 nm thick, can be deposited on the conductive metal elements 11 and the free surface of the substrate 10. the order of 20 nm thick.
  • the deposition of this protective film can be done in any conventional manner, for example by chemical vapor deposition (CVD) or physical vapor deposition (PVD).
  • This thin protective film has the essential purpose of protecting the metal elements 11 during the subsequent steps of producing the integrated circuit.
  • This protective oxide film also makes it possible, in a conventional manner, to chemically-mechanically polish the polycrystalline germanium deposited with a stop on the oxide layer.
  • a thin film of insulating material 13 is deposited, for example a thin film of SiO 2 deposited by chemical vapor deposition so as to cover with this film the metal elements 11 possibly already coated with a protective oxide film and polycrystalline germanium 12 deposited in the inter-connection spaces.
  • a mask of a photo-resistant resin 14 is formed on the film of insulating material 13 (FIG. 1c).
  • the insulating film 13 is then etched, for example a conventional anisotropic etching of an SiO 2 film , and the conventional removal of the photoresist resin mask 14.
  • the etching of the insulating film 13 leads to the formation of a recess showing the polycrystalline germanium 12 between the metal elements 11.
  • the germanium is then removed, for example by the action of an oxidizing solution such as water, a solution of hydrogen peroxide, a dilute solution of sulfuric acid or by means of an oxidizing plasma such as an oxygen or ozone plasma to obtain an inter-connection space filled with air 15.
  • an oxidizing solution such as water, a solution of hydrogen peroxide, a dilute solution of sulfuric acid or by means of an oxidizing plasma such as an oxygen or ozone plasma to obtain an inter-connection space filled with air 15.
  • the deposition and annealing are then carried out in a conventional manner with an insulating film 16, for example a thin film of SiO 2 , SiOF or of silsesquioxane hydride (HSQ) as represented in FIG. 1f.
  • an insulating film 16 for example a thin film of SiO 2 , SiOF or of silsesquioxane hydride (HSQ) as represented in FIG. 1f.
  • TEOS ethyl tetraorthosilicate
  • the inter-connection space 15 In order to prevent the inter-connection space 15 from being filled with the material of the thin insulating film 16 and the encapsulation layer, it is possible either to adjust the viscosity of the depositing compositions or else to adjust the size of the etched openings. . Thus, with etched openings of dimension at most equal to 0.2 microns, the inter-connection spaces are not filled with the materials of the subsequent layers.
  • the process optionally begins with the deposition of a thin protective layer, for example silicon oxide, on the metal elements 11, then the deposition of a layer of polycrystalline germanium and chemical mechanical polishing of this layer, with possibly stopping on oxide when the silicon oxide protective layer is present, to fill the inter-connection spaces between the metal elements 11 with polycrystalline germanium 12.
  • a thin protective layer for example silicon oxide
  • a layer of polycrystalline germanium and chemical mechanical polishing of this layer with possibly stopping on oxide when the silicon oxide protective layer is present, to fill the inter-connection spaces between the metal elements 11 with polycrystalline germanium 12.
  • a thin film of insulating material 13 for example a thin film of silicon oxide
  • a photoresist resin mask 14 having openings 14a, 14b of different dimensions.
  • the etching of the thin silicon oxide film 13 and the removal of the photoresist resin mask 14 are carried out so as to form openings of different sizes 13a and 13b in the thin silicon oxide film 13. facing the polycrystalline germanium deposited between the conductive metal elements 11 ( Figure 2b).
  • the opening 13a may be very small ( ⁇ 0.2 ⁇ m) and the opening 13b large (>> 0.2 ⁇ m).
  • a layer 16 of insulating material for example a layer of silicon oxide, SiOF or silsesquioxane hydride (HSQ), which, as shown in FIG. of the difference in size of the openings 13a and 13b, does not penetrate through the opening of smaller dimension 13a, thus closing the inter-connection space and providing isolation by air, while it will penetrate through the largest opening 13b and achieve a solid material insulation of the other inter-connection space as seen in Figure 2d.
  • HSQ silsesquioxane hydride
  • the embodiment of vias according to the invention starts with the deposition of a layer 32i of polycrystalline germanium on the surface of a substrate 30 which can be either a silicon semiconductor substrate coated with a layer of insulator configured ( contacts or vias), or a lower level of metallization, and comprising conductive metal elements 31i ( Figure 3a).
  • the polycrystalline germanium deposit 32i can be conventionally carried out by chemical vapor deposition and is generally followed by a chemical mechanical polishing.
  • the layer of polycrystalline germanium deposited must be sufficiently thick to allow the realization of vias between two successive metallization levels. That is to say that not only the polycrystalline germanium layer filled the inter-connection spaces but it covers the metal elements 31i with a sufficient thickness to be able to form vias, typically of the order of 1 micron.
  • a barrier layer 33i for example a nitride layer
  • silicon (Si 3 N 4 ) which can be deposited for example by plasma-assisted chemical vapor deposition, and then deposited, in a conventional manner, with a layer 34i, for example a layer of silicon oxide, used for formation of a hard mask.
  • a photoresist resin mask 35i is then produced on the layer 34i.
  • the etching of the layer 34i with stopping on the stop layer 33i and the removal of the resin mask is carried out so as to form a hard mask.
  • the etching of the barrier layer 33i and the germanium layer 32i is then carried out as shown in FIG. 3e to form the passage or via 36i to the conductive metal element 31i.
  • a protection layer 37i via via 36i for example a thin layer of silicon oxide
  • a protection layer 37i via via 36i for example a thin layer of silicon oxide
  • the successive layers of protection layers via via for example a titanium layer 38i with a etching phase of the oxide at the bottom of via and a layer of titanium nitride 39i, and finally one fills the via with metal, for example tungsten 40i ( Figures 3f and 3g).
  • a process for etching polycrystalline germanium comprises the use of a high-density gas plasma of a mixture of Cl 2 gas and either N 2 or NH 3 or an N 2 / NH 3 mixture.
  • conductive metal elements 31i + 1 of the metallization level immediately above i + 1 are conventionally produced.
  • a first path illustrated in FIGS. 4a and 4b proceeds to a step of etching the barrier layer 33i of the metallization level i to reveal the underlying polycrystalline germanium 32i (FIG. 4a), and then a new layer of polycrystalline germanium is deposited by chemical vapor deposition as before.
  • 32i + 1 for the metallization level i + 1 analogous to the germanium layer 32i of the metallization level i
  • the formation of vias for the upper level i + 2 is carried out as indicated above. This operation is repeated as many times as necessary to obtain the desired number of metallization levels.
  • the polycrystalline germanium deposits of all the metallization levels form a unit mass up to the upper terminal level and the entire mass of germanium is removed at once. This elimination can be done as previously by means of oxidative chemistry.
  • the integrated circuit is then completed, for example by depositing an encapsulation layer on the last level of metallization thus achieving inter and intra-metal air insulation of all the metallization levels.
  • etching of the barrier layer 33i it is possible after etching of the barrier layer 33i to deposit a thin insulating layer, for example a layer of silicon oxide, 41i + 1 (FIG. 5a) and then to form on this insulating layer a 42i + 1 resin mask and proceed in a conventional manner to the etching of the insulating layer ( Figure 5b).
  • a thin insulating layer for example a layer of silicon oxide, 41i + 1 (FIG. 5a) and then to form on this insulating layer a 42i + 1 resin mask and proceed in a conventional manner to the etching of the insulating layer ( Figure 5b).
  • the resin mask is removed and the germanium is removed.
  • the deposition of a protective layer for example oxide 43i + 1, is then used to close the inter-connection spaces and to achieve the air insulation.
  • mixed insulation can be obtained by air and by insulating material as previously described.

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Description

La présente invention concerne de manière générale l'isolation des éléments métalliques conducteurs des différents niveaux de métallisation d'un circuit intégré et plus particulièrement un procédé pour réaliser une telle isolation des éléments métalliques conducteurs du circuit intégré par de l'air.The present invention generally relates to the isolation of the conductive metal elements of the different metallization levels of an integrated circuit and more particularly to a method for producing such insulation of the conductive metal elements of the integrated circuit by air.

L'invention concerne également un circuit intégré dans lequel au moins une partie des éléments métalliques conducteurs des différents niveaux de métallisation du circuit sont isolés entre eux au moyen d'air.The invention also relates to an integrated circuit in which at least a portion of the conductive metal elements of the different metallization levels of the circuit are isolated from each other by means of air.

La rapidité de fonctionnement d'un circuit intégré dépend de sa capacité (C) totale. Cette capacité totale se compose des capacités du dispositif semi-conducteur (capacité de jonction, capacité grille-drain, etc...) ainsi que de la capacité d'inter-connexion.The speed of operation of an integrated circuit depends on its total capacity (C). This total capacity consists of the capabilities of the semiconductor device (junction capacity, grid-drain capacity, etc.) as well as the inter-connection capacity.

La capacité d'inter-connexion comprend elle-même deux capacités, la capacité entre les éléments métalliques conducteurs d'un même niveau de métallisation généralement appelée capacité intra-métallique et la capacité entre des éléments métalliques conducteurs de deux niveaux de métallisation successifs du circuit intégré, généralement appelée capacité inter-métallique.The inter-connection capacitance itself comprises two capacitors, the capacitance between the conductive metallic elements of the same level of metallization generally called intra-metallic capacitance and the capacitance between conductive metal elements of two successive metallization levels of the circuit. built-in, commonly referred to as inter-metallic capability.

La capacité du dispositif et la capacité d'inter-connexion représentent respectivement environ 30 et 70% de la capacité totale du circuit intégré. On voit donc immédiatement l'intérêt qu'il y a de réduire la plus importante de ces deux capacités, c'est-à-dire la capacité d'inter-connexion. D'autre part, dans la capacité d'inter-connexion, la capacité intra-métallique est la plus importante.The capacity of the device and the inter-connection capacity represent respectively about 30 and 70% of the total capacitance of the integrated circuit. So we see immediately the interest of reducing the most important of these two capacities, that is to say, the ability to interconnect. On the other hand, in the inter-connection capacity, the intra-metallic capacity is the most important.

L'air est le meilleur diélectrique connu ayant la constante diélectrique la plus faible, et par conséquent, il serait souhaitable de pouvoir réaliser des isolations inter et intra-métalliques dans les circuits intégrés au moyen d'air.Air is the best known dielectric having the lowest dielectric constant, and therefore, it would be desirable to be able to achieve inter and intra-metal insulations in integrated circuits by means of air.

US-A-5,461,003 décrit un procédé de réalisation de tranchées d'air isolantes entre des pistes métalliques, comprenant le dépôt d'une couche de polymères dans une partie des espaces entre lesdites pistes métalliques, et l'élimination de la couche de polymères pour former les tranchées remplies d'air.US-A-5,461,003 discloses a method of making insulating air trenches between metal tracks, comprising depositing a layer of polymers in a portion of the spaces between said metal tracks, and removing the layer of polymers for form the trenches filled with air.

US-A-5,598,026 décrit l'utilisation d'oxyde de germanium GeOx comme matériau pouvant être extrait sélectivement afin de former une couche poreuse isolante.US-A-5,598,026 discloses the use of germanium oxide GeO x as a selectively extractable material to form a porous insulating layer.

L'article "Use of Gas as Low-k Interlayer Dielectric in LSI's : Demonstration of Feasibility", M.B. Anand, Masaki Yamada, et Hideki Shibata (utilisation de gaz comme diélectrique intercouche à faible k dans les LSI : démonstration de faisabilité), I.E.E.E. Transaction on Electron Devices, vol. 44, n° 11, Novembre 1997, décrit un procédé de réalisation d'isolement intra-métallique par air.The article "Use of Gas as Low-k Interlayer Dielectric in LSI's: Demonstration of Feasibility", M. B. Anand, Masaki Yamada, and Hideki Shibata (use of gas as low-k interlayer dielectric in LSI: proof of feasibility), I.E.E.E. Transaction on Electron Devices, vol. 44, No. 11, November 1997, describes a method for producing intra-metallic isolation by air.

Selon ce procédé, on dépose sur le film isolant séparant deux niveaux de métallisation adjacents, par pulvérisation, une couche de carbone d'épaisseur égale à celle voulue pour les éléments métalliques conducteurs d'inter-connexion. On forme alors dans le film de carbone les évidements destinés à recevoir les éléments métalliques conducteurs et du métal est ensuite déposé par dépôt chimique en phase vapeur ou dépôt physique en phase vapeur dans ces évidements puis l'ensemble est soumis à un polissage mécano-chimique classique pour réaliser les éléments métalliques conducteurs d'inter-connexion dans les évidements. Une mince couche de matériau isolant d'une épaisseur généralement de l'ordre de 50 nm est alors déposée sur la totalité de la surface, par exemple un film de dioxyde de silicium déposé par pulvérisation. Ensuite, l'ensemble est soumis à un traitement thermique dans un four à atmosphère d'oxygène, typiquement à une température d'environ 450°C. L'oxygène, diffuse à travers le mince film de matériau isolant, réagit avec le carbone, le converti en dioxyde de carbone de sorte que les espaces entre l'élément métallique conducteur finissent par être remplis avec du gaz.According to this method, a layer of carbon of thickness equal to that desired for the inter-connection conductive metal elements is deposited on the insulating film separating two adjacent metallization levels by spraying. The recesses for receiving the conductive metal elements are then formed in the carbon film and the metal is then deposited by chemical vapor deposition or physical vapor deposition in these recesses, and the assembly is then subjected to chemical mechanical polishing. conventional for making the conductive metal elements interconnect in the recesses. A thin layer of insulating material with a thickness generally of the order of 50 nm is then deposited over the entire surface, for example a film of silicon dioxide deposited by sputtering. Then, the assembly is subjected to heat treatment in an oxygen atmosphere furnace, typically at a temperature of about 450 ° C. The oxygen diffuses through the thin film of insulating material, reacts with the carbon, converts it into carbon dioxide so that the spaces between the conductive metal element end up being filled with gas.

L'article mentionne encore que le procédé peut être utilisé également pour réaliser l'isolation intra et inter-métallique.The article also mentions that the method can also be used to perform intra- and inter-metallic insulation.

Un inconvénient majeur du procédé décrit dans le document ci-dessus est l'utilisation du carbone, car le carbone est un contaminant rédhibitoire des appareillages utilisés pour la production des circuits intégrés.A major disadvantage of the process described in the above document is the use of carbon, because carbon is a crippling contaminant of the equipment used for the production of integrated circuits.

Un autre inconvénient du procédé est qu'il nécessite un chauffage dans un four en atmosphère d'oxygène à une température aussi élevée que 450°C pour oxyder le carbone et le transformer en CO2, température élevée qui peut nuire à l'intégrité du circuit intégré. En outre, afin de réaliser l'isolement par de l'air, le CO2 formé doit diffuser à travers la mince couche de SiO2 ce qui manifestement nuit à l'efficacité du procédé.Another disadvantage of the method is that it requires a heating in a furnace in an oxygen atmosphere at a temperature as high as 450 ° C to oxidize the carbon and transform it into CO 2 , high temperature which can adversely affect the integrity of the integrated circuit. In addition, in order to carry out the isolation with air, the CO 2 formed must diffuse through the thin layer of SiO 2 , which obviously impairs the efficiency of the process.

La présente invention a donc pour objet de fournir un procédé de réalisation d'un isolement intra et/ou inter-métallique par air dans un circuit intégré qui remédie aux inconvénients de l'art antérieur.The object of the present invention is therefore to provide a method for producing intra and / or inter-metallic isolation by air in an integrated circuit that overcomes the disadvantages of the prior art.

En particulier, la présente invention a pour objet un tel procédé qui évite l'utilisation de carbone.In particular, the present invention relates to such a method which avoids the use of carbon.

La présente invention a encore pour objet un tel procédé qui soit simple et rapide et qui ne risque pas de contaminer les appareillages utilisées pour la production des circuits intégrés.The present invention also relates to such a method which is simple and fast and which does not risk contaminating the equipment used for the production of integrated circuits.

On atteint les objectifs ci-dessus, selon l'invention, au moyen d'un procédé de réalisation d'un isolement intra et/ou inter-métallique par air d'au moins une partie des éléments métalliques conducteurs des niveaux de métallisation du circuit intégré, caractérisé en ce qu'il comprend :

  1. a) le dépôt de germanium polycristallin dans au moins une partie des espaces inter-connexions entre lesdits éléments métalliques conducteurs ; et
  2. b) le retrait du germanium polycristallin pour former des espaces inter-connexions remplis d'air entre lesdits éléments métalliques conducteurs.
The above objectives according to the invention are achieved by means of a method for producing an intra and / or inter-metallic isolation by air of at least a portion of the conductive metal elements of the metallization levels of the circuit. integrated, characterized in that it comprises:
  1. a) the deposition of polycrystalline germanium in at least a portion of the inter-connection spaces between said conductive metal elements; and
  2. b) removing the polycrystalline germanium to form inter-connection spaces filled with air between said conductive metal elements.

Le germanium polycristallin est un matériau unique dans le procédé de la présente invention car le germanium réagit fortement avec l'oxygène, à température ambiante, par exemple l'oxygène ou un oxydant, pour former des composés aisément éliminables, à savoir GeO qui est volatil, GeO2 qui se dissout dans de l'eau et GeOH4 qui se dissout dans un acide dilué.Polycrystalline germanium is a unique material in the process of the present invention because germanium reacts strongly with oxygen at room temperature, for example oxygen or an oxidant, to form readily removable compounds, namely GeO which is volatile , GeO 2 which dissolves in water and GeOH 4 which dissolves in a diluted acid.

Il est donc extrêmement aisé d'éliminer le germanium polycristallin au moyen par exemple d'une chimie oxygénée adaptée, telle que par dissolution dans l'eau, l'eau oxygénée, des solutions diluées de H2SO4 afin de ne laisser à la place du germanium que de l'air comme isolant inter-connexion.It is therefore extremely easy to eliminate polycrystalline germanium by means, for example, of a suitable oxygenated chemistry, such as by dissolving in water, hydrogen peroxide, dilute solutions of H 2 SO 4 in order to leave the place of germanium than air as an insulator interconnect.

Cette dissolution au moyen d'une chimie oxygénée appropriée à l'avantage de pouvoir s'effectuer à température ambiante. On peut bien évidemment procéder à une température supérieure à la température ambiante, ne dépassant pas généralement 200°C, pour accélérer le processus de retrait du germanium.This dissolution by means of oxygenated chemistry appropriate to the advantage of being able to be carried out at ambient temperature. It is of course possible to proceed at a temperature above ambient temperature, generally not exceeding 200 ° C., to accelerate the germanium removal process.

Il est également possible d'effectuer le retrait du germanium au moyen d'un plasma oxydant, tel que par exemple un plasma d'oxygène ou d'ozone.It is also possible to perform the removal of germanium by means of an oxidizing plasma, such as for example an oxygen or ozone plasma.

Enfin, le germanium n'est pas un élément chimique critique dans la fabrication des circuits intégrés et pour la technologie du silicium car ce n'est pas un contaminant du silicium.Finally, germanium is not a critical chemical element in the manufacture of integrated circuits and for silicon technology because it is not a silicon contaminant.

On peut, si on le souhaite, déposer, préalablement au dépôt de germanium polycristallin, une couche isolante par exemple de SiO2, pour protéger les éléments métalliques d'un contact direct avec le germanium.It is possible, if desired, to deposit, prior to the deposition of polycrystalline germanium, an insulating layer, for example of SiO 2 , to protect the metal elements from direct contact with the germanium.

Dans une première mise en oeuvre préférée du procédé de l'invention on réalise une isolation par air intra-métallique entre des éléments métalliques conducteurs d'un même niveau de métallisation caractérisé en ce qu'il comprend :

  1. (1) le dépôt dans les espaces inter-connexions entre les éléments métalliques de germanium polycristallin ;
  2. (2) le dépôt sur les éléments métalliques et le germanium polycristallin d'une couche d'un matériau d'isolation ;
  3. (3) la formation sur la couche de matériau d'isolation d'un masque de résine photo-résistante ;
  4. (4) la gravure anisotrope de la couche de matériau d'isolation pour former dans cette couche des ouvertures en regard du germanium polycristallin ; et
  5. (5) l'élimination du germanium polycristallin pour réaliser des espaces inter-connexions remplis d'air.
In a first preferred embodiment of the method of the invention, an intra-metallic air insulation is produced between conductive metal elements of the same level of metallization, characterized in that it comprises:
  1. (1) the deposition in the inter-connection spaces between the polycrystalline germanium metal elements;
  2. (2) depositing on the metal elements and polycrystalline germanium a layer of an insulating material;
  3. (3) forming on the insulation material layer of a photoresist resin mask;
  4. (4) anisotropic etching of the layer of insulating material to form openings in this layer opposite the polycrystalline germanium; and
  5. (5) the elimination of polycrystalline germanium to make inter-connections spaces filled with air.

Une fois le germanium polycristallin éliminé, on peut déposer une couche d'un matériau isolant d'encapsulation pour clore les espaces inter-connexions remplis d'air.Once the polycrystalline germanium has been removed, a layer of an encapsulating insulating material can be deposited to close the inter-connection spaces filled with air.

En variante, on peut remplir certains des espaces inter-connexions avec le matériau isolant d'encapsulation ou un autre matériau isolant solide.Alternatively, some of the inter-connection spaces may be filled with encapsulating insulating material or other solid insulating material.

Dans une deuxième mise en oeuvre préférée du procédé de l'invention on réalise une isolation par air inter et intra-métallique entre au moins une partie des éléments métalliques conducteurs des niveaux de métallisation d'un circuit intégré, caractérisé en ce qu'il comprend :

  1. (1) le dépôt, de germanium polycristallin entre et sur les éléments métalliques conducteurs d'un niveau (i) de métallisation ;
  2. (2) la formation, pour ce niveau (i) de métallisation, des vias métalliques voulus, cette formation des vias ayant pour résultat de laisser une couche de matériau isolant sur la surface du dépôt de germanium polycristallin ;
  3. (3) la formation des éléments métalliques conducteurs d'un niveau adjacent (i + 1) de métallisation sur la surface de la couche de matériau isolant recouvrant le dépôt de germanium ;
  4. (4) la gravure de la couche de matériau isolant couvrant la surface du dépôt de germanium pour faire apparaître le dépôt de germanium en des emplacements choisis entre les éléments métalliques du niveau adjacent (i + 1) de métallisation ;
  5. (5) la répétition des étapes (1) à (4) jusqu'à obtention du nombre voulu de niveaux de métallisation, de sorte qu'on obtient un empilement du nombre voulu de niveaux de métallisation dans lequel les dépôts de germanium forment une masse de germanium ininterrompue jusqu'à la surface de l'empilement ; et
  6. (6) l'élimination de la masse de germanium ininterrompue pour former des espaces inter-connexions remplis d'air.
In a second preferred embodiment of the method of the invention, an inter and intra-metallic air insulation is produced between at least a portion of the conductive metal elements of the metallization levels of an integrated circuit, characterized in that it comprises :
  1. (1) the deposition of polycrystalline germanium between and on the conductive metal elements of a level (i) of metallization;
  2. (2) forming, for this level (i) of metallization, the desired metal vias, this vias formation resulting in leaving a layer of insulating material on the surface of the polycrystalline germanium deposit;
  3. (3) forming the conductive metal elements of an adjacent level (i + 1) of metallization on the surface of the layer of insulating material covering the germanium deposit;
  4. (4) etching the layer of insulating material covering the surface of the germanium deposit to expose the germanium deposit at selected locations between the metallic elements of the adjacent level (i + 1) of metallization;
  5. (5) repeating steps (1) to (4) until the desired number of metallization levels are achieved, whereby a stack of the desired number of metallization levels in which the germanium deposits form a mass is obtained; uninterrupted germanium up to the surface of the stack; and
  6. (6) removing the uninterrupted germanium mass to form inter-connection spaces filled with air.

Dans une troisième mise en oeuvre préférée du procédé de l'invention on réalise une isolation par air inter et intra-métallique entre une partie au moins des éléments métalliques conducteurs des niveaux de métallisation d'un circuit intégré, caractérisé en ce qu'il comprend :

  1. (1) le dépôt de germanium polycristallin entre et sur les éléments métalliques conducteurs d'un niveau (i) de métallisation ;
  2. (2) la formation, pour ce niveau (i) de métallisation, des vias métalliques voulus, cette formation des vias ayant pour résultat de laisser une couche de matériau isolant sur la surface du dépôt de germanium polycristallin ;
  3. (3) la formation des éléments métalliques conducteurs d'un niveau adjacent (i + 1) de métallisation sur la surface de la couche de matériau isolant recouvrant le dépôt de germanium ;
  4. (4) la gravure de la couche de matériau isolant couvrant la surface du dépôt de .germanium pour faire apparaître le dépôt de germanium en des emplacements choisis entre les éléments métalliques du niveau adjacent (i + 1) de métallisation ;
  5. (5) l'élimination du germanium pour former des espaces inter-connexions remplis d'air dans le niveau de métallisation ;
  6. (6) le dépôt d'une couche de matériau isolant intermétallique pour clore les espaces inter-connexions remplis d'air du niveau de métallisation (i) ; et
  7. (7) la répétition des étapes (1) à (6) jusqu'à obtention d'un empilement du nombre voulu de niveaux de métallisation comportant des espaces inter-connexions remplis d'air.
In a third preferred embodiment of the method of the invention, an inter and intra-metallic air insulation is produced between at least a portion of the conductive metal elements of the metallization levels of an integrated circuit, characterized in that it comprises :
  1. (1) the deposition of polycrystalline germanium between and on the conductive metal elements of a level (i) of metallization;
  2. (2) training, for this level (i) of metallization, vias desired metal formation, this formation of the vias resulting in leaving a layer of insulating material on the surface of the polycrystalline germanium deposit;
  3. (3) forming the conductive metal elements of an adjacent level (i + 1) of metallization on the surface of the layer of insulating material covering the germanium deposit;
  4. (4) etching the layer of insulating material covering the surface of the germanium deposit to expose the germanium deposit at selected locations between the metallic elements of the adjacent level (i + 1) of metallization;
  5. (5) removing germanium to form inter-connection spaces filled with air in the metallization level;
  6. (6) depositing a layer of intermetallic insulating material to close the air-filled interconnect spaces of the metallization level (i); and
  7. (7) repeating the steps (1) to (6) until a stack of the desired number of metallization levels having inter-connection spaces filled with air.

La suite de la description se réfère aux figures annexées qui représentent respectivement :

  • figures la à 1f schématiquement, les étapes principales de réalisation d'un isolement intra-métallique par air selon le procédé de l'invention ;
  • figures 2a à 2d, schématiquement les étapes principales de réalisation d'un isolement mixte intra-métallique par air et au moyen d'un matériau d'isolation solide classique ;
  • figures 3a à 3i, schématiquement, les principales étapes de formation de vias dans un procédé de réalisation d'isolement par air intra et inter-métallique selon l'invention ;
  • figures 4a et 4b, schématiquement, les principales étapes de formation d'un isolement inter et intra-métallique par air, après formation des vias, selon une première réalisation du procédé de l'invention ; et
  • figures 5a à 5d, schématiquement, les différentes étapes de réalisation d'un isolement inter et intra-métallique par air, après formation des vias, selon une autre réalisation du procédé de l'invention.
The remainder of the description refers to the appended figures which represent respectively:
  • FIGS. 1a to 1f diagrammatically, the main steps for producing an intra-metallic air insulation according to the method of the invention;
  • Figures 2a to 2d, schematically the main steps of achieving a mixed intra-metallic insulation by air and using a conventional solid insulation material;
  • FIGS. 3a to 3i, schematically, the main stages of formation of vias in a process for producing intra- and inter-metallic air insulation according to the invention;
  • Figures 4a and 4b, schematically, the main steps of forming an inter and intra-metallic isolation by air, after formation of the vias, according to a first embodiment of the method of the invention; and
  • FIGS. 5a to 5d, schematically, the various stages of performing inter and intra-metallic isolation by air, after formation of the vias, according to another embodiment of the method of the invention.

En se référant aux figures 1a à 1f on va maintenant décrire une application du procédé de l'invention à la réalisation d'un isolement intra-métallique par air.Referring to Figures 1a to 1f will now be described an application of the method of the invention to achieve an intra-metallic isolation by air.

Après avoir formé de façon classique sur un substrat 10 qui peut être un substrat, semi-conducteur de silicium recouvert d'une couche d'un isolant configuré (contacts ou vias) ou un niveau de métallisation d'un circuit intégré recouvert d'une couche d'un isolant configuré (contacts ou vias), les éléments métalliques conducteurs 11, on procède, comme le montre la figure 1a, au dépôt, par exemple par dépôt chimique en phase vapeur, d'une couche de germanium et au polissage mécano-chimique de cette couche pour remplir les espaces inter-connexions entre les éléments métalliques 11 avec du germanium polycristallin 12.After forming conventionally on a substrate 10 which may be a silicon semiconductor substrate covered with a layer of a configured insulator (contacts or vias) or a metallization level of an integrated circuit covered with a layer of a configured insulator (contacts or vias), the conductive metal elements 11, is carried out, as shown in Figure 1a, the deposition, for example by chemical vapor deposition, a layer of germanium and mechanical polishing -chemical of this layer to fill the inter-connection spaces between the metal elements 11 with polycrystalline germanium 12.

Facultativement, préalablement au dépôt du germanium polycristallin 12, on peut déposer sur les éléments métalliques conducteurs 11 et la surface libre du substrat 10 un mince film de protection, tel qu'un film de SiO2 de 5 à 50 nm d'épaisseur typiquement de l'ordre de 20 nm d'épaisseur. Le dépôt de ce film de protection peut se faire de toute manière classique, par exemple par dépôt chimique en phase vapeur (CVD) ou dépôt physique en phase vapeur (PVD). Ce mince film de protection a pour but essentiel de protéger les éléments métalliques 11 lors des étapes ultérieures de réalisation du circuit intégré. La présence de ce film d'oxyde de protection permet également de réaliser de manière classique le polissage mécano-chimique du germanium polycristallin déposé avec arrêt sur la couche d'oxyde.Optionally, prior to the deposition of the polycrystalline germanium 12, a thin protective film, such as a SiO 2 film 5 to 50 nm thick, can be deposited on the conductive metal elements 11 and the free surface of the substrate 10. the order of 20 nm thick. The deposition of this protective film can be done in any conventional manner, for example by chemical vapor deposition (CVD) or physical vapor deposition (PVD). This thin protective film has the essential purpose of protecting the metal elements 11 during the subsequent steps of producing the integrated circuit. The presence of this protective oxide film also makes it possible, in a conventional manner, to chemically-mechanically polish the polycrystalline germanium deposited with a stop on the oxide layer.

On dépose ensuite de manière classique, comme le montre la figure 1b, un mince film de matériau isolant 13, par exemple un mince film de SiO2 déposé par dépôt chimique en phase vapeur de façon à recouvrir avec ce film les éléments métalliques 11 éventuellement déjà revêtus d'un film d'oxyde de protection et le germanium polycristallin 12 déposé dans les espaces inter-connexions.Then, in a conventional manner, as shown in FIG. 1b, a thin film of insulating material 13 is deposited, for example a thin film of SiO 2 deposited by chemical vapor deposition so as to cover with this film the metal elements 11 possibly already coated with a protective oxide film and polycrystalline germanium 12 deposited in the inter-connection spaces.

On forme ensuite, toujours de manière classique, un masque d'une résine photo-résistante 14 sur le film de matériau isolant 13 (figure 1c). Comme le montre la figure 1d on procède alors à la gravure du film isolant 13, par exemple une gravure anisotrope classique d'un film de SiO2, et au retrait également classique du masque de résine photo-résistante 14. La gravure du film isolant 13 conduit à la formation d'un évidement faisant apparaître le germanium polycristallin 12 entre les éléments métalliques 11.Then, in a conventional manner, a mask of a photo-resistant resin 14 is formed on the film of insulating material 13 (FIG. 1c). As shown in FIG. 1d, the insulating film 13 is then etched, for example a conventional anisotropic etching of an SiO 2 film , and the conventional removal of the photoresist resin mask 14. The etching of the insulating film 13 leads to the formation of a recess showing the polycrystalline germanium 12 between the metal elements 11.

Comme le montre la figure le, on procède alors au retrait du germanium, par exemple par action d'une solution oxydante telle que de l'eau, une solution d'eau oxygénée, une solution diluée d'acide sulfurique ou encore au moyen d'un plasma oxydant tel qu'un plasma d'oxygène ou d'ozone pour obtenir un espace inter-connexion rempli d'air 15.As shown in Figure 1c, the germanium is then removed, for example by the action of an oxidizing solution such as water, a solution of hydrogen peroxide, a dilute solution of sulfuric acid or by means of an oxidizing plasma such as an oxygen or ozone plasma to obtain an inter-connection space filled with air 15.

Il n'est pas nécessaire de retirer le masque de résine photo-résistante 14 avant le retrait du germanium polycristallin 12, mais ce retrait de la résine photo-résistante pourrait tout aussi bien s'effectuer après le retrait du germanium polycristallin ou simultanément avec celui-ci. Ce retrait de la résine peut se faire de manière classique, par exemple au moyen d'un plasma d'oxygène ou d'ozone.It is not necessary to remove the photoresist resin mask 14 before the removal of the polycrystalline germanium 12, but this removal of the photoresist resin could equally well be carried out after the removal of the polycrystalline germanium or simultaneously with the -this. This removal of the resin can be done in a conventional manner, for example by means of an oxygen or ozone plasma.

On effectue ensuite le dépôt et le recuit de manière classique d'un film d'isolation 16, par exemple un mince film de SiO2, SiOF ou d'hydrure de silsesquioxane (HSQ) comme représenté à la figure 1f.The deposition and annealing are then carried out in a conventional manner with an insulating film 16, for example a thin film of SiO 2 , SiOF or of silsesquioxane hydride (HSQ) as represented in FIG. 1f.

On peut alors poursuivre la fabrication du circuit intégré de manière classique, par exemple par dépôt et polissage mécano-chimique d'une couche d'encapsulation, telle qu'une couche formée à partir de tétraorthosilicate d'éthyle (TEOS) puis en procédant aux étapes standards.It is then possible to continue the fabrication of the integrated circuit in a conventional manner, for example by deposition and chemical-mechanical polishing of an encapsulation layer, such as a layer formed from ethyl tetraorthosilicate (TEOS) and then proceeding with the standard steps.

Afin d'éviter que l'espace inter-connexion 15 soit rempli avec le matériau du mince film d'isolation 16 et de la couche d'encapsulation, on peut soit régler la viscosité des compositions de dépôt ou encore régler la dimension des ouvertures gravées. Ainsi, avec des ouvertures gravées de dimension au plus égale à 0,2 µm on évite le remplissage des espaces inter-connexions avec les matériaux des couches ultérieures.In order to prevent the inter-connection space 15 from being filled with the material of the thin insulating film 16 and the encapsulation layer, it is possible either to adjust the viscosity of the depositing compositions or else to adjust the size of the etched openings. . Thus, with etched openings of dimension at most equal to 0.2 microns, the inter-connection spaces are not filled with the materials of the subsequent layers.

On va maintenant décrire en liaison avec les figures 2a à 2d la réalisation d'un isolement mixte par air et au moyen d'un matériau isolant solide selon le procédé de l'invention.We will now describe in connection with Figures 2a to 2d the realization of a mixed insulation by air and by means of a solid insulating material according to the method of the invention.

Comme décrit précédemment, le procédé débute éventuellement par le dépôt d'une mince couche de protection, par exemple en oxyde de silicium, sur les éléments métalliques 11, puis on procède au dépôt d'une couche de germanium polycristallin et au polissage mécano-chimique de cette couche, avec éventuellement arrêt sur oxyde lorsque la couche de protection d'oxyde silicium est présente, pour remplir les espaces inter-connexions entre les éléments métalliques 11 avec du germanium polycristallin 12. Comme précédemment également, on forme alors successivement, comme le montre la figure 2a un mince film de matériau isolant 13, par exemple un mince film d'oxyde de silicium, puis un masque de résine photo-résistante 14 présentant des ouvertures 14a, 14b de dimensions différentes.As described above, the process optionally begins with the deposition of a thin protective layer, for example silicon oxide, on the metal elements 11, then the deposition of a layer of polycrystalline germanium and chemical mechanical polishing of this layer, with possibly stopping on oxide when the silicon oxide protective layer is present, to fill the inter-connection spaces between the metal elements 11 with polycrystalline germanium 12. As previously also, then is formed successively, as the FIG. 2a shows a thin film of insulating material 13, for example a thin film of silicon oxide, then a photoresist resin mask 14 having openings 14a, 14b of different dimensions.

On procède alors comme précédemment à la gravure du mince film d'oxyde de silicium 13 et au retrait du masque de résine photo-résistante 14 de manière à former dans le mince film d'oxyde de silicium 13 des ouvertures de tailles différentes 13a et 13b en regard du germanium polycristallin déposé entre les éléments métalliques conducteurs 11 (figure 2b).As before, the etching of the thin silicon oxide film 13 and the removal of the photoresist resin mask 14 are carried out so as to form openings of different sizes 13a and 13b in the thin silicon oxide film 13. facing the polycrystalline germanium deposited between the conductive metal elements 11 (Figure 2b).

Ainsi, par exemple, l'ouverture 13a peut être de très petite taille (≤ 0,2 µm) et l'ouverture 13b de grande taille (>> 0,2 µm).Thus, for example, the opening 13a may be very small (≤ 0.2 μm) and the opening 13b large (>> 0.2 μm).

Comme le montre la figure 2c, on effectue alors comme précédemment le retrait du germanium polycristallin.As shown in FIG. 2c, then, as previously, the polycrystalline germanium is removed.

On pourrait tout aussi bien procéder au retrait du masque de résine photo-résistante après le retrait du germanium polycristallin ou simultanément avec celui-ci.It would also be possible to remove the photoresist mask after removal of the polycrystalline germanium or simultaneously with it.

Enfin, on procède au dépôt et recuit classiques d'une couche 16 de matériau isolant, par exemple une couche d'oxyde de silicium, de SiOF ou d'hydrure de silsesquioxane (HSQ), qui, comme le montre la figure 2d du fait de la différence de dimensions des ouvertures 13a et 13b, ne pénètre pas par l'ouverture de plus petite dimension 13a, fermant ainsi l'espace inter-connexion et réalisant une isolation par air, cependant qu'il va pénétrer par la plus grande ouverture 13b et réaliser une isolation en matériau solide de l'autre espace inter-connexion comme on le voit sur la figure 2d.Finally, conventional deposition and annealing of a layer 16 of insulating material, for example a layer of silicon oxide, SiOF or silsesquioxane hydride (HSQ), which, as shown in FIG. of the difference in size of the openings 13a and 13b, does not penetrate through the opening of smaller dimension 13a, thus closing the inter-connection space and providing isolation by air, while it will penetrate through the largest opening 13b and achieve a solid material insulation of the other inter-connection space as seen in Figure 2d.

On procède alors généralement de manière classique au dépôt d'une couche d'encapsulation, par exemple de tétraorthoéthylsilicate et polissage mécano-chimique de cette couche puis on achève le circuit intégré de manière standard.This is usually done in a conventional manner the deposition of an encapsulation layer, for example of tétraorthoéthylsilicate and mechano-chemical polishing of this layer and then the integrated circuit is completed in a standard manner.

On va maintenant décrire en liaison avec les figures 3a à 3i, 4a, 4b et 5a à 5d, la réalisation d'un isolation par air intra et inter-métallique.We will now describe in connection with Figures 3a to 3i, 4a, 4b and 5a to 5d, the realization of an intra- and inter-metallic air insulation.

Comme cela est bien connu, la connexion électrique nécessaire entre des éléments métalliques conducteurs de différents niveaux de métallisation du circuit intégré s'effectue au moyen de "vias", c'est-à-dire de passages remplis de métal reliant électriquement des éléments métalliques d'un niveau de métallisation à ceux correspondant d'un niveau adjacent de métallisation.As is well known, the necessary electrical connection between conductive metal elements of different metallization levels of the integrated circuit is effected by means of "vias", that is to say of passages filled with metal electrically connecting metallic elements. from a metallization level to those corresponding to an adjacent level of metallization.

On va maintenant décrire en liaison avec les figures 3a à 3i la réalisation de tels vias dans un procédé selon l'invention.We will now describe in connection with Figures 3a to 3i the realization of such vias in a method according to the invention.

La réalisation de vias selon l'invention débute par le dépôt d'une couche 32i de germanium polycristallin sur la surface d'un substrat 30 qui peut être, soit un substrat semi-conducteur de silicium revêtu d'une couche d'isolant configuré (contacts ou vias), soit un niveau de métallisation inférieur, et comportant des éléments métalliques conducteurs 31i (figure 3a). Le dépôt de germanium polycristallin 32i peut s'effectuer classiquement par dépôt chimique en phase vapeur et est généralement suivi par un polissage mécano-chimique. Toutefois, la couche de germanium polycristallin déposée doit être suffisamment épaisse pour permettre la réalisation de vias entre deux niveaux de métallisation successifs. C'est-à-dire que non seulement la couche de germanium polycristallin rempli les espaces inter-connexions mais elle recouvre les éléments métalliques 31i avec une épaisseur suffisante pour pouvoir y former des vias, typiquement de l'ordre de 1 µm.The embodiment of vias according to the invention starts with the deposition of a layer 32i of polycrystalline germanium on the surface of a substrate 30 which can be either a silicon semiconductor substrate coated with a layer of insulator configured ( contacts or vias), or a lower level of metallization, and comprising conductive metal elements 31i (Figure 3a). The polycrystalline germanium deposit 32i can be conventionally carried out by chemical vapor deposition and is generally followed by a chemical mechanical polishing. However, the layer of polycrystalline germanium deposited must be sufficiently thick to allow the realization of vias between two successive metallization levels. That is to say that not only the polycrystalline germanium layer filled the inter-connection spaces but it covers the metal elements 31i with a sufficient thickness to be able to form vias, typically of the order of 1 micron.

On procède alors comme le montre la figure 3b au dépôt d'une couche d'arrêt 33i, par exemple une couche de nitrure de silicium (Si3N4), qui peut être déposée par exemple par dépôt chimique en phase vapeur assistée par plasma, puis au dépôt, de manière classique d'une couche 34i, par exemple une couche d'oxyde de silicium, servant à la formation d'un masque dur.As is shown in FIG. 3b, the deposition of a barrier layer 33i, for example a nitride layer, is carried out. silicon (Si 3 N 4 ), which can be deposited for example by plasma-assisted chemical vapor deposition, and then deposited, in a conventional manner, with a layer 34i, for example a layer of silicon oxide, used for formation of a hard mask.

Comme le montre la figure 3c on réalise alors sur la couche 34i un masque de résine photo-résistante 35i.As shown in FIG. 3c, a photoresist resin mask 35i is then produced on the layer 34i.

De manière classique on procède alors comme le montre la figure 3d à la gravure de la couche 34i avec arrêt sur la couche d'arrêt 33i et au retrait du masque de résine, pour former un masque dur.Conventionally, then, as shown in FIG. 3d, the etching of the layer 34i with stopping on the stop layer 33i and the removal of the resin mask is carried out so as to form a hard mask.

On procède ensuite comme le montre la figure 3e à la gravure de la couche d'arrêt 33i et de la couche de germanium 32i pour former le passage ou via 36i jusqu'à l'élément métallique conducteur 31i.The etching of the barrier layer 33i and the germanium layer 32i is then carried out as shown in FIG. 3e to form the passage or via 36i to the conductive metal element 31i.

On effectue alors de manière classique le dépôt d'une couche 37i de protection du via 36i, par exemple une mince couche d'oxyde de silicium, puis aux dépôts successifs de couches de protection du via, par exemple une couche de titane 38i avec une phase d'attaque de l'oxyde au fond de via et une couche de nitrure de titane 39i, et enfin on remplit le via avec du métal, par exemple du tungstène 40i (figures 3f et 3g).The deposition of a protection layer 37i via via 36i, for example a thin layer of silicon oxide, is then conventionally carried out, and then with the successive layers of protection layers via via, for example a titanium layer 38i with a etching phase of the oxide at the bottom of via and a layer of titanium nitride 39i, and finally one fills the via with metal, for example tungsten 40i (Figures 3f and 3g).

A ce stade comme le montre la figure 3h, on procède au polissage mécano-chimique avec arrêt sur la couche d'arrêt 33i de façon à faire apparaître le via rempli de métal 40i.At this stage, as shown in FIG. 3h, chemical mechanical polishing is carried out with stopping on the barrier layer 33i so as to reveal the metal filled via 40i.

La réalisation de vias décrite ci-dessus est classique à l'exception de l'emploi de couches du germanium polycristallin.The embodiment of vias described above is conventional except for the use of layers of polycrystalline germanium.

Bien évidemment le procédé de gravure des vias utilisé doit permettre la gravure anisotrope de germanium polycristallin. Un procédé de gravure du germanium polycristallin comprend l'utilisation d'un plasma gazeux haute densité d'un mélange de gaz Cl2 et, soit N2 ou NH3, soit un mélange N2/NH3.Of course the method of burning vias used should allow the anisotropic etching of polycrystalline germanium. A process for etching polycrystalline germanium comprises the use of a high-density gas plasma of a mixture of Cl 2 gas and either N 2 or NH 3 or an N 2 / NH 3 mixture.

Comme le montre alors la figure 3i, on réalise de manière classique des éléments métalliques conducteurs 31i + 1 du niveau de métallisation immédiatement supérieur i + 1.As is then shown in FIG. 3i, conductive metal elements 31i + 1 of the metallization level immediately above i + 1 are conventionally produced.

Deux voies s'offrent alors pour réaliser les niveaux de métallisation successifs et l'isolement par air selon l'invention.Two ways are then available to achieve the successive metallization levels and the air insulation according to the invention.

Selon une première voie illustrée aux figures 4a et 4b, on procède à une étape de gravure de la couche d'arrêt 33i du niveau de métallisation i pour faire apparaître le germanium polycristallin 32i sous-jacent (figure 4a) puis on dépose, par dépôt chimique en phase vapeur comme précédemment une nouvelle couche de germanium polycristallin 32i + 1 pour le niveau de métallisation i + 1 analogue à la couche de germanium 32i du niveau de métallisation i puis on procède à la formation de vias pour le niveau supérieur i + 2 comme indiqué ci-dessus. On répète cette opération autant de fois que nécessaire pour obtenir le nombre de niveaux de métallisation voulu.According to a first path illustrated in FIGS. 4a and 4b, proceeds to a step of etching the barrier layer 33i of the metallization level i to reveal the underlying polycrystalline germanium 32i (FIG. 4a), and then a new layer of polycrystalline germanium is deposited by chemical vapor deposition as before. 32i + 1 for the metallization level i + 1 analogous to the germanium layer 32i of the metallization level i, then the formation of vias for the upper level i + 2 is carried out as indicated above. This operation is repeated as many times as necessary to obtain the desired number of metallization levels.

Une fois tous les niveaux de métallisation formés, les dépôts de germanium polycristallin de tous les niveaux de métallisation forment une masse unitaire jusqu'au niveau supérieur terminal et on procède en une seule fois à l'élimination de toute la masse de germanium. Cette élimination peut se faire comme précédemment au moyen d'une chimie oxydante.Once all the metallization levels have been formed, the polycrystalline germanium deposits of all the metallization levels form a unit mass up to the upper terminal level and the entire mass of germanium is removed at once. This elimination can be done as previously by means of oxidative chemistry.

On procède alors à l'achèvement du circuit intégré, par exemple en déposant une couche d'encapsulation sur le dernier niveau de métallisation réalisant ainsi une isolation par air inter et intra-métallique de tous les niveaux de métallisation.The integrated circuit is then completed, for example by depositing an encapsulation layer on the last level of metallization thus achieving inter and intra-metal air insulation of all the metallization levels.

En variante, comme le montrent les figures 5a à 5d, on peut après gravure de la couche d'arrêt 33i déposer une couche isolante mince, par exemple une couche d'oxyde de silicium, 41i + 1 (figure 5a) puis former sur cette couche isolante un masque de résine 42i + 1 et procéder de manière classique à la gravure de la couche isolante (figure 5b).Alternatively, as shown in FIGS. 5a to 5d, it is possible after etching of the barrier layer 33i to deposit a thin insulating layer, for example a layer of silicon oxide, 41i + 1 (FIG. 5a) and then to form on this insulating layer a 42i + 1 resin mask and proceed in a conventional manner to the etching of the insulating layer (Figure 5b).

A ce stade comme le montre la figure 5c, on procède à l'enlèvement du masque de résine et au retrait du germanium.At this stage, as shown in FIG. 5c, the resin mask is removed and the germanium is removed.

On procède alors comme le montre la figure 5d au dépôt d'une couche de protection, par exemple d'oxyde 43i + 1 pour fermer les espaces inter-connexions et réaliser l'isolation par air.As shown in FIG. 5d, the deposition of a protective layer, for example oxide 43i + 1, is then used to close the inter-connection spaces and to achieve the air insulation.

On peut alors procéder à la réalisation du niveau de métallisation i + 2 en répétant les étapes de formation de vias illustrées par les figures 3a à 3i et de formation de l'isolation par air illustrées par les figures 5a à 5d. Dans ce cas, on procède à la formation de l'isolation par air niveau de métallisation par niveau de métallisation.It is then possible to carry out the metallization level i + 2 by repeating the vias formation steps illustrated in FIGS. 3a to 3i and forming the air insulation illustrated in FIGS. 5a to 5d. In this case, we proceed to the formation of the air insulation metallization level by level of metallization.

Bien évidemment, dans la mise en oeuvre du procédé illustré par les figures 5a à 5d, on peut obtenir une isolation mixte par air et par matériau isolant comme décrit précédemment.Of course, in the implementation of the method illustrated in FIGS. 5a to 5d, mixed insulation can be obtained by air and by insulating material as previously described.

Claims (12)

  1. Process for achieving intermetallic and/or intrametallic isolation between at least some of the conducting metal elements (11) of the metallization levels of an integrated circuit, characterized in that it comprises the deposition of polycrystalline germanium (12) in at least some of the interconnect spaces between the said conducting metal elements and the removal of the germanium in order to form air-filled interconnect spaces (15) between the conducting metal elements.
  2. Process according to Claim 1, characterized in that it comprises, prior to the deposition of polycrystalline germanium, the deposition of an insulating layer in order to protect the metal elements (11) from direct contact with the polycrystalline germanium.
  3. Process according to Claim 1 or 2, for achieving intrametallic air isolation between conducting metal elements (11) of the same metallization level, characterized in that it comprises:
    (1) the deposition of polycrystalline germanium (12) in the interconnect spaces between the metal elements (11);
    (2) the deposition of a layer of an insulation material (13) on the metal elements (11) and on the polycrystalline germanium (12);
    (3) the formation of a photoresist resin mask (14) on the layer of insulation material (13);
    (4) the anisotropic etching of the layer of insulation material (13) in order to form apertures in this layer (13) which are opposite the polycrystalline germanium (12); and
    (5) the removal of the polycrystalline germanium (12) in order to produce air-filled interconnect spaces (15).
  4. Process according to Claim 3, characterized in that it furthermore comprises the removal of the resin mask (14) before or after the polycrystalline germanium (12) has been removed, or simultaneously with this removal.
  5. Process according to Claim 3 or 4, characterized in that it comprises the deposition of a layer of an insulating encapsulation material in order to close off the interconnect spaces (15).
  6. Process according to Claim 5, characterised in that the layer of insulating encapsulation material is deposited in such a way that some of the interconnect spaces (15) are filled with the insulating encapsulation material.
  7. Process according to Claim 1, for achieving intermetallic and intrametallic air isolation between at least some of the conducting metal elements of the metallization levels of an integrated circuit, characterized in that it comprises:
    (1) the deposition of polycrystalline germanium (32i) between and on the conducting metal elements (31i) of a metallization level (i);
    (2) the formation, for this metallization level (i), of the desired metal vias (40i), this formation of the vias having the result of leaving a layer of insulating material (33i) on the surface of the deposited layer of polycrystalline germanium (32i);
    (3) the formation of the conducting metal elements (31i + 1) of an adjacent metallization level (i + 1) on the surface of the layer of insulating material (33i) covering the deposited layer of germanium (32i);
    (4) the etching of the layer of insulating material (33i) covering the surface of the deposited layer of germanium (32i) in order to expose the deposited layer of germanium (32i) at selected places between the metal elements (31i + 1) of the adjacent metallization level (i + 1);
    (5) the repetition of steps (1) to (4) until the desired number of metallization levels is obtained, so as to obtain a stack of the desired number of metallization levels, in which stack the deposited layers of germanium form a mass of germanium that is uninterrupted as far as the surface of the stack; and
    (6) the removal of the uninterrupted mass of germanium in order to form air-filled interconnect spaces.
  8. Process according to Claim 7, characterized in that it comprises the deposition of a layer of an insulating encapsulation material on the surface of the outermost metallization level in order to close off the interconnect spaces.
  9. Process according to Claim 1, for achieving intermetallic and intrametallic air isolation between at least some of the conducting metal elements of the metallization levels of an integrated circuit, characterized in that it comprises:
    (1) the deposition of polycrytalline germanium (32i) between and on the conducting metal elements (31i) of a metallization level (i);
    (2) the formation, for this metallization level (i), of the desired metal vias (40i), this formation of the vias having the result of leaving a layer of insulating material (33i) on the surface of the deposited layer of polycrystalline germanium (32i);
    (3) the formation of the conducting metal elements (31i + 1) of an adjacent metallization level (i + 1) on the surface of the layer of insulating material (33i) covering the deposited layer of germanium (32i);
    (4) the etching of the layer of insulating material (33i) covering the surface of the deposited layer of germanium (32i) in order to expose the deposited layer of germanium (32i) at selected places between the metal elements (31i + 1) of the adjacent metallization level (i + 1);
    (5) the removal of the germanium in order to form air-filled interconnect spaces in the metallization level (i) ;
    (6) the deposition of a layer of insulating intermetallic material (42i + 1) in order to close off the air-filled interconnect spaces of the metallization level (i);
    (7) the repetition of steps (1) to (6) until a stack of the desired number of metallization levels having air-filled interconnect spaces is obtained.
  10. Process according to any one of Claims 1 to 9, characterized in that the removal of the polycrystalline germanium entails bringing the germanium into contact with an oxidizing solution at a temperature ranging from room temperature to 200°C.
  11. Process according to Claim 10, characterized in that the oxidizing solution is water, an aqueous hydrogen peroxide solution or a dilute aqueous H2SO4 solution.
  12. Process according to any one of Claims 1 to 9, characterized in that the polycrystalline germanium is removed by means of an oxygen or ozone plasma.
EP99402414A 1998-10-05 1999-10-01 Method of manufacturing an inter- or intra-metal dielectric comprising air in an integrated circuit Expired - Lifetime EP1014439B1 (en)

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FR9812444 1998-10-05
FR9812444A FR2784230B1 (en) 1998-10-05 1998-10-05 METHOD FOR PRODUCING INTER AND / OR INTRA-METALLIC AIR INSULATION IN AN INTEGRATED CIRCUIT AND INTEGRATED INTEGRATED CIRCUIT

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EP1014439B1 true EP1014439B1 (en) 2007-03-07

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US6812113B1 (en) 2004-11-02
FR2784230B1 (en) 2000-12-29
DE69935401T2 (en) 2007-11-29
JP4677068B2 (en) 2011-04-27
FR2784230A1 (en) 2000-04-07
DE69935401D1 (en) 2007-04-19
EP1014439A1 (en) 2000-06-28
JP2000114364A (en) 2000-04-21

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