APPLIANCENON-USEDETECTIONSAFETYPOWERSHUT-OFFSYSTEM
BACKGROUND OF THE INVENTION
Field of the Invention
This invention relates to electrical appliances of the type which use a heater element and in particular to a structure which automatically shuts off the device in response to non-use.
Description of the Prior Art
Many electrical appliances and tools of the type which incorporate a heater element (such as clothes, irons, electric hair curlers, and soldering irons) are a fire hazard when left ' unattended. Unattended operation, whether intentional or not, also wastes energy. There is
* clearly a need for a device which eliminates the fire hazard and energy waste of unattended appliances.
SUMMARY OF THE INVENTION
This invention solves the above-mentioned problems by detecting the last use of an energized appliance and shutting off the appliance after a given time has- elapsed from this last use without further use. An audible and/or visual indication is provided to alert the user that the appliance has been turned off as a result of non-use over the selected time interval. In one embodiment another audible or visual indication is activated prior to the actual power removal from the appliance to warn the user that the appliance will be turned off unless used.
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BRIEF DESCRIPTION OF THE DRAWINGS
Figure 1 is a schematic diagram of one embodiment of the invention using a timer formed either as a separate element or as an integral part of the appliance.
Figure 2 shows the invention embodied as a separate timer accessory used with a clothes iron.
Figure 3 shows the invention embodied as an integral part of a clothes iron.
Figure 4 shows the invention embodied as a separate timer accessory.
DETAILED DESCRIPTION OF TEE INVENTION
Shown in Figure 1 is a schematic of one timing circuit constructed in accordance with this invention. Those skilled in the arts will recognize that other circuits can also be constructed in accordance with this invention and thus this description is illustrative only and not limiting. The circuit of Figure 1 establishes a time interval during which the controlled appliance must be used and this use sensed. If the timer circuit fails to detect use in this interval, it shuts off the power to the appliance. The appliance use-detector and timer (UDT) is implemented in either of two basic forms. The. UDT can be separate from the appliance to be controlled or it can be incorporated into the appliance at the time of manufac¬ ture. Thus, while in Figure 1 the main portion of the UDT circuit 1 is separate from the appliance 49 to be con¬ trolled, with two minor changes described below, circuit 1 can be formed as an integral part of appliance 49.
A.C. input voltage is supplied to both the UDT 1 and the appliance 49 from the input lines 46 and 47. Triac 45
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is a gate-controlled thyristor which, in its conducting state, allows the input line voltage, minus a small voltage drop, V j . to be applied to the appliance 49 at lines 57 and 58. When triac 45 is in a conducting state and switch 50 and thermostat switch 52 are both closed, current flows through the resistive load 53. Resistor 53 represents the electrical load being controlled, such as a heater element, or any other appropriate load. Power supply 25, connected to input voltage lines 46 and 47, provides the voltage V+ necessary for the UDT 1.circuitry.
Master oscillator 12 (of a well-known design) produces an output waveform 13 with a frequency of approximately one-half hertz which is used to clock counter "A" 15, counter "B" 9, and counter "C" 37, and to modulate the visual indicator 54 and audio oscillator 27. Counter "A" 15 is the primary delay timer and establishes the period during which appliance activity must be detected to prevent a power shutdown sequence from being initiated. Counter "B" 9 provides an intermediate delay which is less than the shortest delay of counter "A" 15 if no current through load 53 is sensed within the given delay of counter **B" 9. The use of counter 9 is only necessary when the UDT 1 is separate from (i.e., not part of) the controlled appliance 49.
Since counter "A" 15 only counts when power switch 50 of appliance 49 power is on (i.e., closed), it is necessary for the UDT 1 to have some means of sensing such a condi¬ tion without having access to point 51 at the output of switch 50. UDT 1 can only determine when the appliance 49 is on or off by detecting current flow through the load 53. If the current through load 53 is thermostatically controlled as shown using thermostat 52 the load current will only be present on an intermittent basis. By establishing the timing period of counter "B" 9 to be greater than the maximum thermostat 52 cycle time it is
possible to_•determine if the appliance switch 50 is on or off. The presence of current through the appliance 49 is detected by sensing the voltage drop across triac 45. Such a voltage drop V . , although relatively small, is present even though the triac 45 is conducting. When measuring voltage V . it should be noted that point "a" is the same potential as A.C. common 46. Thus the voltage V . is rectified by diode 35, filtered by capacitor 32 and amplified by operational amplifier 28. Diode 31 clamps the magnitude of voltage at the (+) terminal of amplifier 28 to a maximum of the supply voltage V+. Resistor 34 acts as a_current limit for the condition when the input voltage V . exceeds supply voltage V+, and resistor 33 provides a ground return path for filter capacitor 32. Resistors 29 and 30 act as a voltage divider which, in the absence of sufficient input voltage to the (÷) terminal of amplifier 28, causes the output of amplifier 28 to drop to a near zero volt level. This low voltage level acts as a logic "0" input to OR gate 7 and NAND gate 18. When there is current through the appliance 49 circuit, V , will cause the output of amplifier 28 to become positive, thus producing a logic "1" level to gates 7 and 18.
In order to explain the UDT 1 circuity it is best to consider the typical sequence of events for the various operating modes. First consider the mode in which the UDT 1, as a separate system, is connected in the circuit of appliance 49, and the appliance on-off switch 50 is closed, thereby completing the circuit through thermostat 52 and resistor 53. When voltage is first applied to points 46 and 47, as would be the case when an electrical plug, connected to these points, is inserted in a standard wall outlet, the output V+ of power supply 25 will abruptly change from zero to its prescribed value. The abrupt rise of V+ will be differentiated by capacitor 5 and resistor 4 such that a momentary positive pulse waveform 3 will be present at the junction of 4 and 5. This pulse acts as a
power-up reset for counter "A" 15 via OR gates 6 and 10; for counter "B" 9 via OR gates 6 and 7; for counter "C" 37 via OR gate 6; for bistable latch circuit comprised of NAND gates 19 and 21 via OR gate 6 and inverter 20; and finally for the bistable latch circuit comprised of NOR gates 39 and 40 via OR gate 6. Thus, the three counters 15, 9 and 37 are reset to zero causing each counter output to be at a "O" logic level. At the completion of reset, the output signal from NAND gate 19 will be at logic "0" holding the output of NAND gate 22 at logic "1" and, in turn, the output of inverter 23 at logic "0". This low level signal from inverter 23 allows current to flow from V+ through light-emitting diode (LED) 54 and resistor 24. In response to this current LED 54 will glow constantly to indicate that power is applied to the UDT circuitry.
The "0" level at the output of inverter 23 will also hold the output of NAND gate 26 at logic 1, which inhibits the audio oscillator•27 thereby preventing transducer 55 from producing sound. As previously noted, the power-up reset pulse causes the output of NOR gate 40 to go to a logic "0" level and, along with the "0" output from counter ■*C" 37, produces a "O" level signal at the output lead of inverter 41. The output lead from inverter 41 is connected to a light emitting diode in optical coupler 43. The LED of the optical coupler integrated circuit 43 will normally produce light due to the current from V+ through resistor 42. Optical coupler 43 is a device such as MOC 3011 made by Motorola, which, when the LED is on, produces light which impinges on the light sensitive gate of an internal triac, causing the triac to conduct. In this way as the voltage V . increases sinusoidally, the value of V . will produce gate current through resistor 56, the triac of coupler 43, and the gate 44 of triac 45. When this gate current reaches a value sufficient to trigger the thyristor action of triac 45 the device will latch in a conducting mode for the remainder of each A.C. half-cycle. Of course,
coupler 43 can be replaced by any one of a number of different structures, such as an electro-mechanical reed relay, or a circuit for pulsing the gate of triac 45 so as to control the conductive state of this triac in response to the state of bistable circuit comprising gates 39 and 40.
Thus, when the initial power-up sequence has been established counter "A" 15 will begin counting input waveform 13 transitions which are applied via NOR gate 14. The time delay switch 16 allows manual selection of an appropriate time* interval during which the appliance 49 must be used. Assume for the present that switch 16 is in the position shown, namely a fifteen minute delay. A logic "0" signal will exist at the junction of the wiper arm of switch 16 and resistor 17. This "0" level signal will hold the output of NAND gate 18 at a logic "1".
Next, assume that counter "B" 9 is being reset, as previously described, by the intermittent positive output of amplifier 28 which occurs as a result of current being thermostatically cycled through the load 53. In this way counter "B" 9 will not reach a count which would cause its output to go to a logic "1" and, therefore, reset counter "A" 15.
As counter "A" 15 continues to count, it may be reset to zero by a positive waveform 8 from the use-detector 2. Use-detector 2 can consist of various means of detecting that the appliance 49 has been used either by sensing either motion of the appliance 49 or sensing the grasping or handling of the appliance 49 by the user. "The actual implementation of the use-detector 2 will be more clearly understood during the discussion of Figures 2, 3 and 4. For the present it should suffice to indicate that each time appliance 49 is used, waveform 8 will be positive, thereby resetting- all the counters 15, 9 and 37 and
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latches covered by the power-up reset pulse. Use detector 2 (such as a switch in the handle of appliance 49 or an accelerometer) is such that when appliance 49 is no longer being used, waveform 8 will once again return to zero, which releases counters "A" 15 and "B" 9 to proceed from a zero count.
Next, consider the situation in which no appliance use is detected during the time delay interval selected by switch 16. At the end of the selected fifteen minute interval the output of counter "A" 15, and therefore the corresponding input to NAND gate 18, will go to a logic "1". Note that this positive output will also be impressed at one input of NOR gate 14, which inhibits any further clock waveforms 13 being applied to counter "A" 15. The next .positive output from amplifier 28, when applied to the other input of NAND gate 18 will now cause the output of NAND gate 18 to go to logic "0". It is necessary to use the output signal from amplifier 28 in order to establish that appliance 49 is still on and has not been turned off by switch 50 during the counting interval of counter "A" 15. The logic "0" level from the output of NAND gate 18, when applied to input 19a of NAND gate 19, will cause the output signal from gate 19 to go to logic "1". The other input leads to gate 19 are high level. With both input signals to NAND gate 21 at logic "1" its output will go to "0, thus latching the bistable circuit comprising NA ) gates 19 and 21 via the input 19c of NAND gate 19.
The system has now entered the warning phase of operation in that the logic "1" signal at the Output lead of NAND gate 19 will allow the clock waveform 13 to be coupled through NAND gate 22 causing its output signal , and therefore the output signal from inverter 23, to go alternately high and low at the clock rate. This resulting alternating signal will cause LED 54 to blink on
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and off. Likewise, the inhibiting signal to the audio oscillator 27 will go alternately high and low since the output of NAND gate 26 will alternate, producing a beeping sound from the audio transducer 55. Counter "C" 37 will count the clock transitions from the output lead of inverter 23 for a period of, say, fifteen seconds to .allow the user time to activate the use-detector 2 in order to prevent a shutdown of power to appliance 49. If no such use-detection is established within the prescribed fifteen seconds the output signal from counter "C" 37 will become positive as indicated by waveform 38. This positive level of waveform 38 will latch the bistable circuit comprised of NOR gates 39 and 40 to a logic "0" at the output of gate 39. This logic "0" level signal performs several tasks, namely, it holds the output signal of NAND gate 19 high via input 19b; it inhibits the audio oscillator via the input lead to NAND gate 26.; and it causes the output signal of inverter 41 to go to a logic "1" level which turns o f the optical coupler 43. Turning o f optical coupler 43 removes the gate 44 drive current for triac 45 thus shutting off power to the appliance 49. It should be noted that once the latch circuit of NOR gates 39 and 40 removes power to triac '45, and therefore appliance 49, power may be restored by activating the use-detector 2 or momentarily unplugging the UDT 1, thus temporarily removing power input at lines 46 and 47.
Next, consider the situation in which the appliance switch 50 is turned off, but power is still applied to lines 46 and 47. In this condition the output of amplifier 28 will remain at logic "0", allowing counter "B" 9 to complete its full count such that the signal on its output lead, which is applied to the input lead of OR gate 10, will go to a logic "1" thereby resetting counter •■A" 15 (waveform 11) before it can reach its full count. Since, as was mentioned earlier, the maximum count of counter "B" 9, is always less than the minimum count of counter "A"
15, the signal from counter "B" 9 will cause counter "A" 15 to be reset by counter "B" 9 so long as counter "B" 9 is not prematurely reset. This operation prevents counter "A" 15 from reaching its final count when power switch 50 is turned off.
The circuit description to this point has dealt with the operation of UDT 1 as a system which is separate from the appliance 49. To make the UDT 1 an integral part of the appliance requires minor changes to the schematic of Figure 1. This can be accomplished as follows. Since in this embodiment the UDT 1 is housed in the appliance enclosure wire 48 is removed from its connection to wire 47 and reconnected to point 51. In' this way UDT 1 power is switched on and off by switch 50. Likewise, it is no longer necessary to detect when appliance 49 is switched_ on by sensing the current through the load 53 using the amplifier 28 and its associated circuitry. Instead, it is only necessary to remove the connection at the output lead of amplifier 28 and to connect those input leads to gates 7 and 18 formerly connected to the output lead from ampli¬ fier 28 to V+, since the presence of V+ at gates 7 and 18 denotes that the appliance switch 50 is turned on.
Figure 2 is a pictorial representation of a use- detector and timer used as an accessory for a clothes iron. The previously described UDT 1 and its associated circuitry are enclosed in housing 64. Power is supplied to the UDT system by inserting plug 78 into a standard wall receptacle 79. Power is supplied to the clothes iron 71 by inserting plug 76 into the receptacle 75. Cord 72 is retained in clamp 60 so that movement of the clothes iron 71 across the ironing board surface 70 will cause cord 72 to move, and this motion will be transmitted through rod 62, and spring coupling 77 to the mounting base 63. Motion of mounting base 63 will, in turn, be detected by the use-detector 2 which was described in the
previous text. The actual physical coupling between mounting base 63 and use-detector 2 will become apparent later during the discussion of Figure 4.
Figure 3 is a pictorial representation of the use- detector and timer housed as an integral part of a clothes iron 71. The use-detector 2 in this configuration is shown as a switch 2 which is activated each time the clothes iron 71 is grasped by the user.
Figure 4 is a cross-sectional view of the UDT 1 to be used as an accessory to an appliance. Power enters the housing 64 via power cord 73 which contains wires 46 and 47. (Throughout the drawings, identical components are numbered identically. ) The components comprising much of the system are mounted on a printed circuit board 74. Triac 45 is mounted to heat sink 61. Power to the appliance to be controlled exits the housing 64 via wires 57 and 58 which are attached to receptacle 75. Plug 76 and cord 72 are part of the appliance to be controlled. Clamp 60 retains cord 72 in such a manner that any move¬ ment of the appliance and, hence, the cord'72 will cause movement of rod 62, spring coupling 77 and mounting base 63. Use detector 2 consists of a piezoelectric device (of a well-known design) similar to a ceramic phono cartridge which is coupled to mounting base 63 via contact arm 59. In this way small movement of the mounting base 63 will cause use-detector 2. to produce a voltage output suffi¬ cient to perform the reset functions previously described. Although a piezoelectric device was used to detect move¬ ment of cord 72, and thus the use of the appliance, it should be recognized that similar devices such as strain gauges, accelero eters and photo-electric or magnetic sensors could be substituted.
The circuit of Figure 1 has been used to describe a means of accomplishing the objectives of this invention.
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It should be recognized that others skilled in the art can use various means to accomplish similar results. For example, the basic timing functions can be provided using analog timing circuits or even bimetal, thermal-delay switches. Likewise, the timing and logic can be performed by a microprocessor-based system which also can control the appliance temperature, etc. Master oscillator 12 can be replaced by a crystal-controlled oscillator or a line frequency counter. In the case of the triac 45, which is used as a power control device, one can substitute an electro-mechanical relay along with a current sensing means such, as a current transformer or Hall-effect device, if required.