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DE68929150D1 - Verfahren zur Herstellung einer Halbleitervorrichtung - Google Patents

Verfahren zur Herstellung einer Halbleitervorrichtung

Info

Publication number
DE68929150D1
DE68929150D1 DE68929150T DE68929150T DE68929150D1 DE 68929150 D1 DE68929150 D1 DE 68929150D1 DE 68929150 T DE68929150 T DE 68929150T DE 68929150 T DE68929150 T DE 68929150T DE 68929150 D1 DE68929150 D1 DE 68929150D1
Authority
DE
Germany
Prior art keywords
manufacturing
semiconductor device
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68929150T
Other languages
English (en)
Other versions
DE68929150T2 (de
Inventor
Shozo Nishimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE68929150D1 publication Critical patent/DE68929150D1/de
Application granted granted Critical
Publication of DE68929150T2 publication Critical patent/DE68929150T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70591—Testing optical components
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
    • G03F7/70—Microphotolithographic exposure; Apparatus therefor
    • G03F7/70483—Information management; Active and passive control; Testing; Wafer monitoring, e.g. pattern monitoring
    • G03F7/70605—Workpiece metrology
    • G03F7/70616—Monitoring the printed patterns
    • G03F7/70633—Overlay, i.e. relative alignment between patterns printed by separate exposures in different layers, or in the same layer in multiple exposures or stitching
    • G—PHYSICS
    • G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
    • G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
    • G03F9/00—Registration or positioning of originals, masks, frames, photographic sheets or textured or patterned surfaces, e.g. automatically
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/544—Marks applied to semiconductor devices or parts
    • H01L2223/54453—Marks applied to semiconductor devices or parts for use prior to dicing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/975—Substrate or mask aligning feature

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
DE68929150T 1988-11-25 1989-11-27 Verfahren zur Herstellung einer Halbleitervorrichtung Expired - Lifetime DE68929150T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63298606A JP2666859B2 (ja) 1988-11-25 1988-11-25 目合せ用バーニヤパターンを備えた半導体装置

Publications (2)

Publication Number Publication Date
DE68929150D1 true DE68929150D1 (de) 2000-03-09
DE68929150T2 DE68929150T2 (de) 2000-09-21

Family

ID=17861904

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68929150T Expired - Lifetime DE68929150T2 (de) 1988-11-25 1989-11-27 Verfahren zur Herstellung einer Halbleitervorrichtung

Country Status (4)

Country Link
US (1) US5017514A (de)
EP (1) EP0370834B1 (de)
JP (1) JP2666859B2 (de)
DE (1) DE68929150T2 (de)

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JPH0444307A (ja) * 1990-06-12 1992-02-14 Nec Corp 半導体装置の製造方法
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US5478782A (en) * 1992-05-25 1995-12-26 Sony Corporation Method bonding for production of SOI transistor device
JP3039210B2 (ja) * 1993-08-03 2000-05-08 日本電気株式会社 半導体装置の製造方法
US5457880A (en) * 1994-02-08 1995-10-17 Digital Equipment Corporation Embedded features for monitoring electronics assembly manufacturing processes
US5385289A (en) * 1994-02-08 1995-01-31 Digital Equipment Corporation Embedded features for registration measurement in electronics manufacturing
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KR950029845A (ko) * 1994-04-01 1995-11-24 김주용 레티클 및 이를 이용한 레티클의 회전오차 측정방법
EP0737330B1 (de) * 1994-06-02 1999-03-10 Koninklijke Philips Electronics N.V. Verfahren zur wiederholten abbildung eines maskenmusters auf einem substrat und vorrichtung zur durchführung des verfahrens
US5923041A (en) * 1995-02-03 1999-07-13 Us Commerce Overlay target and measurement procedure to enable self-correction for wafer-induced tool-induced shift by imaging sensor means
KR970003401A (ko) * 1995-06-20 1997-01-28 김주용 디스톨션 체크용 레티클
US5872042A (en) * 1996-08-22 1999-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Method for alignment mark regeneration
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US6465322B2 (en) 1998-01-15 2002-10-15 Koninklijke Philips Electronics N.V. Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing
JP3287321B2 (ja) 1998-12-03 2002-06-04 日本電気株式会社 半導体装置の製造方法
US6130173A (en) * 1998-03-19 2000-10-10 Lsi Logic Corporation Reticle based skew lots
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US6462818B1 (en) 2000-06-22 2002-10-08 Kla-Tencor Corporation Overlay alignment mark design
US7068833B1 (en) 2000-08-30 2006-06-27 Kla-Tencor Corporation Overlay marks, methods of overlay mark design and methods of overlay measurements
US7541201B2 (en) 2000-08-30 2009-06-02 Kla-Tencor Technologies Corporation Apparatus and methods for determining overlay of structures having rotational or mirror symmetry
US6486954B1 (en) 2000-09-01 2002-11-26 Kla-Tencor Technologies Corporation Overlay alignment measurement mark
US6864589B2 (en) * 2001-03-30 2005-03-08 Sharp Laboratories Of America, Inc. X/Y alignment vernier formed on a substrate
US7804994B2 (en) * 2002-02-15 2010-09-28 Kla-Tencor Technologies Corporation Overlay metrology and control method
US20030160163A1 (en) * 2002-02-25 2003-08-28 Alan Wong Optical metrology target design for simultaneous measurement of multiple periodic structures
US6815128B2 (en) * 2002-04-01 2004-11-09 Micrel, Inc. Box-in-box field-to-field alignment structure
US7075639B2 (en) * 2003-04-25 2006-07-11 Kla-Tencor Technologies Corporation Method and mark for metrology of phase errors on phase shift masks
US7608468B1 (en) 2003-07-02 2009-10-27 Kla-Tencor Technologies, Corp. Apparatus and methods for determining overlay and uses of same
US7346878B1 (en) 2003-07-02 2008-03-18 Kla-Tencor Technologies Corporation Apparatus and methods for providing in-chip microtargets for metrology or inspection
KR100597634B1 (ko) * 2004-04-13 2006-07-05 삼성전자주식회사 커패시터를 가지는 반도체 메모리 소자 및 그의 형성방법
KR100546167B1 (ko) * 2004-08-11 2006-01-24 주식회사 하이닉스반도체 Ｓｔｉ ｃｍｐ 공정에서 발생하는 잔여 질화막 두께변화량 감소 방법 및 이를 이용한 반도체 소자의 소자분리막 제조 방법
FR2875624A1 (fr) * 2004-09-23 2006-03-24 St Microelectronics Sa Generation deterministe d'un numero d'identifiant d'un circuit integre
KR100663347B1 (ko) * 2004-12-21 2007-01-02 삼성전자주식회사 중첩도 측정마크를 갖는 반도체소자 및 그 형성방법
US7557921B1 (en) 2005-01-14 2009-07-07 Kla-Tencor Technologies Corporation Apparatus and methods for optically monitoring the fidelity of patterns produced by photolitographic tools
US7898662B2 (en) 2006-06-20 2011-03-01 Asml Netherlands B.V. Method and apparatus for angular-resolved spectroscopic lithography characterization
US20080036984A1 (en) * 2006-08-08 2008-02-14 Asml Netherlands B.V. Method and apparatus for angular-resolved spectroscopic lithography characterization
NL2002962A1 (nl) * 2008-06-11 2009-12-14 Asml Netherlands Bv Inspection method and apparatus, lithographic apparatus, lithographic processing cell and device manufacturing method.
US8988653B2 (en) 2009-08-20 2015-03-24 Asml Netherlands B.V. Lithographic apparatus, distortion determining method, and patterning device
US9927718B2 (en) 2010-08-03 2018-03-27 Kla-Tencor Corporation Multi-layer overlay metrology target and complimentary overlay metrology measurement systems
US10890436B2 (en) 2011-07-19 2021-01-12 Kla Corporation Overlay targets with orthogonal underlayer dummyfill
JP2015079830A (ja) * 2013-10-16 2015-04-23 三菱電機株式会社 光半導体装置、光半導体装置の製造方法、及び光モジュールの製造方法
CN104979330B (zh) * 2014-04-10 2018-07-13 上海和辉光电有限公司 具有偏移量测量标记的多层结构及其偏移量的测量方法
NL2017466A (en) * 2015-09-30 2017-04-05 Asml Netherlands Bv Metrology method, target and substrate
US10451412B2 (en) 2016-04-22 2019-10-22 Kla-Tencor Corporation Apparatus and methods for detecting overlay errors using scatterometry
US10510676B2 (en) * 2017-11-30 2019-12-17 Taiwan Semiconductor Manufacturing Company, Ltd. System and method for aligned stitching
CN108196408B (zh) * 2017-12-28 2021-03-23 Tcl华星光电技术有限公司 Coa基板的测试键以及使用其的测试方法
CN110071093B (zh) * 2018-01-23 2020-11-27 瀚宇彩晶股份有限公司 显示面板
KR20200125584A (ko) * 2018-02-27 2020-11-04 에베 그룹 에. 탈너 게엠베하 포지션을 결정하기 위한 마크 필드, 방법 및 장치
US10705436B2 (en) * 2018-09-27 2020-07-07 Taiwan Semiconductor Manufacturing Co., Ltd. Overlay mark and method of fabricating the same
CN111398314A (zh) * 2020-05-25 2020-07-10 鹤山市中富兴业电路有限公司 一种基于游标的双面pcb检测模块以及对位方法

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Also Published As

Publication number Publication date
EP0370834A3 (de) 1991-09-04
DE68929150T2 (de) 2000-09-21
JPH02143544A (ja) 1990-06-01
EP0370834A2 (de) 1990-05-30
JP2666859B2 (ja) 1997-10-22
EP0370834B1 (de) 2000-02-02
US5017514A (en) 1991-05-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: NEC CORP., TOKIO/TOKYO, JP

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP

8327 Change in the person/name/address of the patent owner

Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP