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DE68907451D1 - Ausgangstreiberschaltung fuer halbleiter-ic. - Google Patents

Ausgangstreiberschaltung fuer halbleiter-ic.

Info

Publication number
DE68907451D1
DE68907451D1 DE8989112693T DE68907451T DE68907451D1 DE 68907451 D1 DE68907451 D1 DE 68907451D1 DE 8989112693 T DE8989112693 T DE 8989112693T DE 68907451 T DE68907451 T DE 68907451T DE 68907451 D1 DE68907451 D1 DE 68907451D1
Authority
DE
Germany
Prior art keywords
semiconductor
driver circuit
output driver
output
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8989112693T
Other languages
English (en)
Other versions
DE68907451T2 (de
Inventor
Shigeru Intellectual P Kumagai
Hiroshi Intellectual Iwahashi
Hiroto Intellectual Prop Nakai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE68907451D1 publication Critical patent/DE68907451D1/de
Publication of DE68907451T2 publication Critical patent/DE68907451T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1057Data output buffers, e.g. comprising level conversion circuits, circuits for adapting load
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C7/00Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003Modifications for increasing the reliability for protection
    • H03K19/00346Modifications for eliminating interference or parasitic voltages or currents
    • H03K19/00361Modifications for eliminating interference or parasitic voltages or currents in field effect transistor circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01Modifications for accelerating switching
    • H03K19/017Modifications for accelerating switching in field-effect transistor circuits
    • H03K19/01707Modifications for accelerating switching in field-effect transistor circuits in asynchronous circuits
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K19/00Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/185Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using dielectric elements with variable dielectric constant, e.g. ferro-electric capacitors
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C2207/00Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/10Aspects relating to interfaces of memory device to external buses
    • G11C2207/108Wide data ports

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Electronic Switches (AREA)
DE89112693T 1988-07-11 1989-07-11 Ausgangstreiberschaltung für Halbleiter-IC. Expired - Fee Related DE68907451T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63172321A JP2573320B2 (ja) 1988-07-11 1988-07-11 出力バッファ回路

Publications (2)

Publication Number Publication Date
DE68907451D1 true DE68907451D1 (de) 1993-08-12
DE68907451T2 DE68907451T2 (de) 1993-10-21

Family

ID=15939745

Family Applications (1)

Application Number Title Priority Date Filing Date
DE89112693T Expired - Fee Related DE68907451T2 (de) 1988-07-11 1989-07-11 Ausgangstreiberschaltung für Halbleiter-IC.

Country Status (5)

Country Link
US (1) US4985646A (de)
EP (1) EP0350879B1 (de)
JP (1) JP2573320B2 (de)
KR (1) KR920010984B1 (de)
DE (1) DE68907451T2 (de)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH07114359B2 (ja) * 1989-07-28 1995-12-06 株式会社東芝 半導体集積回路
JPH0834060B2 (ja) * 1990-06-22 1996-03-29 株式会社東芝 半導体記憶装置
US5128568A (en) * 1990-10-03 1992-07-07 International Business Machines Corp. Self-biasing timing circuit for achieving long time delays
JP2991479B2 (ja) * 1990-11-16 1999-12-20 富士通株式会社 半導体集積回路及び半導体記憶装置
US5059822A (en) * 1990-11-23 1991-10-22 Ncr Corporation Method and apparatus for controlling noise on power supply buses
US5272432A (en) * 1991-05-01 1993-12-21 Winbond Electronics N.A. Corporation DAC current source with stabilizing bias
US5218239A (en) * 1991-10-03 1993-06-08 National Semiconductor Corporation Selectable edge rate cmos output buffer circuit
US5214320A (en) * 1992-06-12 1993-05-25 Smos Systems, Inc. System and method for reducing ground bounce in integrated circuit output buffers
DE69334110T2 (de) * 1992-06-15 2007-05-10 Fujitsu Ltd., Kawasaki Integrierte Halbleiterschaltung mit Eingangs-Ausgangsschnittstelle für kleine Signalamplituden
JPH066195A (ja) * 1992-06-18 1994-01-14 Mitsubishi Electric Corp 出力ドライバ回路
KR940010671B1 (ko) * 1992-07-25 1994-10-24 금성일렉트론 주식회사 Cmos 3-스테이트 버퍼회로 및 그 제어방법
DE69434903T2 (de) * 1993-11-29 2007-04-26 Fujitsu Ltd., Kawasaki Elektronisches System zum Abschluss von Busleitungen
JP3537500B2 (ja) * 1994-08-16 2004-06-14 バー−ブラウン・コーポレーション インバータ装置
US5844425A (en) * 1996-07-19 1998-12-01 Quality Semiconductor, Inc. CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations
US5910730A (en) * 1996-12-13 1999-06-08 International Business Machines Corporation Digital circuit noise margin improvement
US6362652B1 (en) 1999-12-20 2002-03-26 Fujitsu Microelectronics, Inc. High voltage buffer for submicron CMOS
US6753708B2 (en) * 2002-06-13 2004-06-22 Hewlett-Packard Development Company, L.P. Driver circuit connected to pulse shaping circuitry and method of operating same

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS635553A (ja) * 1986-06-25 1988-01-11 Fujitsu Ltd バツフア回路
US4758743A (en) * 1986-09-26 1988-07-19 Motorola, Inc. Output buffer with improved di/dt
JPS63136823A (ja) * 1986-11-28 1988-06-09 Nec Corp Cmos集積回路
US4818901A (en) * 1987-07-20 1989-04-04 Harris Corporation Controlled switching CMOS output buffer

Also Published As

Publication number Publication date
US4985646A (en) 1991-01-15
EP0350879A3 (en) 1990-05-30
JP2573320B2 (ja) 1997-01-22
EP0350879B1 (de) 1993-07-07
EP0350879A2 (de) 1990-01-17
JPH0221721A (ja) 1990-01-24
DE68907451T2 (de) 1993-10-21
KR920010984B1 (ko) 1992-12-26
KR900002457A (ko) 1990-02-28

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee