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DE3775603D1 - Halbleiter-speicheranordnung mit redundanzschaltungsteil. - Google Patents

Halbleiter-speicheranordnung mit redundanzschaltungsteil.

Info

Publication number
DE3775603D1
DE3775603D1 DE8787302312T DE3775603T DE3775603D1 DE 3775603 D1 DE3775603 D1 DE 3775603D1 DE 8787302312 T DE8787302312 T DE 8787302312T DE 3775603 T DE3775603 T DE 3775603T DE 3775603 D1 DE3775603 D1 DE 3775603D1
Authority
DE
Germany
Prior art keywords
semiconductor memory
circuit part
memory arrangement
redundancy circuit
redundancy
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8787302312T
Other languages
English (en)
Inventor
Yoshihiro Takemae
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3775603D1 publication Critical patent/DE3775603D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/84Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability
    • G11C29/842Masking faults in memories by using spares or by reconfiguring using programmable devices with improved access time or stability by introducing a delay in a signal path
DE8787302312T 1986-03-20 1987-03-18 Halbleiter-speicheranordnung mit redundanzschaltungsteil. Expired - Fee Related DE3775603D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61060929A JPS62222500A (ja) 1986-03-20 1986-03-20 半導体記憶装置

Publications (1)

Publication Number Publication Date
DE3775603D1 true DE3775603D1 (de) 1992-02-13

Family

ID=13156562

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8787302312T Expired - Fee Related DE3775603D1 (de) 1986-03-20 1987-03-18 Halbleiter-speicheranordnung mit redundanzschaltungsteil.

Country Status (5)

Country Link
US (1) US4803656A (de)
EP (1) EP0242981B1 (de)
JP (1) JPS62222500A (de)
KR (1) KR900008637B1 (de)
DE (1) DE3775603D1 (de)

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5022006A (en) * 1988-04-01 1991-06-04 International Business Machines Corporation Semiconductor memory having bit lines with isolation circuits connected between redundant and normal memory cells
JP2785936B2 (ja) * 1988-04-12 1998-08-13 日本電気株式会社 冗長回路のテスト方法
US4922128A (en) * 1989-01-13 1990-05-01 Ibm Corporation Boost clock circuit for driving redundant wordlines and sample wordlines
EP0389203A3 (de) * 1989-03-20 1993-05-26 Fujitsu Limited Halbleiterspeichergerät beinhaltend Information, die die Anwesenheit mangelhafter Speicherzellen anzeigt
JP2547633B2 (ja) * 1989-05-09 1996-10-23 三菱電機株式会社 半導体記憶装置
US5184327A (en) * 1989-06-14 1993-02-02 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having on-chip test circuit and method for testing the same
JPH0748320B2 (ja) * 1989-07-24 1995-05-24 セイコー電子工業株式会社 半導体不揮発性メモリ
JPH0670776B2 (ja) * 1990-02-23 1994-09-07 株式会社東芝 半導体集積回路
JPH03252998A (ja) * 1990-02-28 1991-11-12 Sharp Corp 半導体記憶装置
KR100274478B1 (ko) * 1990-05-10 2001-01-15 칼 하인쯔 호르닝어 병렬 테스트 장치를 갖는 집적 반도체 메모리 및 그 리던던시 방법
US5276834A (en) * 1990-12-04 1994-01-04 Micron Technology, Inc. Spare memory arrangement
KR940002272B1 (ko) * 1991-05-24 1994-03-19 삼성전자 주식회사 리던던시 기능을 가지는 반도체 메모리 장치
JPH0620494A (ja) * 1992-06-30 1994-01-28 Hitachi Ltd 半導体記憶装置
JPH06119796A (ja) * 1992-10-06 1994-04-28 Texas Instr Japan Ltd 欠陥メモリセル救済用デコーダ
JPH06242925A (ja) * 1993-02-15 1994-09-02 Mitsubishi Electric Corp ソート処理装置
US5526503A (en) * 1993-10-06 1996-06-11 Ast Research, Inc. Virtual addressing buffer circuit
US5495447A (en) * 1993-10-08 1996-02-27 Digital Equipment Corporation Method and apparatus using mapped redundancy to perform multiple large block memory array repair
US5461586A (en) * 1994-01-31 1995-10-24 Texas Instruments Incorporated Self-timed redundancy circuit
GB9417269D0 (en) * 1994-08-26 1994-10-19 Inmos Ltd Memory and test method therefor
JP3226425B2 (ja) * 1994-09-09 2001-11-05 富士通株式会社 半導体記憶装置
JP3425811B2 (ja) * 1994-09-28 2003-07-14 Necエレクトロニクス株式会社 半導体メモリ
US5640353A (en) * 1995-12-27 1997-06-17 Act Corporation External compensation apparatus and method for fail bit dynamic random access memory
GB9609834D0 (en) * 1996-05-10 1996-07-17 Memory Corp Plc Semiconductor device
DE69618344T2 (de) * 1996-06-06 2002-08-14 Stmicroelectronics S.R.L., Agrate Brianza Schaltung um redundante Daten einer Redundanzschaltung innerhalb einer Speicheranordnung durch zeitgeteilte Annäherung zu übertragen
JP4062247B2 (ja) * 2003-12-11 2008-03-19 ソニー株式会社 半導体記憶装置
KR100541819B1 (ko) * 2003-12-30 2006-01-10 삼성전자주식회사 스타트 프로그램 전압을 차등적으로 사용하는 불휘발성반도체 메모리 장치 및 그에 따른 프로그램 방법

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4228528B2 (en) * 1979-02-09 1992-10-06 Memory with redundant rows and columns
DE3071955D1 (en) * 1979-06-15 1987-05-27 Fujitsu Ltd Semiconductor memory device
US4441170A (en) * 1980-09-30 1984-04-03 Intel Corporation Memory redundancy apparatus for single chip memories
JPS6051199B2 (ja) * 1980-11-13 1985-11-12 富士通株式会社 半導体装置
US4376300A (en) * 1981-01-02 1983-03-08 Intel Corporation Memory system employing mostly good memories
US4422161A (en) * 1981-10-08 1983-12-20 Rca Corporation Memory array with redundant elements
US4480199A (en) * 1982-03-19 1984-10-30 Fairchild Camera & Instrument Corp. Identification of repaired integrated circuits
JPS595497A (ja) * 1982-07-02 1984-01-12 Hitachi Ltd 半導体rom
JPS59203299A (ja) * 1983-05-06 1984-11-17 Nec Corp 冗長ビット付メモリ
JPS6089899A (ja) * 1983-10-24 1985-05-20 Nec Corp メモリ回路
JPS60114025A (ja) * 1983-11-25 1985-06-20 Nec Corp パルス回路

Also Published As

Publication number Publication date
EP0242981A2 (de) 1987-10-28
EP0242981B1 (de) 1992-01-02
KR900008637B1 (ko) 1990-11-26
JPH0526280B2 (de) 1993-04-15
KR870009383A (ko) 1987-10-26
US4803656A (en) 1989-02-07
EP0242981A3 (en) 1989-12-13
JPS62222500A (ja) 1987-09-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee