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DE3422495A1 - Verfahren zum herstellen mehrerer mosfets auf einem substrat - Google Patents

Verfahren zum herstellen mehrerer mosfets auf einem substrat

Info

Publication number
DE3422495A1
DE3422495A1 DE19843422495 DE3422495A DE3422495A1 DE 3422495 A1 DE3422495 A1 DE 3422495A1 DE 19843422495 DE19843422495 DE 19843422495 DE 3422495 A DE3422495 A DE 3422495A DE 3422495 A1 DE3422495 A1 DE 3422495A1
Authority
DE
Germany
Prior art keywords
substrate
field oxide
silicon
mosfets
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19843422495
Other languages
German (de)
English (en)
Inventor
Alfred Charles Princeton N.J. Ipri
Lubomir Leon Plainsboro N.J. Jastrzebski
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
RCA Corp
Original Assignee
RCA Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by RCA Corp filed Critical RCA Corp
Publication of DE3422495A1 publication Critical patent/DE3422495A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE19843422495 1983-06-22 1984-06-16 Verfahren zum herstellen mehrerer mosfets auf einem substrat Withdrawn DE3422495A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US50680483A 1983-06-22 1983-06-22

Publications (1)

Publication Number Publication Date
DE3422495A1 true DE3422495A1 (de) 1985-01-10

Family

ID=24016078

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19843422495 Withdrawn DE3422495A1 (de) 1983-06-22 1984-06-16 Verfahren zum herstellen mehrerer mosfets auf einem substrat

Country Status (5)

Country Link
DE (1) DE3422495A1 (fr)
FR (1) FR2549294A1 (fr)
GB (1) GB2142185A (fr)
IT (1) IT1174192B (fr)
SE (1) SE8403302L (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4942449A (en) * 1988-03-28 1990-07-17 General Electric Company Fabrication method and structure for field isolation in field effect transistors on integrated circuit chips
KR890017771A (ko) * 1988-05-20 1989-12-18 강진구 반도체장치 제조방법
US5158907A (en) * 1990-08-02 1992-10-27 At&T Bell Laboratories Method for making semiconductor devices with low dislocation defects

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2059116C3 (de) * 1970-12-01 1974-11-21 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zur Herstellung eines Halbleiterbauelementes
US3861968A (en) * 1972-06-19 1975-01-21 Ibm Method of fabricating integrated circuit device structure with complementary elements utilizing selective thermal oxidation and selective epitaxial deposition
US4536842A (en) * 1982-03-31 1985-08-20 Tokyo Shibaura Denki Kabushiki Kaisha System for measuring interfloor traffic for group control of elevator cars

Also Published As

Publication number Publication date
FR2549294A1 (fr) 1985-01-18
IT8421384A0 (it) 1984-06-13
GB2142185A (en) 1985-01-09
SE8403302D0 (sv) 1984-06-20
IT8421384A1 (it) 1985-12-13
SE8403302L (sv) 1984-12-23
GB8414923D0 (en) 1984-07-18
IT1174192B (it) 1987-07-01

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Legal Events

Date Code Title Description
8130 Withdrawal