DE2739664A1 - ROAD TRAFFIC SIGNAL SYSTEM - Google Patents

Description

The invention relates to a road traffic signal system, their crossing devices either by local or jointly via control lines by a central signal plan generator are controllable, with monitoring devices ensuring the proper transmission of control commands between the control center and check the intersections and in the event of transmission errors the intersection in question from the central to the local signal planer switch.

So in the event of failure or incorrect transmission of control commands the entire traffic control of a larger area does not immediately collapse between a control center and the intersections, additional local signal plan transmitters are provided at all intersections with central control. These However, they have a correspondingly simple structure and can therefore use the central signal plan generator with its wide range of variations Replace only inadequately.

Never 1 Wt / 3O.8.1977

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The invention is based on the object of creating a centrally controlled road traffic signal system that takes these findings into account, which is not always the case despite sporadic transmission errors in the control commands

Immediately switch the central control on and off to the local one

Signal plan generator switches over, but only limited this to the really necessary exceptional cases. Even so, the proper Traffic control at the intersections with their safety precautions remain guaranteed. Hostile green, faulty Shortened interim times and premature green time termination should therefore be prevented with certainty.

According to the invention, this is done with a road traffic signal system, whose intersection devices are optionally by local or jointly via control lines through a central signal plan transmitter are controllable, achieved by the following features, some of which are known per se:

a) At each transmission time segment, the control commands for all traffic regulating an independent traffic flow are

Transmit signals,

b) Each control command transmission is stored in the buffer transmitted in the intersection device and checked for correctness,

c) successive faulty control command transmissions are added up in a counter and when a selectable setpoint is reached, this counter switches the crossing from central signal plan generator from time to time to the local to and

d) after each error-free transmission, the error counter deferred and the control commands from the buffers into the actual command memory of the traffic signal ami age transfer.

In a further embodiment of the invention, each intersection device can have devices for monitoring the required intermediate times, the minimum green times and to prevent green hostile to one another.

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Further details of the invention emerge from an exemplary embodiment shown in the drawing.

Show it

Fig. 1 shows an intersection with four access roads and their main traffic flows (Vehicle and pedestrian traffic), Fig. 2 shows a simplified signal plan of the intersection, 3 shows a control center with the associated signal plan transmitter and the transmission means for the control commands, 4 shows an intersection device for evaluating the control commands from the control center.

The intersection shown in Fig.1 has four entrances, their Vehicle flows F1 to F4 and pedestrian flows F11 to F14 through corresponding signal transmitters Sg1 etc. only shown in Figure 4. for vehicle traffic and Sg11 etc. for pedestrian traffic can be regulated.

The corresponding signal plan is shown in FIG. Included the thick lines mean red and the thin lines green.-The green end is still through a circle and the red end highlighted by a dash. The red / yellow and yellow transition times were not shown, because these are meaningless for the invention. These transition times can be changed when switching the command memory shown in FIG can be generated by additional timing elements. At the same time as the switchover, these timers are activated start up and bring the lamps of the transition phases and only after these timers have elapsed will these lamps be turned on off and the lamps of the main phases switched on. But this is of no further importance here.

Furthermore, in Fig.2 for some signal changes for the Signal transmitter Sg1 ... Sg11 ... the control commands to be transmitted "1" or "0" indicated. One can see from this that

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For example, at the moment second 10 the following pulse series "10100010" is to be transmitted. However, since these pulse series ahl an odd Number contains "1", another "1" is pe by a particular switch, which will be explained later in Fig. 3, is added, so that transmitted with the bottom row of four "1" will. Line Pc ensures that an even number "1" is always transmitted as control commands and this even number "1" can be used for a parity check.

The center according to Fig. 3 has a clock Tg (1 millisecond) on, which advances the distributors V1, V2 and whose cycle is also transmitted to the intersection device according to FIG. 4 via the line 11 is passed on. A stepper motor Sm is connected to the output 5 of the distributor 1 and drives the program roller Pw. The program roller Pw has switching tracks corresponding to FIG. 2, by means of which the switches p1 to p8 and pe are actuated are, namely the associated switch p1 etc. is closed according to the thin line, while he is at thick line, i.e. with red, remains open. At second 10, for example, a pulse diagram is generated from distributor V2 "101000101" transmitted over line 12 to the spreading device, as it is also shown in Fig.2. Finally, a transmission pulse is sent from distributor V1 to step 40 via line 13 to the cutting device according to FIG. 3 transferred, the meaning of which is still to be explained. Distributors V2 and V3 are synchronized via outputs 1, 2.

The intersection device according to FIG. 4 has a distributor V3 which can be incremented by the clock generator Tg via the line 11. At its outputs 10, 12, 14 to 24 are connected to the OR gate 01 and the AND gates U4 to U19. The AND gates U4 to U19 evaluate the pulse diagram and adjust accordingly the buffers K1 to K8. So shifts

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for example the "1" for the signal transmitter Sg1 according to FIG In connection with the output 10 of the distributor V3, the AND gate U5 is permeable and thus sets up the memory K1 gn. The "0" switches accordingly for the signal transmitter Sg14 in connection with the output 24 of the distributor V3 the Ünd gate Ü18 permeable and thus brings the buffer K8 in the position nt. Initially, however, this has no effect on the actual command memories K9 to K16 Signal transmitter Sg1 to Sgi4. From the OR gate 01 the

Outputs 10, 12 to 24 and 30 are applied to the AND gate Ü1

and so this always gives an impulse to the memory K17, when a "1" is present on line 12, ie in the pulse diagram. The memory K17 is thus alternately after switched left and right, so it checks whether the number of "1" in the pulse diagram is an even or an odd number (Parity check). After each parity check, the memory K17 is returned to its memory through output 50 of distributor V3 brought the starting position shown here. In the case of a positive parity check, this means that at the time of the query, the Line 13 a "1" in the right part of the memory K17 and a pulse is thus sent to the actual command memory K9 to K16 and the counter Z via the AND gate U2. The pulse to the memories K9 to K16 leaves them the last The status of the buffers K1 to K8 take over and the pulse at the counter Z resets it to zero. in the In the present case, the signal transmitter Sg11, but only this, as can be seen from FIG. 2, would be switched from green to red.

If, on the other hand, the parity check indicates a transmission error, the "1" is at the time of the query by line 13 in the left part of memory K17, no transfer takes place the contents of the buffers K1 to K8 in the command memories K9 to K16. In addition, the Ünd gate U3 an incremental pulse is given to the counter Z. Does the

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the next pulse transmission is again properly, then the content of the intermediate memory K1 to K8 in the actual instruction memory K9 to K16 transferred and furthermore, the counter Z is reset to zero.

If, on the other hand, four transmissions in a row are incorrect, the counter Z is incremented to its value 4 and thus causes the alarm device A to respond, which then _{holds itself for the time being via its self-holding contact a Q} , via its contact a ^ to a * g it switches off the signal generators Sg1 to Sg14 from the command memories K9 to K16 and via its working contacts a ^ y to a, ₂ to the auxiliary signal plan transmitter spg in the intersection device. The auxiliary signal plan encoder spg is constructed similarly to the signal plan encoder in the control center and now ensures the continued operation of the intersection via transition signals.

Since with every control command transmission the control commands for all traffic signals regulating an independent traffic flow are transmitted, the one at the intersection will always be transmitted desired signal condition set. Individual pulse telegrams for the control command transmission can therefore be used fail. It only has to be avoided that minimum green times are caused by possible changes in the signal plan sequence or minimum intermediate times are not reached. For this reason, it makes sense to have appropriate facilities in the intersection to be provided, for example in DAS 23 48 666 or 24 12 963 and in a parallel application VPA 77 E 2367 "Procedure for ensuring intermediate times for road traffic signaling systems and means for implementation of the procedure "are described.

The components shown in the exemplary embodiment can of course be fully or partially integrated in computers, whereby the required functions are ensured by programs.

4 claims, 4 figures

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Claims (4)

Patent claims: Road traffic signal system, their crossing devices can be controlled either locally or via control lines jointly by a central signal plan encoder, monitoring devices ensure proper transmission between the control center and the intersections and in the event of transmission errors, switch the intersection in question from the central to the local signal plan transmitter, characterized by the following features, some of which are known per se: a) at each transmission time segment, the control commands for all of them regulate an independent traffic flow Transmit traffic signals, b) every control command transmission is transferred to the intermediate memory in the intersection device and to ensure that it is free of errors checked, c) successive faulty control command transmissions are added up in a counter and when a desired value is reached, this counter switches the crossover from central signal plan generator from time to time to the local to and d) after each error-free transmission, the error counter is reset and the control commands from the buffer stores transferred to the actual command memory of the traffic signal system. 2. Road traffic signal system according to claim 1, characterized in that each crossing device means for Monitoring of the necessary intermediate times, the minimum green times and to prevent mutually hostile Green signals included. 909810/0457 ORIGINAL INSPECTED 3. Road traffic signal system according to claim 1 or 2, characterized in that the error counter is preferably at switches a maximum of four transmission errors to the local signal plan encoder. 4. Installation according to claim 1 or the following, characterized in that the transmission of the control commands through Pulse diagrams and their verification by means of a parity check. 90981 0 / CKS7