CN214669460U - Integrated circuit electromagnetic interference immunity performance detection device - Google Patents
Integrated circuit electromagnetic interference immunity performance detection device Download PDFInfo
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- CN214669460U CN214669460U CN202120767772.3U CN202120767772U CN214669460U CN 214669460 U CN214669460 U CN 214669460U CN 202120767772 U CN202120767772 U CN 202120767772U CN 214669460 U CN214669460 U CN 214669460U
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- 230000036039 immunity Effects 0.000 title claims abstract description 14
- 239000003990 capacitor Substances 0.000 claims description 137
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- 238000003199 nucleic acid amplification method Methods 0.000 claims description 10
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Abstract
The utility model relates to a detection device, in particular to an integrated circuit electromagnetic immunity performance detection device, belonging to the field of detection circuits; its detection device includes: the device comprises a detection module, a calculation module, an oscillography module and a report module. The utility model discloses a set up an integrated circuit electromagnetism immunity performance detection device, pass through detection module through the electric current to among the integrated circuit and detect, detect signal transmission simultaneously reachs each item parameter to the calculation module to carry out the inside electromagnetism height of integrated circuit who reachs this moment through oscillography module and report module, thereby obtain integrated circuit's electromagnetism immunity performance, thereby the utility model discloses can effectual understanding integrated circuit's the interference condition to can reduce the job instability condition that appears in work.
Description
Technical Field
The utility model relates to a detection device specifically is an integrated circuit electromagnetism immunity to interference performance detection device, belongs to the detection circuitry field.
Background
With the rapid development of electronic circuits, integrated circuits have been widely used in various circuit designs due to their incomparable advantages of small size, light weight, low power consumption, good characteristics, high density integration, and so on. As is well known, the space electromagnetic environment is increasingly complex, and more integrated circuit devices are increasingly interfered by external electromagnetic waves. Therefore, the immunity of integrated circuits against electromagnetic interference in practical applications has been a hot point of research.
The integrated circuit produced in the prior art is simply subjected to power-on performance test before leaving a factory, so that the anti-interference performance of the integrated circuit cannot be tested, and the problem of unstable signals or inaccurate parameters can occur when the integrated circuit works.
SUMMERY OF THE UTILITY MODEL
Utility model purpose: an apparatus for detecting electromagnetic immunity of an integrated circuit is provided to solve the above mentioned problems.
The technical scheme is as follows: an integrated circuit electromagnetic immunity performance detection device, comprising:
the detection module is used for detecting the current of the integrated circuit and setting a stabilizing and amplifying branch circuit so as to ensure the stability of detection;
the computing module is used for receiving the detected current signal and computing the current value and the frequency value inside the integrated circuit at the moment;
the oscillography module is used for displaying the interference condition at the moment by matching with a display through receiving the current value, the frequency value and the working voltage value at the moment;
a reporting module to generate an interference report.
Preferably, the detection module comprises a current detection circuit;
the current detection circuit consists of a signal amplification branch, a stabilization branch and a detection branch;
the signal amplification branch is specifically used for amplifying signal multiples by an amplifier;
the detection branch routing detector is matched with the adjustable resistor to detect the working current value in the integrated circuit at the moment and output a signal value;
the stable branch consists of a plurality of capacitors to form a capacitor, so that voltage sudden change is prevented, overvoltage in a peak state is absorbed, and parameter stability is effectively guaranteed.
Preferably, the current detection circuit is composed of an amplifier U3A, a capacitor C2, a capacitor C3, a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6, a current detector U4, a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9, and a capacitor C10
Preferably, the signal amplification branch is routed: the amplifier U3A, the capacitor C2 and the capacitor C3.
Preferably, the stabilizing branch consists of a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9 and a capacitor C10.
Preferably, the detection branch comprises a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6 and a current detector U4.
Preferably, a pin No. 3 of the amplifier U3A inputs a current signal, a pin No. 8 of the amplifier U3A is connected with one end of a capacitor C2 and inputs an operating voltage, the other end of the capacitor C2 is grounded, a pin No. 2 of the amplifier U3A is connected with one end of a capacitor C3 and inputs the operating voltage, a pin No. 4 of the amplifier U3A is connected with the other end of a capacitor C3 and is grounded, a pin No. 1 of the amplifier U3A is connected with one end of a capacitor C1, a pin No. 1 of the current detector U4 is connected with one end of a capacitor C1, pins No. 7 and 8 of the current detector U4 are connected with one end of a capacitor C4 and is grounded, a pin No. 9 of the current detector U4 is simultaneously connected with one end of a resistor R4 and one end of a resistor R5, the other end of a resistor R5 is grounded, the other end of a resistor R4 is connected with the other end of an adjustable resistor RV1, one end of an adjustable resistor 1 is connected with one end of a capacitor C11 and is connected with an input voltage, the other end of the capacitor C11 is grounded, the pin No. 14 of the current detector U4 is connected with the other end of the adjustable resistor RV1, one end of the capacitor C5 is connected with one end of the capacitor C6 and inputs working voltage, the other end of the capacitor C5 is grounded, the other end of the capacitor C6 is connected with the pin No. 4 of the current detector U4, the pin No. 10 of the current detector U4 is grounded, the pin No. 6 of the current detector U4 is connected with one end of the capacitor C8, one end of the capacitor C7 and one end of the inductor L1, the other end of the capacitor C8 is connected with the other end of the capacitor C7 and grounded, the other end of the inductor L1 is connected with one end of the capacitor C10 and one end of the capacitor C9 and outputs signals, and the other end of the capacitor C10 is connected with the other end of the capacitor C9 and grounded.
Has the advantages that: the utility model discloses a set up an integrated circuit electromagnetism immunity performance detection device, pass through detection module through the electric current to among the integrated circuit and detect, detect signal transmission simultaneously reachs each item parameter to the calculation module to carry out the inside electromagnetism height of integrated circuit who reachs this moment through oscillography module and report module, thereby obtain integrated circuit's electromagnetism immunity performance, thereby the utility model discloses can effectual understanding integrated circuit's the interference condition to can reduce the job instability condition that appears in work.
Drawings
Fig. 1 is a flow chart of the present invention.
Fig. 2 is a circuit diagram of the detection module of the present invention.
Fig. 3 is a circuit diagram of the oscillometric module of the present invention.
Detailed Description
In the following description, numerous specific details are set forth in order to provide a more thorough understanding of the present invention. It will be apparent, however, to one skilled in the art, that the present invention may be practiced without one or more of these details; in other instances, well-known features have not been described in order to avoid obscuring the present invention.
An integrated circuit electromagnetic immunity performance detection device, comprising: the device comprises a detection module, a calculation module, an oscillography module and a report module.
In one embodiment, the detection module includes a current detection circuit;
specifically, the current detection circuit consists of a signal amplification branch, a stabilization branch and a detection branch;
more specifically, the signal amplification branch is specifically amplified by signal multiples by an amplifier;
the detection branch route detector is matched with the adjustable resistor to detect the working current value in the integrated circuit at the moment and output a signal value;
the stabilizing branch consists of a plurality of capacitors to form a capacitor, so that voltage sudden change is prevented, overvoltage in a peak state is absorbed, and parameter stability is effectively guaranteed.
In a further embodiment, the current detection circuit includes: the circuit comprises an amplifier U3A, a capacitor C2, a capacitor C3, a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6, a current detector U4, a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9 and a capacitor C10;
specifically, the signal amplification branch route is as follows: the amplifier U3A, the capacitor C2 and the capacitor C3;
the stabilizing branch circuit consists of a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9 and a capacitor C10;
the detection branch circuit comprises a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6 and a current detector U4.
In a further embodiment, a current signal is input to pin No. 3 of an amplifier U3A, a pin No. 8 of the amplifier U3A is connected to one end of a capacitor C2 and inputs an operating voltage, the other end of the capacitor C2 is grounded, a pin No. 2 of the amplifier U3A is connected to one end of a capacitor C3 and inputs the operating voltage, a pin No. 4 of the amplifier U3A is connected to the other end of a capacitor C3 and grounded, a pin No. 1 of the amplifier U3A is connected to one end of a capacitor C1, a pin No. 1 of a current detector U4 is connected to one end of a capacitor C1, pins No. 7 and 8 of a current detector U4 are connected to one end of a capacitor C4 and grounded, a pin No. 9 of the current detector U4 is simultaneously connected to one end of a resistor R5 and one end of a resistor R5, the other end of a resistor R5 is grounded, the other end of a resistor R4 is connected to a control end of an adjustable resistor RV1, one end of an adjustable resistor 1 is connected to one end of the capacitor C11 and inputs the voltage, the other end of the capacitor C11 is grounded, the pin No. 14 of the current detector U4 is connected with the other end of the adjustable resistor RV1, one end of the capacitor C5 is connected with one end of the capacitor C6 and inputs working voltage, the other end of the capacitor C5 is grounded, the other end of the capacitor C6 is connected with the pin No. 4 of the current detector U4, the pin No. 10 of the current detector U4 is grounded, the pin No. 6 of the current detector U4 is connected with one end of the capacitor C8, one end of the capacitor C7 and one end of the inductor L1, the other end of the capacitor C8 is connected with the other end of the capacitor C7 and grounded, the other end of the inductor L1 is connected with one end of the capacitor C10 and one end of the capacitor C9 and outputs signals, and the other end of the capacitor C10 is connected with the other end of the capacitor C9 and grounded.
In one embodiment, the electromagnetic interference is smaller relative to the working signal of the circuit, the frequency of the electromagnetic interference is higher than that of the signal, when some high-frequency signals with lower amplitude are superposed on a low-frequency signal with larger amplitude, the interference changes due to the change of voltage, so that the change coefficient of the integrated circuit at the moment can be calculated by the calculating module, and the integrated circuit is suitable for more occasions.
In one embodiment, the oscillometric module is comprised of a filter circuit and a display;
specifically, the filter circuit includes: the circuit comprises an amplifier U1A, an amplifier U1B, a resistor R1, a resistor R3, a resistor R3 and a photoelectric coupler U2;
more specifically, pin 2 of the amplifier U1A is connected to one end of the resistor R2 and pin 2 of the photocoupler U2, pin 8 of the amplifier U1A and pin 3 of the photocoupler U2 input operating voltage, pin 1 of the amplifier U1A is connected to one end of the resistor R1, pin 1 of the photocoupler U2 is connected to the other end of the resistor R1, the other end of the resistor R2 inputs a detection signal, pin 4 of the photocoupler U2, pin 3 of the amplifier U1A, pin No. 4 is grounded, pin No. 6 of photocoupler U2 is connected with one end of resistor R3 and pin No. 6 of amplifier U1B simultaneously, pin No. 5 of photocoupler U2 is connected with pin No. 6 and 8 of amplifier U1B and pin No. 8 is connected with the isolation end, pin No. 4 of amplifier U1B inputs operating voltage, and pin No. 7 of amplifier U1B is connected with the other end of resistor R3 and outputs signals.
The working principle is as follows: when the integrated circuit is subjected to electromagnetic anti-interference performance testing, the terminal is controlled to issue a working branch circuit, then the detection module works, the integrated circuit is electrified, the current is input into the detection module through the current, the amplifier U3A receives a signal and performs constant value amplification on the current signal, the current signal is output to the detection branch circuit through the output end, stable input is performed through the capacitor C1, the current detector converts an effective current value into direct current, the square and average values of the input signal can be calculated continuously and in real time, the obtained direct current voltage value is in direct proportion to the effective value of the input signal, a signal value is output through the No. 6 pin of the current detector U4, and the protection output is performed through the stable circuit to the calculation module;
the calculation module receives the signal, so that the current value and the frequency at the moment are calculated; the working voltage condition of combining this moment can obtain the electromagnetic interference coefficient this moment, is according to the difference of job occasion size to obtain electromagnetic interference killing feature under the different occasions, thereby with data transmission to oscillography module, oscillography module received signal reduces the clutter in detecting through filter circuit, is to obtain the wave form stable, thereby shows on the display, and then produces image transmission to the control end through the report module.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, however, the present invention is not limited to the details of the above embodiments, and the technical concept of the present invention can be modified to perform various equivalent transformations, which all belong to the protection scope of the present invention.
Claims (7)
1. An apparatus for detecting electromagnetic immunity of an integrated circuit, comprising: detection module
The detection module comprises a current detection circuit;
the current detection circuit consists of a signal amplification branch, a stabilization branch and a detection branch;
the signal amplification branch is specifically used for amplifying signal multiples by an amplifier;
the detection branch routing detector is matched with the adjustable resistor to detect the working current value in the integrated circuit at the moment and output a signal value;
the stable branch consists of a plurality of capacitors to form a capacitor, so that voltage sudden change is prevented, overvoltage in a peak state is absorbed, and parameter stability is effectively guaranteed.
2. The apparatus of claim 1, wherein the current detection circuit comprises an amplifier U3A, a capacitor C2, a capacitor C3, a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6, a current detector U4, a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9, and a capacitor C10.
3. The apparatus of claim 2, wherein the signal amplification branch routes: the amplifier U3A, the capacitor C2 and the capacitor C3.
4. The apparatus of claim 2, wherein the stabilizing branch is formed by a capacitor C7, a capacitor C8, an inductor L1, a capacitor C9 and a capacitor C10.
5. The apparatus of claim 2, wherein the detection branch comprises a capacitor C1, an adjustable resistor RV1, a resistor R4, a resistor R5, a capacitor C11, a capacitor C4, a capacitor C5, a capacitor C6, and a current detector U4.
6. The apparatus as claimed in claim 2, wherein pin 3 of amplifier U3A inputs a current signal, pin 8 of amplifier U3A is connected to one end of capacitor C2 and inputs an operating voltage, the other end of capacitor C2 is grounded, pin 2 of amplifier U3A is connected to one end of capacitor C3 and inputs an operating voltage, pin 4 of amplifier U3A is connected to the other end of capacitor C3 and is grounded, pin 1 of amplifier U3A is connected to one end of capacitor C1, pin 1 of current detector U4 is connected to one end of capacitor C1, pins 7 and 8 of current detector U4 are connected to one end of capacitor C4, the other end of capacitor C4 is grounded, pin 9 of current detector U4 is connected to one end of resistor R4 and one end of resistor R5, the other end of resistor R5 is grounded, the other end of resistor R4 is connected to a control terminal 493 1 of adjustable resistor R3528, one end of an adjustable resistor RV1 is connected with one end of a capacitor C11 and voltage is input, the other end of a capacitor C11 is grounded, the pin 14 of a current detector U4 is connected with the other end of the adjustable resistor RV1, one end of a capacitor C5 and one end of a capacitor C6 at the same time and working voltage is input, the other end of a capacitor C5 is grounded, the other end of a capacitor C6 is connected with the pin 4 of the current detector U4, the pin 10 of the current detector U4 is grounded, the pin 6 of a current detector U4 is connected with one end of a capacitor C8, one end of a capacitor C7 and one end of an inductor L1 at the same time and the other end of a capacitor C8 and the other end of a capacitor C7 are connected and grounded, the other end of an inductor L1 is connected with one end of a capacitor C10 and one end of a capacitor C9 and outputs signals, and the other end of a capacitor C10 is connected with the other end of a capacitor C9 and grounded.
7. The apparatus for detecting electromagnetic immunity of an integrated circuit as recited in claim 1, wherein the apparatus further comprises:
the calculation module is connected with the detection module and is used for detecting the current and the frequency at the moment;
the oscillography module is connected with the calculation module and is used for displaying the electromagnetic magnitude at the moment;
and the reporting module is connected with the oscillography module and is used for producing a performance report.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120767772.3U CN214669460U (en) | 2021-04-15 | 2021-04-15 | Integrated circuit electromagnetic interference immunity performance detection device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202120767772.3U CN214669460U (en) | 2021-04-15 | 2021-04-15 | Integrated circuit electromagnetic interference immunity performance detection device |
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| Publication Number | Publication Date |
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| CN214669460U true CN214669460U (en) | 2021-11-09 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202120767772.3U Active CN214669460U (en) | 2021-04-15 | 2021-04-15 | Integrated circuit electromagnetic interference immunity performance detection device |
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- 2021-04-15 CN CN202120767772.3U patent/CN214669460U/en active Active
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Effective date of registration: 20240311 Address after: No. 998, Middle Section of Jiannan Avenue, Chengdu High tech Zone, China (Sichuan) Pilot Free Trade Zone, Sichuan Province, 610200 Patentee after: Chengdu Guojing Enterprise Management Consulting Co.,Ltd. Country or region after: China Address before: 210000 office building 1-186, building a, Waisha village committee, Baguazhou street, Qixia District, Nanjing City, Jiangsu Province Patentee before: Nanjing Sato Testing Technology Co.,Ltd. Country or region before: China |
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Effective date of registration: 20240328 Address after: 830000 Urumqi Economic and Technological Development Zone (Toutunhe District), Xinjiang Uygur Autonomous Region, No. 353 Fenghuangshan Street, Asia Europe Trade Center, No.1 Business Complex Building, Business Office 1319 Patentee after: Xinjiang Guojing Information Technology Co.,Ltd. Country or region after: China Address before: No. 998, Middle Section of Jiannan Avenue, Chengdu High tech Zone, China (Sichuan) Pilot Free Trade Zone, Sichuan Province, 610200 Patentee before: Chengdu Guojing Enterprise Management Consulting Co.,Ltd. Country or region before: China |