CN206259155U - A kind of LED display and its scan control circuit - Google Patents
A kind of LED display and its scan control circuit Download PDFInfo
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- CN206259155U CN206259155U CN201621288837.1U CN201621288837U CN206259155U CN 206259155 U CN206259155 U CN 206259155U CN 201621288837 U CN201621288837 U CN 201621288837U CN 206259155 U CN206259155 U CN 206259155U
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Abstract
The utility model belongs to technical field of LED display, there is provided a kind of LED display and its scan control circuit.In the utility model,By using at least one shift register for including multiple cascades,The LED scan control circuits of multiple column scan control chips and LED array of display,So that shift register exports multiple sampled signals to LED array of display after being sampled to sequence inputting data according to clock signal,To gate row of channels corresponding with sampled signal in LED array of display,Column scan control chip exports column scan control signal to LED array of display,To gate row passage corresponding with column scan control signal in LED array of display,Realize LED scan controls,And the input signal of the LED scan control circuits is simple,PCB layout is simple,Disturbed between line low,Therefore the display quality of LED display can effectively be lifted,Existing LED display is solved to exist because input signal complexity is high,The problem of display quality reduction caused by interference is strong between PCB layout complexity and line.
Description
Technical field
The utility model belongs to technical field of LED display, more particularly to a kind of LED display and its scan control circuit.
Background technology
Have that brightness is high, operating voltage is low due to LED display, small power consumption, maximization, long lifespan, impact resistance and performance
Stabilization the advantages of, LED display is used widely, for example apply stadiums, business application, bank, card Securities, postal service,
Harbour, market, station, postal service, telecommunication, office, monitoring, school, dining room, hotel, amusement, etc. different outdoor locations advertisement a surname
Pass etc..
As shown in figure 1, existing LED display is mainly permanent using three or eight decoders, row scanning control chip and row passage
Flow control chip carries out LED display controls.Wherein, three or eight decoders are swept to the output of row scanning control chip according to input signal
Signal is retouched, so that row scanning control chip exports row scan control signal to LED array of display according to scanning signal, so that and row
Passage current constant control chip controls the display of LED display together.However, existing LED display needs scan control of being expert at
Increase by three or eight decoders between chip and input signal, and multiple signal input parts and output end the need for three or eight decoders, because
This, three or eight decoders increased the complexity of the input signal of existing LED display, printed circuit board (Printed
CircuitBoard, PCB) disturbed between wiring complexity and line, so that the image quality drop of existing LED display
It is low.
In sum, existing LED display exist because input signal complexity is high, PCB layout is complicated and line between do
The problem of display quality reduction caused by disturbing by force.
Utility model content
The purpose of this utility model is to provide a kind of LED display and its scan control circuit, it is intended to which existing LED shows
Display screen exist because input signal complexity is high, PCB layout is complicated and line between interference it is strong caused by display quality reduction ask
Topic.
The utility model is achieved in that a kind of LED scan control circuits, including multiple column scan control chips with
LED array of display, wherein, multiple row passages of multiple output ends of the column scan control chip and the LED array of display
Connect one to one, for exporting column scan control signal to the LED array of display, with gating the LED array of display
Row passage corresponding with the column scan control signal, the LED scan control circuits also include at least one displacement of cascade
Register；
The shift register includes serial signal input, serial signal gating end, serial signal output end and many
Individual data output end；Wherein, the serial signal input receiving sequence input data, the serial signal gating termination time receiving
Clock signal, the cascade that the serial signal output end is used between the shift register, and the sequence inputting data are exported,
Multiple data output end connections corresponding with multiple row of channels one of the LED array of display；
The shift register exports multiple and adopts after being sampled to the sequence inputting data according to the clock signal
Sample signal to the LED array of display, to gate row of channels corresponding with the sampled signal in the LED array of display, and
And the shift register exports the sequence inputting data according to the clock signal.
A further object of the present utility model also resides in a kind of LED display of offer, and the LED display includes above-mentioned
LED display controls circuit.
In the utility model, by using at least one shift register for including multiple cascades, multiple column scan controls
The LED scan control circuits of coremaking piece and LED array of display so that shift register is according to clock signal to sequence inputting number
It is corresponding with sampled signal in LED array of display to gate according to exporting multiple sampled signals to LED array of display after being sampled
Row of channels, column scan control chip exports column scan control signal to LED array of display, with gate in LED array of display with row
The corresponding row passage of scan control signal, and then LED scan controls are realized, and the LED scan control circuits only need level
At least one shift register of connection just can realize LED row scan controls, and its input signal is simple, PCB layout simple, and between line
Interference is low, so as to improve the display quality of LED display, solves existing LED display and exists because input signal is complicated
The problem of display quality reduction caused by degree is high, interference is strong between PCB layout complexity and line.
Brief description of the drawings
Fig. 1 is the electrical block diagram of existing LED scan control circuits；
Fig. 2 is the modular structure schematic diagram of the LED scan control circuits that the embodiment of the utility model one is provided；
Fig. 3 is the circuit knot of the shift register in the LED scan control circuits that the embodiment of the utility model one is provided
Structure schematic diagram；
Fig. 4 is the modular structure schematic diagram of the LED scan control circuits that another embodiment of the utility model is provided；
Fig. 5 is the modular structure schematic diagram of the LED scan control circuits that the another embodiment of the utility model is provided；
Fig. 6 is the electrical block diagram of the second drive module in the LED scan control circuits shown in Fig. 5；
Fig. 7 is the sequential principle schematic of the LED scan control circuits that the embodiment of the utility model one is provided.
Specific embodiment
In order that the purpose of this utility model, technical scheme and advantage become more apparent, below in conjunction with accompanying drawing and implementation
Example, is further elaborated to the utility model.It should be appreciated that specific embodiment described herein is only used to explain
The utility model, is not used to limit the utility model.
Realization of the present utility model is described in detail below in conjunction with specific accompanying drawing：
Fig. 2 shows the modular structure of the LED scan control circuits that the embodiment of the utility model one is provided, for the ease of
Illustrate, illustrate only the part related to the utility model embodiment, details are as follows：
As shown in Fig. 2 the LED scan control circuits 10 that the utility model embodiment is provided include multiple row control chips
100 (one is only shown in figure) and LED array of display 101.Wherein, multiple output ends of column scan control chip 100 show with LED
Show that multiple row passages of array 101 connect one to one, for exporting column scan control signal to LED array of display 101, to select
Row passage corresponding with column scan control signal in logical LED array of display 100.
Further, as shown in Fig. 2 the LED scan control circuits 10 that the utility model embodiment is provided also include level
At least one shift register 102 of connection.
Wherein, shift register 102 include serial signal input, serial signal gating end, serial signal output end with
And multiple data output ends.
Specifically, serial signal input DIN receiving sequence input datas, serial signal gating end C reception clock signals,
The cascade that serial signal output end DOUT is used between shift register 102, and output sequence input data, multiple data outputs
End OU1-OUTn connections corresponding with multiple row of channels one of LED array of display 101.
Shift register 102 exports multiple sampled signals extremely after being sampled to sequence inputting data according to clock signal
LED array of display 101, to gate row of channels corresponding with sampled signal in LED array of display 101, and shift register 102
According to clock signal output sequence input data.
Further, first serial signal input DIN receiving sequence input data of shift register 102, and
The disconnected C of serial signal gating of each shift register 102 receives clock signal, first serial signal of shift register 102
Output end DOUT is connected with the serial signal input DIN of second shift register 102, second shift register 102
Serial signal output end DOUT and the 3rd serial signal input DIN connection of shift register 102, it is by that analogy, multiple
The serial signal input DIN of last shift register 102 and penultimate shift register in shift register 102
102 serial signal output end DOUT connections, realize the cascade of multiple shift registers 102 with this, and each shift register
Multiple row of channels in 102 multiple data output end OU1-OUTn and LED array of display 101 connect one to one.
Wherein, sequence inputting data are sent to first shift register 102 by data/address bus by front-end circuit, when
Clock signal is sent to multiple shift registers 102 by data/address bus by front-end circuit.When first shift register
After 102 receive sequence inputting data, clock signal is sampled to the sequence inputting data, and by the shift register
102 multiple data output end OU1-OUTn export multiple sampled signals to multiple row of channels of LED array of display 101, with
Realize the gating control of the row of channels in LED array of display 101；Additionally, when first shift register, 102 pairs of sequences of reception
After the completion of the sampling of input data, in the presence of clock signal, first shift register 102 is exported by its serial signal
The sequence inputting data are sequentially displaced to second shift register 102 of cascade by end DOUT, so that second shift LD
Device 102 starts sampling in the presence of clock signal, and it is logical to multiple rows of LED array of display 101 to export multiple sampled signals
Road, after the completion of second shift register, 102 pairs of samplings of the sequence inputting data of reception, in the presence of clock signal,
The sequence inputting data are sequentially displaced to the 3rd level by second shift register 102 by its serial signal output end DOUT
The shift register 102 of connection, so that the 3rd shift register 102 starts sampling in the presence of clock signal, and exports many
Individual sampled signal to LED array of display 101 multiple row of channels, by that analogy, when penultimate shift register 102 is docked
After the completion of the sampling of the sequence inputting data of receipts, in the presence of clock signal, each and every one shift register 102 second from the bottom passes through
The sequence inputting data are sequentially displaced to its serial signal output end DOUT the shift register 102 of last cascade, with
Make last shift register 102 start sampling in the presence of clock signal, and export multiple sampled signals to show to LED
Multiple row of channels of array 101, so as to realize the cascade of multiple shift registers 102.
It should be noted that sequence inputting data of the shift register 102 to receiving under clock signal effect are adopted
The process of sample is：When clock signal is high level, the sequence that shift register 102 is received to its serial signal input DIN
Input data is sampled, and when clock signal is low level, shift register 102 is exported to LED array of display 101 and sampled
As a result, i.e. sampled signal.
After first shift register 102 completes the sampling of the sequence inputting data received to it, in clock letter
In the presence of number, by serial signal output end DOUT be sequentially displaced to sequence inputting data by first shift register 102
The shift register 102 of next cascade, i.e., in second shift register 102 so that second shift register 102 when
The sequence inputting data for receiving are sampled in the presence of clock signal, by that analogy, when penultimate shift register 102
After completing the sampling of the sequence inputting data received to it, in the presence of clock signal, penultimate shift LD
Sequence inputting data are sequentially displaced to last shift register 102 by device 102 by serial signal output end DOUT, so that
Sequence inputting data of last shift register 102 to receiving in the presence of clock signal are sampled；It is worth noting
, each shift register 102 is identical to the process that sequence inputting data are sampled according to clock signal, specifically may be used
With reference to the principle that first shift register 102 is sampled according to clock signal to sequence inputting data, here is omitted.
Additionally, the column scan control chip in the LED scan control circuits 10 that are provided of the utility model embodiment, 100
It is to be realized by row passage current constant control chip, the control of gating that it enters ranks passage to LED array of display 101 is and existing
The row passage gating method of LED display is identical, specifically refers to the logical gating method of column selection of existing LED display, herein
Repeat no more；And the LED array of display 101 in the LED scan control circuits 10 that the utility model embodiment is provided with it is existing
LED array of display in some LED displays is identical, is equally made up of the light emitting diode of multiple lines and multiple rows, herein equally no longer
It is described in detail.
In the present embodiment, sequence inputting data are read using shift register 102, and then according to clock signal to sequence
Input data is sampled, to export sampled signal to LED array of display 101, so as to realize the scan control of LED display,
Three or eight traditional decoders are eliminated, the input signal complexity for reducing the LED display brought by three or eight decoders is high,
Interference is strong between PCB layout complexity and line, so as to improve the image efficiency of LED display.
Additionally, the row of channels for realizing LED array of display 101 using at least one shift register 102 of cascade gates control
System, can cause that the LED scan control circuits 10 practical various sizes of LED display that the utility model embodiment is provided is swept
Retouch.
Further, as the preferred embodiment of the utility model one, as shown in figure 3, shift register 102 is main by many
Individual trigger FF1-FFn and a buffer 102a composition.Wherein, the clock signal terminal C of multiple trigger FF1-FFn is constituted
The serial signal gating end C of shift register 102, and clock signal is received, the signal input part D of first trigger FF1 is
The output end Q of serial signal the input DIN, multiple trigger FF1-FFn of shift register 102 is shift register 102
Multiple data output end OU1-OUTn, and the output end Q of first trigger FF1 is defeated with the signal of second trigger FF2
Enter and hold D to connect, second output end Q of trigger FF2 is connected with the signal input part D of the 3rd trigger FF3, with such
Push away, (n-1)th signal output part Q of trigger FFn-1 is connected with the signal input part D of n-th trigger FFn, and n-th is touched
The output end Q of hair device FFn is connected with the input of buffer 102a, and the output end of buffer is the serial of shift register 102
Signal output part DOUT.
Further, as the preferred embodiment of the utility model one, as shown in figure 4, the utility model embodiment is provided
LED scan control circuits 10 also include multiple first drive module A1-An.
Wherein, multiple data output end OU1- of the input of multiple first drive module A1-An and shift register 102
OUTn connects one to one, the output end of multiple first drive module A1-An and multiple row of channels one of LED array of display 101
One correspondence connection.
Specifically, multiple first drive module A1-An receive sampled signals, and sampled signal is driven defeated after treatment
Go out to LED array of display 101.
Further, as the preferred embodiment of the utility model one, multiple first drive module A1-An can be using tactile
Hair device is realized.
In the utility model embodiment, by increasing multiple first drive module A1- in LED scan control circuits 10
An, and the driving force of output to the signal in LED array of display 101 is improved with this, and then cause LED display display picture
More smooth, image quality is more excellent.
Further, as the preferred embodiment of the utility model one, as shown in figure 5, the utility model embodiment is provided
LED scan control circuits 10 also include multiple second drive module B1-Bn.
The first input end of the second drive module B1-Bn of multiple receives output and enables control signal, and multiple second drives
Second input of module B1-Bn connects one to one with multiple data output end OUT1-OUTn of shift register 102, many
The output end of individual second drive module B1-Bn connects one to one with multiple row of channels of LED array of display 101.
Specifically, multiple second drive module B1-Bn receive sampled signal enables control signal with output, and according to sampling
Signal enables control signal and exports scanning signal to LED array of display with output, with gate in LED array of display 101 with scanning
The corresponding row of channels of signal.
Further, as the preferred embodiment of the utility model one, as shown in fig. 6, multiple second drive module B1-Bn
Including the first buffer buf1, delayer Delay, the second buffer buf2, first switch element M1 and second switch element
M2
Wherein, the first input end of the first buffer buf1 is the first input end of the second drive module B1-Bn, and first delays
Second input of storage buf1 receives operating voltage VDD, and is connected with the input of first switch element M1, the first buffer
The output end of buf1 is connected with the control end of first switch element M1, output end and the second switch element of first switch element M1
The input of M2 connects the output end to form multiple second drive module B1-Bn altogether, and the first input end of delayer Delay is multiple
Second input of the second drive module B1-Bn, second input of delayer Delay is defeated with the second of the second buffer buf2
Enter end and receive operating voltage, the output end of delayer Delay is connected with the first input end of the second buffer buf2, second delays
The output end of storage buf2 is connected with the control end of second switch element M2, the output head grounding of second switch element M2.
It should be noted that in the utility model embodiment, delayer Delay includes but is not limited to phase inverter, caching
Device etc..
Additionally, first switch element M1 is PMOS transistor, the grid of PMOS transistor is the control of first switch element M1
End processed, the source electrode of PMOS transistor is the input of first switch element M1, and the drain electrode of PMOS transistor is first switch element
The output end of M1；Second switch element M2 is nmos pass transistor, and the grid of nmos pass transistor is the control of second switch element M2
End, the drain electrode of nmos pass transistor is the input of second switch element M2, and the source electrode of nmos pass transistor is second switch element M2
Output end.
It is worth noting that, in other embodiments, first switch element M1 can also be used with second switch element M2
Triode is realized, for example, when first switch element is PNP type triode, the base stage of the PNP type triode is first switch unit
The control end of part M1, the current collection extremely output end of first switch element M1, the hair of the PNP type triode of the PNP type triode
Emitter-base bandgap grading is the input of first switch element M1；When second switch element M2 is NPN type triode, the NPN type triode
Base stage is the control end of second switch element M2, and the current collection extremely input of second switch element M2 of the NPN type triode should
The transmitting extremely output end of second switch element M2 of NPN type triode.
In the utility model embodiment, by increasing multiple second drive module B1- in LED scan control circuits 10
Bn, and the driving force of output to the signal in LED array of display 101 is improved with this, and then cause LED display display picture
More smooth, image quality is more excellent.
Below with the LED scan control circuits 10 shown in the modular structure of the LED scan control circuits 10 shown in Fig. 2, Fig. 3
In shift register circuit structure and Fig. 7 shown in sequential schematic diagram as a example by, the utility model embodiment is provided
The operation principle of LED scan control circuits 10 illustrate, details are as follows：
First, Fig. 3 and Fig. 7 is please also refer to, shift register 102 is defeated to the sequence that its serial input terminal DIN is received
Enter the process that data are sampled to be specially：
When the high level of a cycle of clock signal comes interim, height electricity of first trigger FF1 in clock signal
The sequence inputting data for receiving are sampled under flat effect, and will be adopted in the low level of a cycle of clock signal
First sampled signal of sample is exported to first row of channels of LED array of display 101 by its data output end OUT1, to select
First row of channels of logical LED array of display 101, while sequence inputting data are sent into second trigger FF2；Work as clock
The high level of the second period of signal comes interim, and second trigger FF2 is under the high level effect of clock signal to receiving
Sequence inputting data sampled, and in the low level of the second period of clock signal by sample second sampling
Signal is exported to second row of channels of LED array of display 101, to gate LED array of display by its data output end OUT2
101 second row of channels, while sequence inputting data are sent into the 3rd trigger FF3；When the 3rd of clock signal
The high level in cycle comes interim, sequence inputting numbers of the 3rd trigger FF3 under the high level effect of clock signal to receiving
According to being sampled, and the 3rd sampled signal sampled is counted by it in the low level in the 3rd cycle of clock signal
Exported according to output end OUT3 to the 3rd row of channels of LED array of display 101, to gate the 3rd row of LED array of display 101
Passage, while sequence inputting data are sent into second trigger FF2；By that analogy, when n-th cycle of clock signal
High level comes interim, and sequence inputting data of n-th trigger FFn to receiving under the high level effect of clock signal are adopted
Sample, and n-th sampled signal sampled is passed through into its data output end in the low level in n-th cycle of clock signal
OUTn is exported to n-th row of channels of LED array of display 101, to gate n-th row of channels of LED array of display 101, so that
The progressive scan of LED array of display 101 is realized, while sequence inputting data are transmitted buffer 102a by n-th trigger FFn
In.
Further, Fig. 2, Fig. 3 and Fig. 7 are please also refer to, after the completion of the n cycle of clock signal, and (n+1)th
The high level of clock cycle comes interim, and buffer 102a is by the shift register of the sequence inputting data output to next cascade
102 first trigger FF1, so that multiple triggers of the shift register 102 of cascade start to enter sequence inputting data
The multiple trigger roots in previous stage shift register 102 when row sampling, n cycle before sampling process and clock signal
Identical to the sampling process of sequence inputting data according to clock signal, here is omitted；And n cycle again for working as clock signal is complete
Cheng Hou, and when the high level of a cycle in next n cycle of clock cycle comes interim, this grade of shift register 102
Sequence inputting data are resent to by next stage shift register 102 by its serial signal output end DOUT, and cause that its is heavy
Multiple said process, so circulation, to realize the scan control of LED display.
Further, the utility model embodiment also provides a kind of LED display, and the LED display includes that LED scans control
Circuit processed 10, by the LED display that the utility model embodiment is provided is that the LED provided based on Fig. 2 to Fig. 7 scans control
What circuit processed 10 was realized, the principle of the LED display provided accordingly, with respect to the utility model embodiment refers to above-mentioned Fig. 2
Into Fig. 7 to the specific descriptions of scan control circuit 10, here is omitted.
In the utility model, by using at least one shift register for including multiple cascades, multiple column scan controls
The LED scan control circuits of coremaking piece and LED array of display so that shift register is according to clock signal to sequence inputting number
It is corresponding with sampled signal in LED array of display to gate according to exporting multiple sampled signals to LED array of display after being sampled
Row of channels, column scan control chip exports column scan control signal to LED array of display, with gate in LED array of display with row
The corresponding row passage of scan control signal, and then LED scan controls are realized, and the LED scan control circuits only need level
At least one shift register of connection just can realize LED row scan controls, and its input signal is simple, PCB layout simple, and between line
Interference is low, so as to improve the display quality of LED display, solves existing LED display and exists because input signal is complicated
The problem of display quality reduction caused by degree is high, interference is strong between PCB layout complexity and line.
Preferred embodiment of the present utility model is the foregoing is only, is not used to limit the utility model, it is all at this
Any modification, equivalent and improvement made within the spirit and principle of utility model etc., should be included in the utility model
Protection domain within.
Claims (8)
1. a kind of LED scan control circuits, including multiple column scan control chips and LED array of display, wherein, the column scan
Multiple output ends of control chip connect one to one with multiple row passages of the LED array of display, for exporting column scan
Control signal to the LED array of display, to gate row corresponding with the column scan control signal in the LED array of display
Passage, it is characterised in that the LED scan control circuits also include at least one shift register of cascade；
The shift register includes serial signal input, serial signal gating end, serial signal output end and many numbers
According to output end；Wherein, the serial signal input receiving sequence input data, the serial signal gating termination time receiving clock letter
Number, the cascade that the serial signal output end is used between the shift register, and the sequence inputting data are exported, it is multiple
Data output end connection corresponding with multiple row of channels one of the LED array of display；
The shift register exports multiple sampling letters after being sampled to the sequence inputting data according to the clock signal
Number to the LED array of display, to gate row of channels corresponding with the sampled signal in the LED array of display, and institute
State shift register and the sequence inputting data are exported according to the clock signal.
2. LED scan control circuits according to claim 1, it is characterised in that the LED scan control circuits also include
Multiple first drive modules；
The input of multiple first drive modules connects one to one with multiple data output ends of the shift register,
The output end of multiple first drive modules connects one to one with multiple row of channels of the LED array of display；
First drive module receives the sampled signal, and the sampled signal is driven after treatment and exports to described
LED array of display.
3. LED scan control circuits according to claim 2, it is characterised in that first drive module is buffer.
4. LED scan control circuits according to claim 1, it is characterised in that the LED scan control circuits also include
Multiple second drive modules；
The first input end of multiple second drive modules receives output and enables control signal, and multiple described second drive mould
Second input of block connects one to one with multiple data output ends of the shift register, and multiple described second drive mould
The output end of block connects one to one with multiple row of channels of the LED array of display；
Second drive module receives the sampled signal and enables control signal with the output, and according to the sampled signal
Enable control signal with the output and export scanning signal to the LED array of display, with gate in the LED array of display with
The corresponding row of channels of the scanning signal.
5. LED scan control circuits according to claim 4, it is characterised in that multiple second drive modules are wrapped
Include：
First buffer, delayer, the second buffer, first switch element and second switch element；
The first input end of first buffer is the first input end of multiple second drive modules, first caching
Second input of device receives operating voltage, and is connected with the input of the first switch element, first buffer
Output end is connected with the control end of the first switch element, output end and the second switch unit of the first switch element
The input of part connects the output end to form multiple second drive modules altogether, and the first input end of the delayer is multiple institutes
State the second input of the second drive module, the second input of the second input of the delayer and second buffer
The operating voltage is received, the output end of the delayer is connected with the first input end of second buffer, described
The output end of two buffers is connected with the control end of the second switch element, the output head grounding of the second switch element.
6. LED scan control circuits according to claim 5, it is characterised in that the first switch element is PMOS brilliant
Body pipe, the grid of the PMOS transistor is the control end of the first switch element, and the source electrode of the PMOS transistor is institute
The input of first switch element is stated, the drain electrode of the PMOS transistor is the output end of the first switch element.
7. LED scan control circuits according to claim 5, it is characterised in that the second switch element is NMOS brilliant
Body pipe, the grid of the nmos pass transistor is the control end of the second switch element, and the drain electrode of the nmos pass transistor is institute
The input of second switch element is stated, the source electrode of the nmos pass transistor is the output end of the second switch element.
8. a kind of LED display, it is characterised in that the LED display includes the LED as described in any one of claim 1 to 7
Scan control circuit.
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| CN201621288837.1U CN206259155U (en) | 2016-11-28 | 2016-11-28 | A kind of LED display and its scan control circuit |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106652888A (en) * | 2016-11-28 | 2017-05-10 | 深圳市富满电子集团股份有限公司 | LED display screen and scanning control circuit thereof |
| CN108109578A (en) * | 2017-12-06 | 2018-06-01 | 海尔优家智能科技（北京）有限公司 | The circuit and method that control LED is shown |
| CN110751924A (en) * | 2019-12-03 | 2020-02-04 | 深圳市思坦科技有限公司 | Micro-LED display screen controlled in split screen mode |
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2016
- 2016-11-28 CN CN201621288837.1U patent/CN206259155U/en active Active
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106652888A (en) * | 2016-11-28 | 2017-05-10 | 深圳市富满电子集团股份有限公司 | LED display screen and scanning control circuit thereof |
| CN108109578A (en) * | 2017-12-06 | 2018-06-01 | 海尔优家智能科技（北京）有限公司 | The circuit and method that control LED is shown |
| CN110751924A (en) * | 2019-12-03 | 2020-02-04 | 深圳市思坦科技有限公司 | Micro-LED display screen controlled in split screen mode |
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Address after: 518000, Building 101, Fuman Microelectronics Group Co., Ltd., Intersection of Renmin East Road and Shouhe Road, Jinsha Community, Kengzi Street, Pingshan District, Shenzhen City, Guangdong Province Patentee after: Fuman microelectronics Group Co.,Ltd. Country or region after: China Address before: 518000 1701, building 1, Shenzhen new generation industrial park, 136 Zhongkang Road, Meidu community, Meilin street, Futian District, Shenzhen City, Guangdong Province Patentee before: Fuman microelectronics Group Co.,Ltd. Country or region before: China |