CN106652888A - LED display screen and scanning control circuit thereof - Google Patents
LED display screen and scanning control circuit thereof Download PDFInfo
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- CN106652888A CN106652888A CN201611067358.1A CN201611067358A CN106652888A CN 106652888 A CN106652888 A CN 106652888A CN 201611067358 A CN201611067358 A CN 201611067358A CN 106652888 A CN106652888 A CN 106652888A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps
- Y02B20/40—Control techniques providing energy savings, e.g. smart controller or presence detection
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- Theoretical Computer Science (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Control Of El Displays (AREA)
Abstract
The invention belongs to the technical field of LED display, and provides an LED display screen and a scanning control circuit thereof. At least one shift register comprising multiple cascades, multiple column scanning control chips and an LED scanning control circuit of an LED display array are adopted so that the shift register is enabled to sample sequential input data according to a clock signal and then output multiple sampling signals to the LED display array to gate row channels corresponding to the sampling signals in the LED display array, the column scanning control chips output column scanning control signals to the LED display array to gate column channels corresponding to the column scanning control signals in the LED display array, and thus LED scanning control can be realized. Besides, the LED scanning control circuit is simple in input signal, simple in PCB wiring and low in inter-line interference so that the display quality of an LED display screen can be effectively enhanced, and the problem of reduction of the display quality of the existing LED display screen caused by high signal complexity, complex PCB wiring and high inter-line interference can be solved.
Description
Technical field
The invention belongs to technical field of LED display, more particularly to a kind of LED display and its scan control circuit.
Background technology
Because LED display has brightness height, low operating voltage, small power consumption, maximization, life-span length, impact resistance and performance
The advantages of stable, LED display is used widely, for example apply stadiums, business application, bank, card Securities, postal service,
Harbour, market, station, postal service, telecommunication, office, monitoring, school, dining room, hotel, amusement, etc. different outdoor locations advertisement a surname
Pass etc..
As shown in figure 1, existing LED display is mainly permanent using three or eight decoders, row scanning control chip and row passage
Flow control chip carries out LED display controls.Wherein, three or eight decoders are swept to the output of row scanning control chip according to input signal
Retouch signal so that row scanning control chip exports row scan control signal to LED array of display according to scanning signal, so as to and row
Passage current constant control chip controls together the display of LED display.However, existing LED display needs scan control of being expert at
Three or eight decoders of increase between chip and input signal, and the multiple signal input parts of needs of three or eight decoders and output end, because
This, three or eight decoders increased the complexity of the input signal of existing LED display, printed circuit board (Printed
Circuit Board, PCB) disturb between wiring complexity and line, so that the image quality drop of existing LED display
It is low.
In sum, existing LED display is present because doing between input signal complexity height, PCB layout complexity and line
Disturb the problem that strong and caused display quality is reduced.
The content of the invention
It is an object of the invention to provide a kind of LED display and its scan control circuit, it is intended to existing LED display
There is a problem of because input signal complexity is high, disturb strong and caused display quality to reduce between PCB layout complexity and line.
The present invention is achieved in that a kind of LED scan control circuits, including multiple column scan control chips show with LED
Show array, wherein, a pair of multiple row passages one of multiple output ends of the column scan control chip and the LED array of display
Should connect, for exporting column scan control signal to the LED array of display, to gate the LED array of display in it is described
The corresponding row passage of column scan control signal, the LED scan control circuits also include at least one shift register of cascade；
The shift register includes serial signal input, serial signal gating end, serial signal output end and many
Individual data output end；Wherein, the serial signal input receiving sequence input data, the serial signal gating termination time receiving
Clock signal, the cascade that the serial signal output end is used between the shift register, and the sequence inputting data are exported,
The connection corresponding with multiple row of channels one of the LED array of display of multiple data output ends；
The shift register exports multiple adopting after sampling to the sequence inputting data according to the clock signal
Sample signal to the LED array of display, to gate the LED array of display in row of channels corresponding with the sampled signal, and
And the shift register exports the sequence inputting data according to the clock signal.
A further object of the present invention also resides in a kind of LED display of offer, and the LED display is aobvious including above-mentioned LED
Display screen control circuit.
In the present invention, by using at least one shift register, the multiple column scans control core for including multiple cascades
The LED scan control circuits of piece and LED array of display so that shift register enters according to clock signal to sequence inputting data
Row sampling after export multiple sampled signals to LED array of display, to gate LED array of display in row corresponding with sampled signal lead to
Road, column scan control chip to LED array of display export column scan control signal, to gate LED array of display in column scan
The corresponding row passage of control signal, and then LED scan controls are realized, and the LED scan control circuits only need what is cascaded
At least one shift register is just capable of achieving LED row scan controls, and its input signal is simple, PCB layout simple, and disturbs between line
It is low, so as to improve the display quality of LED display, solve existing LED display and exist because input signal complexity is high,
The problem for disturbing strong and caused display quality to reduce between PCB layout complexity and line.
Description of the drawings
Fig. 1 is the electrical block diagram of existing LED scan control circuits；
Fig. 2 is the modular structure schematic diagram of the LED scan control circuits that one embodiment of the invention is provided；
Fig. 3 is that the circuit structure of the shift register in the LED scan control circuits that one embodiment of the invention is provided shows
It is intended to；
Fig. 4 is the modular structure schematic diagram of the LED scan control circuits that another embodiment of the present invention is provided；
Fig. 5 is the modular structure schematic diagram of the LED scan control circuits that further embodiment of this invention is provided；
Fig. 6 is the electrical block diagram of the second drive module in the LED scan control circuits shown in Fig. 5；
Fig. 7 is the sequential principle schematic of the LED scan control circuits that one embodiment of the invention is provided.
Specific embodiment
In order that the objects, technical solutions and advantages of the present invention become more apparent, it is right below in conjunction with drawings and Examples
The present invention is further elaborated.It should be appreciated that specific embodiment described herein is only to explain the present invention, and
It is not used in the restriction present invention.
It is described in detail below in conjunction with realization of the concrete accompanying drawing to the present invention：
Fig. 2 shows the modular structure of the LED scan control circuits that one embodiment of the invention is provided, for the ease of saying
It is bright, the part related to the embodiment of the present invention is illustrate only, details are as follows：
As shown in Fig. 2 LED scan control circuits 10 provided in an embodiment of the present invention include multiple row control chips 100 (figure
In only illustrate one) with LED array of display 101.Wherein, multiple output ends of column scan control chip 100 and LED array of display
101 multiple row passages connect one to one, for exporting column scan control signal to LED array of display 101, to gate LED
Row passage corresponding with column scan control signal in array of display 100.
Further, as shown in Fig. 2 the LED scan control circuits 10 that the embodiment of the present invention is provided also include cascade
At least one shift register 102.
Wherein, shift register 102 include serial signal input, serial signal gating end, serial signal output end with
And multiple data output ends.
Specifically, serial signal input DIN receiving sequence input datas, serial signal gating end C receives clock signal,
The cascade that serial signal output end DOUT is used between shift register 102, and output sequence input data, multiple data outputs
End OU1-OUTn connections corresponding with multiple row of channels one of LED array of display 101.
Shift register 102 exports multiple sampled signals extremely after sampling to sequence inputting data according to clock signal
LED array of display 101, to gate LED array of display 101 in row of channels corresponding with sampled signal, and shift register 102
According to clock signal output sequence input data.
Further, the serial signal input DIN receiving sequence input datas of first shift register 102, and
The disconnected C of serial signal gating of each shift register 102 receives clock signal, the serial signal of first shift register 102
Output end DOUT is connected with the serial signal input DIN of second shift register 102, second shift register 102
The serial signal input DIN connections of serial signal output end DOUT and the 3rd shift register 102, it is by that analogy, multiple
The serial signal input DIN of last shift register 102 and penultimate shift register in shift register 102
102 serial signal output end DOUT connection, with this cascade of multiple shift registers 102 is realized, and each shift register
Multiple row of channels in 102 multiple data output end OU1-OUTn and LED array of display 101 connect one to one.
Wherein, sequence inputting data are sent to first shift register 102 by data/address bus by front-end circuit, when
Clock signal is sent to multiple shift registers 102 by data/address bus by front-end circuit.When first shift register
102 receive after sequence inputting data, and clock signal is sampled to the sequence inputting data, and by the shift register
102 multiple data output end OU1-OUTn export multiple sampled signals to multiple row of channels of LED array of display 101, with
Realize the gating control of the row of channels in LED array of display 101；Additionally, when the sequence of first shift register, 102 pairs of receptions
After the completion of the sampling of input data, in the presence of clock signal, first shift register 102 is exported by its serial signal
The sequence inputting data are sequentially displaced to end DOUT the shift register 102 of second cascade, so that second shift LD
Device 102 starts sampling in the presence of clock signal, and it is logical to export multiple rows of multiple sampled signals to LED array of display 101
Road, after the completion of the sampling of the sequence inputting data of second shift register, 102 pairs of receptions, in the presence of clock signal,
The sequence inputting data are sequentially displaced to the 3rd level by second shift register 102 by its serial signal output end DOUT
The shift register 102 of connection, so that the 3rd shift register 102 starts sampling in the presence of clock signal, and exports many
Multiple row of channels of individual sampled signal to LED array of display 101, by that analogy, when penultimate shift register 102 is docked
After the completion of the sampling of the sequence inputting data of receipts, in the presence of clock signal, each and every one shift register 102 second from the bottom passes through
The sequence inputting data are sequentially displaced to its serial signal output end DOUT the shift register 102 of last cascade, with
Make last shift register 102 start sampling in the presence of clock signal, and export multiple sampled signals and show to LED
Multiple row of channels of array 101, so as to realize the cascade of multiple shift registers 102.
It should be noted that sequence inputting data of the shift register 102 to receiving under clock signal effect are adopted
The process of sample is：When clock signal is high level, the sequence that shift register 102 is received to its serial signal input DIN
Sampling input data, and when clock signal is low level, shift register 102 to the output of LED array of display 101 is sampled
As a result, i.e. sampled signal.
After first shift register 102 completes the sampling of the sequence inputting data received to it, in clock letter
In the presence of number, first shift register 102 is sequentially displaced to sequence inputting data by serial signal output end DOUT
The next one cascade shift register 102, i.e., in second shift register 102 so that second shift register 102 when
Sequence inputting data in the presence of clock signal to receiving are sampled, by that analogy, when penultimate shift register 102
After completing the sampling of the sequence inputting data received to it, in the presence of clock signal, penultimate shift LD
Sequence inputting data are sequentially displaced to last shift register 102 by device 102 by serial signal output end DOUT, so that
Sequence inputting data of last shift register 102 to receiving in the presence of clock signal are sampled；Merit attention
, each shift register 102 is identical to the process that sequence inputting data are sampled according to clock signal, specifically may be used
With reference to the principle that first shift register 102 is sampled according to clock signal to sequence inputting data, here is omitted.
Additionally, the column scan control chip in the LED scan control circuits 10 that provided of the embodiment of the present invention, 100 be by
What row passage current constant control chip was realized, it enters the gating control of ranks passage to LED array of display 101, aobvious with existing LED
The row passage gating method of display screen is identical, specifically refers to the logical gating method of column selection of existing LED display, no longer goes to live in the household of one's in-laws on getting married herein
State；And the LED array of display 101 in the LED scan control circuits 10 that the embodiment of the present invention is provided shows with existing LED
LED array of display in screen is identical, is equally made up of the light emitting diode of multiple lines and multiple rows, is equally no longer retouched in detail herein
State.
In the present embodiment, sequence inputting data are read using shift register 102, and then according to clock signal to sequence
Sampling input data, to export sampled signal to LED array of display 101, so as to realize the scan control of LED display,
Three or eight traditional decoders are eliminated, the input signal complexity for reducing the LED display brought by three or eight decoders is high,
Interference is strong between PCB layout complexity and line, so as to improve the image efficiency of LED display.
Additionally, realizing the row of channels gating control of LED array of display 101 using at least one shift register 102 of cascade
System, can cause the scanning of the practical various sizes of LED display of LED scan control circuits 10 provided in an embodiment of the present invention.
Further, as a preferred embodiment of the invention, as shown in figure 3, shift register 102 is main being touched by multiple
Send out device FF1-FFn and a buffer 102a composition.Wherein, the clock signal terminal C of multiple trigger FF1-FFn constitutes displacement
The serial signal gating end C of register 102, and clock signal is received, the signal input part D of first trigger FF1 is displacement
Output end Q of the serial signal input DIN of register 102, multiple trigger FF1-FFn is multiple for shift register 102
Data output end OU1-OUTn, and the signal input part D of output end Q of first trigger FF1 and second trigger FF2
Connection, output end Q of second trigger FF2 is connected with the signal input part D of the 3rd trigger FF3, by that analogy, n-th-
The signal output part Q of 1 trigger FFn-1 is connected with the signal input part D of n-th trigger FFn, and n-th trigger FFn
Output end Q be connected with the input of buffer 102a, the output end of buffer is exported for the serial signal of shift register 102
End DOUT.
Further, as a preferred embodiment of the invention, as shown in figure 4, LED provided in an embodiment of the present invention scannings
Control circuit 10 also includes multiple first drive modules A1-An.
Wherein, multiple data output end OU1- of the input of multiple first drive modules A1-An and shift register 102
OUTn connects one to one, the output end of multiple first drive modules A1-An and multiple row of channels one of LED array of display 101
One correspondence connection.
Specifically, multiple first drive modules A1-An receive sampled signal, and sampled signal are driven defeated after process
Go out to LED array of display 101.
Further, as a preferred embodiment of the invention, multiple first drive modules A1-An can adopt trigger
Realize.
In embodiments of the present invention, by increasing multiple first drive modules A1-An in LED scan control circuits 10,
And the driving force exported to the signal in LED array of display 101 is improved with this, and then cause LED display display picture more
Smoothness, image quality is more excellent.
Further, as a preferred embodiment of the invention, as shown in figure 5, LED provided in an embodiment of the present invention scannings
Control circuit 10 also includes multiple second drive modules B1-Bn.
The first input end of multiple second drive modules B1-Bn receives output and enables control signal, and multiple second drive
Second input of module B1-Bn connects one to one with multiple data output end OUT1-OUTn of shift register 102, many
The output end of individual second drive module B1-Bn connects one to one with multiple row of channels of LED array of display 101.
Specifically, multiple second drive modules B1-Bn receive sampled signal and enable control signal with output, and according to sampling
Signal with output enable control signal export scanning signal to LED array of display, to gate LED array of display 101 in scanning
The corresponding row of channels of signal.
Further, as a preferred embodiment of the invention, as shown in fig. 6, multiple second drive modules B1-Bn include
First buffer buf1, delayer Delay, the second buffer buf2, first switch element M1 and second switch element M2
Wherein, the first input end of the first buffer buf1 is the first input end of the second drive module B1-Bn, and first delays
Second input of storage buf1 receives operating voltage VDD, and is connected with the input of first switch element M1, the first buffer
The output end of buf1 is connected with the control end of first switch element M1, output end and the second switch element of first switch element M1
The input of M2 connects altogether the output end to form multiple second drive modules B1-Bn, and the first input end of delayer Delay is multiple
Second input of the second drive module B1-Bn, second input of delayer Delay is defeated with the second of the second buffer buf2
Enter end and receive operating voltage, the output end of delayer Delay is connected with the first input end of the second buffer buf2, second delays
The output end of storage buf2 is connected with the control end of second switch element M2, the output head grounding of second switch element M2.
It should be noted that in embodiments of the present invention, delayer Delay includes but is not limited to phase inverter, buffer etc..
Additionally, first switch element M1 is PMOS transistor, the grid of PMOS transistor is the control of first switch element M1
End processed, the source electrode of PMOS transistor is the input of first switch element M1, and the drain electrode of PMOS transistor is first switch element
The output end of M1；Second switch element M2 is nmos pass transistor, and the grid of nmos pass transistor is the control of second switch element M2
End, the drain electrode of nmos pass transistor is the input of second switch element M2, and the source electrode of nmos pass transistor is second switch element M2
Output end.
It should be noted that in other embodiments, first switch element M1 can also be adopted with second switch element M2
Triode realizes that for example, when first switch element is PNP type triode, the base stage of the PNP type triode is first switch unit
The control end of part M1, the current collection extremely output end of first switch element M1 of the PNP type triode, the PNP type triode send out
Emitter-base bandgap grading is the input of first switch element M1；When second switch element M2 is NPN type triode, the NPN type triode
Base stage is the control end of second switch element M2, and the current collection extremely input of second switch element M2 of the NPN type triode should
The transmitting extremely output end of second switch element M2 of NPN type triode.
In embodiments of the present invention, by increasing multiple second drive modules B1-Bn in LED scan control circuits 10,
And the driving force exported to the signal in LED array of display 101 is improved with this, and then cause LED display display picture more
Smoothness, image quality is more excellent.
Below with the LED scan control circuits 10 shown in the modular structure of the LED scan control circuits 10 shown in Fig. 2, Fig. 3
In shift register circuit structure and Fig. 7 shown in sequential schematic diagram as a example by, the LED that the embodiment of the present invention is provided
The operation principle of scan control circuit 10 is illustrated, and details are as follows：
First, Fig. 3 and Fig. 7 is please also refer to, shift register 102 is defeated to the sequence that its serial input terminal DIN is received
Enter the process that data are sampled to be specially：
When the high level of a cycle of clock signal comes interim, height electricity of first trigger FF1 in clock signal
Sequence inputting data under flat effect to receiving are sampled, and will be adopted in the low level of a cycle of clock signal
First sampled signal of sample is exported to first row of channels of LED array of display 101 by its data output end OUT1, to select
First row of channels of logical LED array of display 101, while sequence inputting data are sent into second trigger FF2；Work as clock
The high level of the second period of signal comes interim, and second trigger FF2 is under the high level effect of clock signal to receiving
Sequence inputting data sampled, and in the low level of the second period of clock signal by sampling second sampling
Signal is exported to second row of channels of LED array of display 101, to gate LED array of display by its data output end OUT2
101 second row of channels, while sequence inputting data are sent into the 3rd trigger FF3；When the 3rd of clock signal
The high level in cycle comes interim, sequence inputting numbers of the 3rd trigger FF3 under the high level effect of clock signal to receiving
According to being sampled, and the 3rd sampled signal of sampling is counted by it in the low level in the 3rd cycle of clock signal
Export according to output end OUT3 to the 3rd row of channels of LED array of display 101, to gate the 3rd row of LED array of display 101
Passage, while sequence inputting data are sent into second trigger FF2；By that analogy, when n-th cycle of clock signal
High level comes interim, and sequence inputting data of n-th trigger FFn to receiving under the high level effect of clock signal are adopted
Sample, and n-th sampled signal of sampling is passed through into its data output end in the low level in n-th cycle of clock signal
OUTn is exported to n-th row of channels of LED array of display 101, to gate n-th row of channels of LED array of display 101, so as to
The progressive scan of LED array of display 101 is realized, while sequence inputting data are transmitted buffer 102a by n-th trigger FFn
In.
Further, Fig. 2, Fig. 3 and Fig. 7 are please also refer to, after the completion of the n cycle of clock signal, and (n+1)th
The high level of clock cycle comes interim, and buffer 102a is by the sequence inputting data output to the next shift register for cascading
102 first trigger FF1, so that multiple triggers of the shift register 102 of cascade start to enter sequence inputting data
The multiple trigger roots in previous stage shift register 102 when row sampling, n cycle before sampling process and clock signal
Identical to the sampling process of sequence inputting data according to clock signal, here is omitted；And n cycle again for working as clock signal is complete
Cheng Hou, and when the high level of a cycle in the next n cycle of clock cycle comes interim, this grade of shift register 102
Sequence inputting data are resent to by next stage shift register 102 by its serial signal output end DOUT, and cause its heavy
Multiple said process, so circulation, to realize the scan control of LED display.
Further, the embodiment of the present invention also provides a kind of LED display, and the LED display includes LED scan controls electricity
Road 10, because the LED display that the embodiment of the present invention is provided is to be based on the LED scan control circuits 10 that Fig. 2 to Fig. 7 is provided
Realize, the principle of the LED display provided accordingly, with respect to the embodiment of the present invention is referred in above-mentioned Fig. 2 to Fig. 7 to scanning
The specific descriptions of control circuit 10, here is omitted.
In the present invention, by using at least one shift register, the multiple column scans control core for including multiple cascades
The LED scan control circuits of piece and LED array of display so that shift register enters according to clock signal to sequence inputting data
Row sampling after export multiple sampled signals to LED array of display, to gate LED array of display in row corresponding with sampled signal lead to
Road, column scan control chip to LED array of display export column scan control signal, to gate LED array of display in column scan
The corresponding row passage of control signal, and then LED scan controls are realized, and the LED scan control circuits only need what is cascaded
At least one shift register is just capable of achieving LED row scan controls, and its input signal is simple, PCB layout simple, and disturbs between line
It is low, so as to improve the display quality of LED display, solve existing LED display and exist because input signal complexity is high,
The problem for disturbing strong and caused display quality to reduce between PCB layout complexity and line.
Presently preferred embodiments of the present invention is the foregoing is only, not to limit the present invention, all essences in the present invention
Any modification, equivalent and improvement made within god and principle etc., should be included within the scope of the present invention.
Claims (8)
1. a kind of LED scan control circuits, including multiple column scan control chips and LED array of display, wherein, the column scan
Multiple output ends of control chip connect one to one with multiple row passages of the LED array of display, for exporting column scan
Control signal to the LED array of display, to gate the LED array of display in row corresponding with the column scan control signal
Passage, it is characterised in that the LED scan control circuits also include at least one shift register of cascade；
The shift register includes serial signal input, serial signal gating end, serial signal output end and many numbers
According to output end；Wherein, the serial signal input receiving sequence input data, the serial signal gating termination time receiving clock letter
Number, the cascade that the serial signal output end is used between the shift register, and the sequence inputting data are exported, it is multiple
Data output end connection corresponding with multiple row of channels one of the LED array of display；
The shift register exports multiple sampling letters after sampling to the sequence inputting data according to the clock signal
Number to the LED array of display, to gate the LED array of display in row of channels corresponding with the sampled signal, and institute
State shift register and the sequence inputting data are exported according to the clock signal.
2. LED scan control circuits according to claim 1, it is characterised in that the LED scan control circuits also include
Multiple first drive modules；
Multiple inputs of first drive module connect one to one with multiple data output ends of the shift register,
The output end of multiple first drive modules connects one to one with multiple row of channels of the LED array of display；
First drive module receives the sampled signal, and the sampled signal is driven after process and exports to described
LED array of display.
3. LED scan control circuits according to claim 2, it is characterised in that first drive module is buffer.
4. LED scan control circuits according to claim 1, it is characterised in that the LED scan control circuits also include
Multiple second drive modules；
The first input end of multiple second drive modules receives output and enables control signal, and multiple described second drive mould
Second input of block connects one to one with multiple data output ends of the shift register, and multiple described second drive mould
The output end of block connects one to one with multiple row of channels of the LED array of display；
Second drive module receives the sampled signal and enables control signal with the output, and according to the sampled signal
With it is described output enable control signal export scanning signal to the LED array of display, to gate the LED array of display in
The corresponding row of channels of the scanning signal.
5. LED scan control circuits according to claim 4, it is characterised in that multiple second drive modules are wrapped
Include：
First buffer, delayer, the second buffer, first switch element and second switch element；
The first input end of first buffer is the first input end of multiple second drive modules, first caching
Second input of device receives operating voltage, and is connected with the input of the first switch element, first buffer
Output end is connected with the control end of the first switch element, output end and the second switch unit of the first switch element
The input of part connects altogether the output end to form multiple second drive modules, and the first input end of the delayer is multiple institutes
State the second input of the second drive module, the second input of the second input of the delayer and second buffer
The operating voltage is received, the output end of the delayer is connected with the first input end of second buffer, described
The output end of two buffers is connected with the control end of the second switch element, the output head grounding of the second switch element.
6. LED scan control circuits according to claim 5, it is characterised in that the first switch element is that PMOS is brilliant
Body pipe, the grid of the PMOS transistor is the control end of the first switch element, and the source electrode of the PMOS transistor is institute
The input of first switch element is stated, the drain electrode of the PMOS transistor is the output end of the first switch element.
7. LED scan control circuits according to claim 5, it is characterised in that the second switch element is that NMOS is brilliant
Body pipe, the grid of the nmos pass transistor is the control end of the second switch element, and the drain electrode of the nmos pass transistor is institute
The input of second switch element is stated, the source electrode of the nmos pass transistor is the output end of the second switch element.
8. a kind of LED display, it is characterised in that the LED display includes the LED as described in any one of claim 1 to 7
Scan control circuit.
Priority Applications (1)
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| CN110120197A (en) * | 2019-04-11 | 2019-08-13 | 深圳天源中芯半导体有限公司 | A kind of application of the manystage cascade connection system and its implementation omitted peripheral resistance capacitance and reduce interference |
| CN111261099A (en) * | 2020-03-31 | 2020-06-09 | 四川遂宁市利普芯微电子有限公司 | Communication protocol of binary decoding line driving chip of LED display screen |
| CN112382241A (en) * | 2020-11-10 | 2021-02-19 | 昆山龙腾光电股份有限公司 | Backlight driving circuit, backlight driving control method and display device |
| CN114464120A (en) * | 2020-11-10 | 2022-05-10 | 群创光电股份有限公司 | Electronic device and scanning driving circuit |
| CN115631717A (en) * | 2022-10-13 | 2023-01-20 | 浙江大华技术股份有限公司 | LED chip driving method and device, display system and display unit |
| CN116959354A (en) * | 2023-06-21 | 2023-10-27 | 重庆惠科金渝光电科技有限公司 | Driving circuit, circuit driving method and display panel |
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| CN115631717A (en) * | 2022-10-13 | 2023-01-20 | 浙江大华技术股份有限公司 | LED chip driving method and device, display system and display unit |
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