CN1988387B - Judging circuit and method for high order single circulation over sampling noise shaping stability - Google Patents
Judging circuit and method for high order single circulation over sampling noise shaping stability Download PDFInfo
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- CN1988387B CN1988387B CN2005101117511A CN200510111751A CN1988387B CN 1988387 B CN1988387 B CN 1988387B CN 2005101117511 A CN2005101117511 A CN 2005101117511A CN 200510111751 A CN200510111751 A CN 200510111751A CN 1988387 B CN1988387 B CN 1988387B
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Abstract
This invention relates to a circuit and a method for judging the stability of shaping of high order single-circulation oversample noises, in which, the circuit includes a clock control circuit and a judgement circuit, the clock control circuit is used in generating a combined logic clock signal controlling said judgement circuit, a judgement circuit used in comparing and judging the input end to output control signal and controlling the working state of the integrator of the shaping circuit so as to eliminate abnormal working state of the oversampled noise shaping circuit, when the system is at the unstable state or overflown, said stability judgement circuit begins to control the system and lets it work at normal working state.
Description
Technical field
The present invention relates to be applied in the judgement of stability circuit and the method for high order single circulation over sampling noise shaping in the circuit such as electric energy metrical, power amplifier.
Background technology
In analog integrated circuit and modulus hybrid integrated circuit, over-sampling noise shaping circuit is one of a kind of very important basic circuit.The high-order single cycle is wherein very important one type in over-sampling noise shaping circuit, and the key of high order single circulation over sampling noise shaping is exactly the stability problem of its Circuits System.If the Circuits System instability will directly influence the overall performance of whole integrated circuit.
In the high order single circulation over sampling noise shaping circuit, when design ratio, can be adjusted in the scope of system stability, but in practice because under the influence of extraneous factors such as noise, system may be in an unsure state, and over-sampling noise shaping circuit oneself often can not return to normal operating state in this case.
The multistage second order structure of general employing is avoided the systematic jitters problem, but this structure needs multilevel hierarchy just can reach the performance of single-stage high-order, this structure needs supporting service time and postpones to eliminate circuit simultaneously, this will require very high to coupling, and not match be to be difficult to the defective that overcomes at present because fabrication error causes.
Therefore, how to control the stability of high order single circulation over sampling noise shaping, be one of content of studying of insider always.
Summary of the invention
The judgement of stability circuit and the method that the purpose of this invention is to provide a kind of high order single circulation over sampling noise shaping, so that over-sampling noise shaping circuit play pendulum overflow in other words after, can in time be regulated and control, make it get back to normal operating state, thereby be improved systematic function.
The judgement of stability circuit of a kind of high order single circulation over sampling noise shaping provided by the present invention, it is connected the output of afterbody integrator in the over-sampling noise shaping circuit, it is characterized in that: comprise clock control circuit and the decision circuitry that is attached thereto, wherein; Clock control circuit is used to produce the combinational logic clock signal of controlling described decision circuitry; Decision circuitry is used for comparison and judgement to input, exports control signal, controls the integrator operating state of described over-sampling noise shaping circuit, to reach the abnormal working position of eliminating described over-sampling noise shaping circuit.
In above-mentioned judgement of stability circuit, decision circuitry comprises three transmission gates, the single tube transmission gate that links to each other with each transmission gate, the judgement core circuit of forming by amplifier transistor, current source transistor, amplifier transistor, phase inverter and trigger, wherein: input signal is connected to by transmission gate on the grid of each amplifier transistor of described judgement core circuit, the source electrode of described amplifier transistor joins with ground by the source electrode of current source transistor M3, and when linking to each other, the drain electrode with current source transistor M3 links on the grid of amplifier transistor M1, the output stage of this amplifier transistor M1 is connected to current source transistor M2, and receive the phase inverter output, be connected to trigger by phase inverter by clock control.
In above-mentioned judgement of stability circuit, clock control circuit comprises two travel permit branch roads, and first branch road is to be connected in sequence by two-stage phase inverter, a NOR gate, a phase inverter; Second branch road is made up of the middle NAND gate that is connected of two-stage phase inverter and its, and the output of the input of this NAND gate and two-stage phase inverter also is connected respectively to two inputs of the NOR gate of described first branch road.
In above-mentioned judgement of stability circuit, the combinational logic clock signal of being controlled described decision circuitry by clock control circuit being used for of producing comprises: the second branch road clock signal clk
2Through the clock φ 2 that phase inverter produces, the clock that this clock φ 2 produces through phase inverter again
The clock that the clock φ 1 that the first branch clock signal clk1 produces through a phase inverter, this clock φ 1 produce through phase inverter again
And clock
With clock
By the clock φ 3 of NOR gate generation and the clock that produces through paraphase again
Clock φ 2 and clock in addition
Clock φ 4 by the NAND gate generation.
In above-mentioned judgement of stability circuit, state the direct and clock signal clk of the signal that produces among the trigger D
2Link to each other.
In above-mentioned judgement of stability circuit, the signal that produces among the trigger D after treatment again with clock signal clk
2Link to each other.
The present invention also provides a kind of judgement of stability method of high order single circulation over sampling noise shaping, comprise: determining step: after two output signals of afterbody integrator in the over-sampling noise shaping circuit are passed through transmission gate, compare judgement: when surpassing certain scope for two differences, its output is the result overturn, become certain certain value, labile state has been located in definite output, the triggering signal of the integrator operating state of the described over-sampling noise shaping circuit of output control; Clock generating controlled step: produce the combinational logic clock signal and remove to control determining step, eliminate the abnormal operating state of described high order single circulation over sampling noise shaping circuit.
In above-mentioned judgement of stability method, the combinational logic clock signal that produces in the clock control step comprises: clock signal clk
2The clock φ 2 that the process paraphase produces, the clock that produces through paraphase again
The clock φ 1 that clock signal clk1 produces through a paraphase, the clock that produces through paraphase again
And clock
With clock
By the clock φ 3 of NOR gate generation and the clock that produces through paraphase again
Clock φ 2 and clock in addition
Clock φ 4 by the NAND gate generation.
Adopted above-mentioned technical solution, i.e. the present invention is by being provided with a judgement of stability circuit at over-sampling noise shaping circuit, and in stability boundary, then the judgement of stability circuit is inoperative as if over-sampling noise shaping circuit; If after over-sampling noise shaping circuit played pendulum and overflows in other words, this judgement of stability circuit began to work, regulator control system makes it get back to normal operating state.Judgement of stability circuit of the present invention adopts less number of tubes, and keep clock synchronization with controlled circuit, not only to the not influence of the performance of system, and regulate the scope of input signal difference, to satisfy the requirement of concrete system by changing amplifier tube size and ratio in the stabilize decision circuit.
Description of drawings
Fig. 1 is the circuit block diagram that Stability Control circuit of the present invention is used for the high order single circulation over sampling noise shaping circuit;
Fig. 2 is the circuit block diagram of judgement of stability circuit of the present invention;
Fig. 3 is the former road figure of decision circuitry among the present invention;
Fig. 4 is a clock control circuit principle among the present invention.
Embodiment
As shown in Figure 1, existing high order single circulation over sampling noise shaping circuit, comprise input PGA (programmable gain amplifier), integrator, quantizer, D/A (D/A switch), wherein the output of the integrator of one-level in the end connects a judgement of stability circuit of the present invention, go decision integrator to export and whether overflow with this circuit owing to The noise, be whether integrator is saturated, whether over-sampling noise shaping circuit has been in the unsteadiness working condition in other words, thereby, eliminate unsteadiness according to the operating state that the result who judges removes to regulate the integrator of front.
Determination of stability circuit of the present invention is made up of at on-chip transistor preparation.Receive on the judgement of stability circuit according to the output of afterbody integrator in the high order single circulation over sampling noise shaping circuit, as shown in Figure 2, the judgement of stability circuit has clock control circuit and decision circuitry to constitute, and as shown in Figure 3, decision circuitry has the core of judgement and peripheral circuit to constitute.Two input input signal vin1 of decision circuitry, vin2 is by transmission gate M10, M11 receive respectively a similar comparator by amplifier transistor M41, M42, M51, on the grid of each amplifier transistor of the judgement core circuit that M52 formed, by weak positive feedback amplification and current source transistor M3, be M42, the source electrode of M52 links to each other with ground by the M3 source electrode with M3, M42, the grid that the drain electrode tie point of the source electrode of M52 and M3 is linked amplifier transistor M1 further amplifies, the drain electrode of M1 and current source transistor M2 drain electrode link to each other (M2 plays a current source effect), by transistor M1, the drain electrode of M2 outputs to follow-up phase inverter INV, receives the trigger D output by clock control then.Transistor M6, M7, M8, M9 under normal circumstances, clk1 controls according to clock signal, impels circuit output one most zero by regulating.
Therefore, when the difference of two inputs surpassed certain scope, after two inputs surpassed certain value in other words, its output was the result overturn, and becomes certain certain value, so just we can say that output located labile state, needs system to readjust down.
As shown in Figure 4, clk in clock control circuit
2Produce clock φ 2 through phase inverter INV, connect phase inverter again and produce clock
Clk1 produces clock φ 1 through a phase inverter INV, connects a phase inverter again and produces clock
With
Produce clock φ 3 by NOR gate NOR2, connect a phase inverter then and produce clock
In addition φ 2 with
Produce clock φ 4 by NAND gate NAND2.
The signal that trigger D produces among Fig. 3 can be directly and clk
2Link to each other, also can link to each other through handling again.
According to knowing clk under normal circumstances in the analysis of high order single circulation over sampling noise shaping circuit
2Be low level, the clock of combinational logic is mainly by clk
1Decision.Therefore under normal circumstances, clk
2During for low level,
Circuit is worked normally under the clock control thus; Yet when this circuit judges when system plays pendulum, clk
2Impel by the result of judgement of stability circuit output to become high level, this moment circuit clock fully by clk
2Control, φ at this moment
3=0,
φ
2=0, φ
4=1, promptly provide signal after circuit is made judgement, this moment, decision circuitry also needed to suspend, so the abnormal operating state of circuit was eliminated, obtain judging to be correct after the signal input below making like this, not influenced by the abnormal situation in front.
Remove integrator in control stability decision circuitry and the over-sampling noise shaping circuit by top clocking, the abnormal operating state of high-order single cycle circuit is eliminated, obtain whole high-order single cycle circuit working under normal circumstances.
The present invention is a kind of judgement of stability method of high order single circulation over sampling noise shaping also, comprising:
Determining step: with two output signals of afterbody integrator in the over-sampling noise shaping circuit by behind the transmission gate, compare judgement: when surpassing certain scope for two differences, its output is the result overturn, become certain certain value, labile state has been located in definite output, the triggering signal of the integrator operating state of the described over-sampling noise shaping circuit of output control;
Clock generating controlled step: produce the combinational logic clock signal and remove to control determining step, eliminate the abnormal operating state of described high order single circulation over sampling noise shaping circuit.
The combinational logic clock signal that produces in the clock control step comprises: clock signal clk
2The clock φ 2 that the process paraphase produces, the clock that produces through paraphase again
The clock φ 1 that clock signal clk1 produces through a paraphase, the clock that produces through paraphase again
And clock
With clock
By the clock φ 3 of NOR gate generation and the clock that produces through paraphase again
Clock φ 2 and clock in addition
Clock φ 4 by the NAND gate generation.
In sum, the present invention removes to control high-order single cycle noise shaping circuit according to the judged result of stability and can run well, especially work as high-order single cycle noise shaping circuit working under complex environment, the variation of environment and technological reason etc. cause under the system works instability, adjusting by this circuit, make system's zero clearing, system is in stable state again.Judgement of stability circuit of the present invention adopts less number of tubes, and keep clock synchronization with controlled circuit, not only to the not influence of the performance of system, and regulate the scope of input signal difference, to satisfy the requirement of concrete system by changing amplifier tube size and ratio in the stabilize decision circuit.This circuit can be worked under the 5v/3.3v/1.8v single supply, and it can be controlled at 0--3V to the input difference scope.
Although the present invention explains with concrete syntax architectural feature and/or method function, should be understood that the present invention that appended claims limits must be limited to illustrated concrete feature or function.On the contrary, these concrete features and function are just disclosed as the exemplary embodiment of the present invention for required protection.
Claims (8)
1. the judgement of stability circuit of a high order single circulation over sampling noise shaping, the output that it is connected afterbody integrator in the over-sampling noise shaping circuit is characterized in that: comprise clock control circuit and the decision circuitry that is attached thereto, wherein:
Clock control circuit is used to produce the combinational logic clock signal of controlling described decision circuitry;
Decision circuitry is used for comparison and judgement to input, exports control signal, controls the integrator operating state of described over-sampling noise shaping circuit, to reach the abnormal working position of eliminating described over-sampling noise shaping circuit.
2. judgement of stability circuit according to claim 1, it is characterized in that: the single tube transmission gate (M6, M7, M8, M9) that described decision circuitry comprises three transmission gates, link to each other with each transmission gate, judgement core circuit, current source transistor (M3, M2), amplifier transistor (M1), phase inverter (INV) and the trigger (D) formed by amplifier transistor (M41, M42, M51, M52), wherein:
Input signal is connected to by transmission gate on the grid of each amplifier transistor (M41, M42, M51, M52) of described judgement core circuit, the source electrode of described amplifier transistor (M42, M51) joins with ground by the source electrode of current source transistor (M3), and when linking to each other, the drain electrode with current source transistor (M3) links on the grid of amplifier transistor (M1), the output stage of this amplifier transistor (M1) is connected to current source transistor (M2), and receive phase inverter (INV) output, be connected to trigger (D) by phase inverter (INV) by clock control.
3. judgement of stability circuit according to claim 2 is characterized in that: described clock control circuit comprises two travel permit branch roads, and first branch road is to be connected in sequence by two-stage phase inverter (INV), a NOR gate (NOR2), a phase inverter (INV); Second branch road is made up of the middle NAND gate (NAND2) that is connected of two-stage phase inverter (INV) and its, and the output of input of this NAND gate (NAND2) and two-stage phase inverter (INV) also is connected respectively to two inputs of the NOR gate (NOR2) of described first branch road.
4. judgement of stability circuit according to claim 3 is characterized in that: the combinational logic clock signal of being controlled described decision circuitry by described clock control circuit being used for of producing comprises: the second branch road clock signal (clk
2) clock (φ 2) that produces through phase inverter (INV), the clock that this clock (φ 2) produces through phase inverter (INV) again
The clock that the clock (φ 1) that the first branch clock signal (clk1) produces through a phase inverter (INV), this clock (φ 1) produce through phase inverter (INV) again
And clock
With clock
By the clock (φ 3) of NOR gate (NOR2) generation and the clock that produces through paraphase again
Clock (φ 2) and clock in addition
Clock (φ 4) by NAND gate (NAND2) generation.
5. judgement of stability circuit according to claim 3 is characterized in that: the direct and clock signal (clk of the signal that produces in the described trigger (D)
2) link to each other.
6. judgement of stability circuit according to claim 3 is characterized in that: the signal that produces in the described trigger (D) after treatment again with clock signal (clk
2) link to each other.
7. the judgement of stability method of a high order single circulation over sampling noise shaping comprises:
Determining step: with two output signals of afterbody integrator in the over-sampling noise shaping circuit by behind the transmission gate, compare judgement: when surpassing certain scope for two differences, its output is the result overturn, become certain certain value, labile state has been located in definite output, the triggering signal of the integrator operating state of the described over-sampling noise shaping circuit of output control;
Clock generating controlled step: produce the combinational logic clock signal and remove to control determining step, eliminate the abnormal operating state of described high order single circulation over sampling noise shaping circuit.
8. judgement of stability method according to claim 7 is characterized in that: the combinational logic clock signal that produces in the described clock control step comprises: clock signal (clk
2) clock (φ 2) that produces through paraphase, the clock that produces through paraphase again
The clock (φ 1) that clock signal (clk1) produces through a paraphase, the clock that produces through paraphase again
And clock
With clock
By the clock (φ 3) of NOR gate generation and the clock that produces through paraphase again
Clock (φ 2) and clock in addition
Clock (φ 4) by the NAND gate generation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005101117511A CN1988387B (en) | 2005-12-21 | 2005-12-21 | Judging circuit and method for high order single circulation over sampling noise shaping stability |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2005101117511A CN1988387B (en) | 2005-12-21 | 2005-12-21 | Judging circuit and method for high order single circulation over sampling noise shaping stability |
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| Publication Number | Publication Date |
|---|---|
| CN1988387A CN1988387A (en) | 2007-06-27 |
| CN1988387B true CN1988387B (en) | 2010-10-06 |
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| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2005101117511A Active CN1988387B (en) | 2005-12-21 | 2005-12-21 | Judging circuit and method for high order single circulation over sampling noise shaping stability |
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Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5331228A (en) * | 1992-07-31 | 1994-07-19 | Sgs-Thomson Microelectronics, Inc. | Output driver circuit |
| CN1139317A (en) * | 1995-04-26 | 1997-01-01 | 松下电器产业株式会社 | Logic circuit |
-
2005
- 2005-12-21 CN CN2005101117511A patent/CN1988387B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5331228A (en) * | 1992-07-31 | 1994-07-19 | Sgs-Thomson Microelectronics, Inc. | Output driver circuit |
| CN1139317A (en) * | 1995-04-26 | 1997-01-01 | 松下电器产业株式会社 | Logic circuit |
Non-Patent Citations (1)
| Title |
|---|
| CN 1139317 A,全文. |
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|---|---|
| CN1988387A (en) | 2007-06-27 |
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