CN1213587C - Subscriber line interface method and circuit of program control exchange board - Google Patents

Abstract

The present invention relates to a subscriber line interface method and a circuit of a program control exchanger, which is characterized in that external high voltage signals and low voltage signals of a chip are separated by an internal circuit of a chip, a peripheral circuit of a chip and components, and a peripheral blocking capacitor is used for isolating external high voltage direct current signals; meanwhile, through the alternating current coupling of the blocking capacitor and the internal circuit of a chip, signals in the chip provide voltage feed back to a loop circuit by a peripheral triode amplified circuit, VRX signals are output by a triode in a mode of alternating feed current, and the base of a PNP triode is connected with low voltage so as to ensure the driving response of the triodes to weak signals. The present invention separates the external high voltage signals and the low voltage signals of a chip by utilizing the internal circuit of a chip, the peripheral circuit of a chip and the components and bears circuits at high voltage parts by utilizing simple peripheral components. Therefore, the present invention not only reduces the production cost of chips and improves mobility for selecting production process, but also provides convenience for the further integration of more new functions.

Description

The programme-controlled switching system user line interface Method and circuits

Technical field

The present invention relates to telephone communication, relate in particular to a kind of programme-controlled switching system user line interface Method and circuits.

Background technology

Because the feed voltage on the subscribers feeder surpasses 40V, so be used to provide the Subscriber Line Interface Circuit chip of subscribers feeder feed function generally all to have only the high-pressure process of employing to realize.Because high-pressure process belongs to special process, not only price is higher, and can provide the chip production producer of service less relatively, and the design of Subscriber Line Interface Circuit chip is brought bigger restriction.This patent has proposed the scheme that a kind of high-voltage signal separates with low-voltage signal, thereby reaches the purpose that realizes the Subscriber Line Interface Circuit chip with common semiconductor processes.

The basic architecture of subscriber line circuit is as shown in Figure 1:

Each holding wire is:

TIP: plug tip and plug ring RING constitute by the two piece lines of switch to substation.

RING: plug ring and plug tip TIP constitute by the two piece lines of switch to substation, and the transmitted in both directions of DC feedback and voice signal is undertaken by these two lines.

The VTX:4 line sends analog signal line, and voice are delivered to digital switching network by VTX A/u rule coding again behind ADC (Analog to DigitalConverter).

The VRX:4 line receives analog signal line, and A/u rule PCM signal becomes analog signal through DAC (Digitalto Analog Converter) after decoding, deliver to SLIC.

Subscriber's telephone line enters into Subscriber Line Interface Circuit through the protection device of overcurrent-overvoltage; finish the 2/4 line conversion of necessity by Subscriber Line Interface Circuit after; deliver to the encoding and decoding that phonetic codec chip carries out AD, DA conversion and A/u rule; arrive PCM (Pulse Code Modulation, the pulse code modulation) passage of numeral at last.

Protection device, Subscriber Line Interface Circuit, phonetic codec chip and other additional device are finished these seven functions of well-known BORSCHT jointly:

B:Battery Feeding DC feedback;

O:Overvoltage Protecting Overcurrent Protecting over-voltage over-current protection;

The R:Ring ring;

S:Supervise detection loop state;

The C:Codec encoding and decoding;

H:Hybrid balance combined balance system;

The T:Testing test;

Subscriber Line Interface Circuit also abbreviates SLIC (Subscriber Line InterfaceCircuit) as, and phonetic codec chip also abbreviates CODEC (COding Decoding) as.

Along with the popularization and application of stored-program control exchange, the solution of novel Subscriber Line Interface Circuit also continues to bring out, early stage Subscriber Line Interface Circuit, be to carry out the thick film circuit that alternating current-direct current is isolated with transformer, function is simpler, and volume is big, and some transmission objectives are also more critical.External Subscriber Line Interface Circuit has developed into the IC stage, and has generally all finished the function of relative complex.But because the subscriber line interface signal is a high-voltage signal, so all be to realize the Subscriber Line Interface Circuit chip generally with special high-voltage semi-conductor technology, the MuSLIC that realizes of the SPT technology of the ST3055 that realizes of the BCD technology of ST company, Infineon company for example, nest plates such as DuSLIC.These technologies have adopted some means different with common process in process of production, thereby have caused cost higher in order to reach high voltage bearing purpose, are difficult to satisfy the harsh requirement of domestic market to cost.

Along with the development of phonetic codec chip technology, the CODEC chip functions of built-in DSP is more and more stronger, the impedance that can cooperate SLIC to finish originally must to finish in Subscriber Line Interface Circuit and the function of echo payment.

There is following shortcoming in prior art:

1. existing IC scheme need use special high-voltage semi-conductor technology to realize that price is higher, and choosing of manufacturer has bigger limitation.

2. the CODEC chip functions that adopts common semiconductor processes to realize is more and more stronger, but because the SLIC chip need use special high-pressure process, causes both to be integrated together.

Summary of the invention

The object of the present invention is to provide the programme-controlled switching system user line interface Method and circuits that a kind of cost is low and performance is good.

The technical solution adopted in the present invention is: this programme-controlled switching system user line interface method is characterized in that:

A, receive analog signal VRX for 4 lines of handling through phonetic codec chip, the external high pressure signal is separated with the chip low-voltage signal with chip periphery circuit and device by the chip internal receiving circuit, finish of the conversion of 4 lines of VRX signal to 2 lines, described chip internal receiving circuit comprises current/charge-voltage convertor and common mode control circuit CMCC, described chip periphery circuit and device comprise transistor amplifier, the VRX signal of described reception is converted to feed current through current/charge-voltage convertor, described feed current provides Voltage Feedback by the transistor amplifier of described periphery to loop, and described common mode control circuit is controlled described transistor amplifier holding circuit balance;

B, for the subscriber line signal of handling through protective circuit; adopt peripheral capacitance isolating exterior high-voltage dc signal; simultaneously by capacitance and chip internal transtation mission circuit AC coupled; finish the conversion of 2 lines of subscriber line signal to 4 lines, described chip internal transtation mission circuit comprises that a reception operational amplifier amplifies 2 line signals.Described chip periphery circuit is a transistor amplifier, the signal that chip internal sends is by peripheral transistor amplifier, provide Voltage Feedback to loop, the VRX signal is exported with the alternating-current feeding current system by transistor amplifier, wherein said transistor amplifier comprises a PNP triode Q1, and a described PNP triode Q1 base stage connects low-voltage, guarantees the driving response of a described PNP triode to weak signal.

Described chip internal receiving circuit provides work feed current ISS1 to a peripheral PNP triode Q1 emitter, the one PNP triode Q1 collector electrode is connected to the TIP holding wire, the one PNP triode Q1 base stage connects 0 volt of voltage, and the VRX signal acts on a PNP triode Q1 emitter with the alternating-current feeding current system.

Described transistor amplifier comprises the 2nd PNP triode Q2, the 3rd NPN triode Q3, the 2nd PNP triode Q2, the 3rd NPN triode Q3 amplify form with secondary and directly link to each other, common mode control circuit CMCC controls the 2nd PNP triode Q2, the 2nd PNP triode Q2 base stage connects 0 volt of voltage, and the 3rd NPN triode Q3 collector electrode is connected to the RING holding wire.

The programme-controlled switching system user line interface circuit of the subscriber line interface method that this realization is above-mentioned, comprise the reception operational amplifier, its anode is connected resistance R 1, R3 respectively and sees through outside capacitance C1, C2 respectively with negative terminal and links to each other with TIP holding wire, RING holding wire, it is characterized in that:

Described reception operational amplifier anode connects resistance R 2, and inserts internal reference voltage V _Ref, link to each other by resistance R 4 between its negative terminal and the output; Current/charge-voltage convertor is connected to an outside PNP triode Q1 jointly with work feed current ISS1, and a PNP triode Q1 base stage connects 0 volt of voltage, and collector electrode is connected to the TIP holding wire; Common mode control circuit CMCC connects two sampling resistor RT, RR and respectively TIP holding wire, RING holding wire is sampled, and two sampling resistor outer ends connect a big resistance resistance R L; This common mode control circuit CMCC output connects a transistor amplifier that is directly linked to each other with the secondary amplification by the 2nd PNP triode Q2 and the 3rd NPN triode Q3, the 2nd PNP triode Q2 emitter of this transistor amplifier links to each other with common mode control circuit CMCC output, and the 3rd NPN triode Q3 collector electrode links to each other with the RING holding wire.

Described the 2nd PNP triode Q2 base stage connects 0 volt of voltage.

Described current/charge-voltage convertor comprises an operational amplifier, and this operational amplifier negative terminal connects the VRX signal by resistance R 6, and its anode connects internal reference voltage V _Ref, its output connects PMOS pipe M1, and PMOS pipe M1 emitter communicates with the operational amplifier negative terminal, and communicates with work feed current ISS1, and PMOS pipe M1 collector electrode connects an outside PNP triode Q1.

Described operational amplifier negative terminal links to each other with the reception operational amplifier output terminal by resistance R 5.

Described common mode control circuit CMCC comprises two common mode operational amplifiers, its negative terminal is connected to the TIP holding wire respectively, the RING holding wire, the output of common mode operational amplifier is respectively by superposeing behind the current mirror Current Mirror, and convert voltage Va to by resistance R 7 and load on a comparator anode, this comparator output terminal connects the 2nd PMOS pipe M2, the 2nd PMOS pipe M2 emitter adds a builtin voltage VDD, the 2nd PMOS pipe M2 collector electrode links to each other with the 2nd PNP triode Q2 emitter, and the anode of two common mode operational amplifiers among this common mode control circuit CMCC and the negative terminal of comparator insert internal reference voltage V respectively _Ref

Among the described common mode control circuit CMCC, the common mode operational amplifier that connects the TIP holding wire is drawn another current mirror Current Mirror to comparator negative terminal, converts voltage to by resistance R 8, and this comparator anode inserts internal reference voltage V _Ref, its output connects control valve M3, and control valve M3 operating current and work feed current ISS1 are provided by internal fixation current source Ibias.

Beneficial effect of the present invention is: in the present invention, adopt peripheral capacitance isolating exterior high-voltage dc signal, simultaneously by capacitance and chip internal circuit AC coupled, the signal that chip internal sends is by peripheral transistor amplifier, provide Voltage Feedback to loop, the VRX signal is exported with the alternating-current feeding current system by triode, the PNP transistor base connects low-voltage, guarantee the driving response of triode to weak signal, like this, the external high pressure signal is separated with the chip low-voltage signal with chip periphery circuit and device by the chip internal circuit, utilize simple peripheral cell, as discrete triode, resistance is born the high-pressure section circuit, thereby reach the purpose that can realize the SLIC function with ordinary semiconductor technology, not only reduced the chip production cost, improved the flexibility that production technology is chosen, and be that further integrated more new function has been brought convenience; In circuit design, between TIP, RING, connect resistance, make the present invention be supported the function of on-hook transmission, electric current by common mode control circuit CMCC control transistor circuit, keep the work of feed loop, and the voltage sum of stable TIP and RING, and provide feedback to insert to current/charge-voltage convertor, make working stability of the present invention, reliable; The common mode operational amplifier that connects TIP among the common mode control circuit CMCC is drawn another current mirror (Current Mirror) to a comparator negative terminal, converts voltage to by resistance R 8, this comparator anode internal reference voltage V _RefIts output connects control valve M3, control valve M3 operating current and work feed current ISS1 are provided by internal fixation current source Ibias, like this, when loop resitance hour, TIP voltage is lower, the pressure drop that R8 is upward produced is just bigger, the output of comparator is low level just, and making on the control valve M3 does not have electric current, and the electric current of internal work feed current ISS1 just equals the electric current of Ibias, conversely, when loop resitance was big, TIP voltage was higher, and the comparator output voltage raises, make control valve M3 conducting, the electric current of control valve M3 can be offset the electric current of part Ibias, thereby reduces the size of current of internal work feed current ISS1, in fact, work feed current ISS1 has been produced the negative feedback of a current stabilization, automatically pressure limiting when realizing long loop further makes working stability of the present invention, improves practicality of the present invention.

Description of drawings

Fig. 1 is the basic architecture figure of subscriber line circuit;

Fig. 2 is the Principle of Signal Transmission figures of 2 lines to 4 lines;

Fig. 3 is the Principle of Signal Transmission figures of 4 lines to 2 lines;

Fig. 4 is the current/charge-voltage convertor schematic diagram;

Fig. 5 is a common mode control circuit schematic diagram;

Fig. 6 is a circuit theory schematic diagram of the present invention;

Fig. 7 is the long loop automatically pressure limiting of the present invention principle schematic.

Embodiment

With embodiment the present invention is described in further detail with reference to the accompanying drawings below:

According to Fig. 2, Fig. 3, Fig. 4, Fig. 5 and Fig. 6, the present invention includes the reception operational amplifier, as shown in Figure 6, its anode is connected resistance R 1, R3 respectively and sees through outside capacitance C1, C2 respectively with negative terminal and links to each other with TIP, RING, this receives the operational amplifier anode and connects resistance R 2, inserts internal reference voltage V _Ref, negative terminal links to each other by resistance R 4 with output; One common mode control circuit CMCC is by sampling to TIP, RING respectively by two sampling resistor RT, RR, two sampling resistor outer ends connect a big resistance resistance R L, this common mode control circuit CMCC output connects a transistor amplifier that is directly linked to each other with the secondary amplification by PNP triode Q2 and NPN triode Q3, this amplifying circuit input triode Q2 emitter links to each other with common mode control circuit CMCC output, input triode Q2 base stage connects 0 volt of voltage, and output triode Q3 collector electrode links to each other with RING; The VRX signal passes to outside PNP triode Q1 by current/charge-voltage convertor jointly with work feed current ISS1, and triode Q1 base stage connects 0 volt of voltage, and collector electrode is connected to TIP.

With reference to figure 6, current/charge-voltage convertor comprises an operational amplifier, and this operational amplifier negative terminal connects the VRX signal by resistance R 6, and its anode connects internal reference voltage V _RefIts output connects PMOS pipe M1, and PMOS pipe M1 emitter communicates with this operational amplifier negative terminal, and communicates with work feed current ISS1, PMOS pipe M1 collector electrode connects outside triode Q1, and this operational amplifier negative terminal links to each other with the reception operational amplifier output terminal by resistance R 5.

As shown in Figure 5, common mode control circuit CMCC comprises two common mode operational amplifiers, its negative terminal is connected to TIP respectively, RING, the output of common mode operational amplifier is respectively by superposeing behind the current mirror Current Mirror, and convert voltage Va to by resistance R 7 and load on a comparator anode, this comparator output terminal connects PMOS pipe M2, PMOS pipe M2 emitter adds a builtin voltage VDD, PMOS pipe M2 collector electrode links to each other with PNP triode Q2 emitter, and the anode of two common mode operational amplifiers among this common mode control circuit CMCC and the negative terminal of comparator insert internal reference voltage V respectively _Ref

The concrete course of work of the present invention is as follows:

As shown in Figure 2, dotted line left-hand component is chip periphery circuit outside, dotted line the right is chip internal circuit inside, after carrying out AC coupled by capacitance C1, C2, the high-voltage dc signal of TIP and RING is just kept apart with chip, because the amplitude of AC signal is little, therefore can directly be linked into chip internal, generally get R1=R3, R2=R4 (the resistance size generally can be tens kilohms to hundreds of kilohm) therefrom can calculate 2 lines and to the transmission gain of 4 lines is:

V _TX＝(V _TIP-V _RING)*R4/R3

Like this, can realize that the signal from 2 lines to 4 lines transmits.

As shown in Figure 3, the dotted line bottom left section is the chip periphery circuit, be high voltage circuit, the dotted line upper right portion is the chip internal circuit, be low-voltage circuit, because triode Q1, the base stage of Q2 is 0V, so guaranteed triode Q1, the emitter of Q2 maintains the above feed that just can carry out of 0V and controls, resistance R L is the resistance that the loop DC channel is provided under hook state, its resistance value ratio is bigger, generally can be tens kilohms, very little for the influence of the loop current under the off hook state, resistance R T, RR is used for TIP, the resistance that the voltage signal of RING is sampled, resistance generally can be hundreds of kilohm, R9 is used for current signal is converted to the voltage control signal of triode Q3, and resistance generally can be several kilohms.

The present invention adopts the mode of current feed, feed current is made up of work feed current ISS1 and alternating-current feeding electric current I ac, work feed current ISSl is the direct current composition of feed current, produce by the state of chip according to 2 line end loops, Iac is the Alternating Component of feed current, obtain by current/charge-voltage convertor (V to I) by signal VRX from CODEC, common mode control circuit (Common-Mode Control Circuit, CMCC) control the electric current of triode Q3 by the size of current of control triode Q2, to keep the operate as normal of feed loop, and the fixing voltage sum of TIP and RING, so just can keep apart high-voltage signal and inside chip, control the signal at TIP/RING place indirectly.

A simple current/charge-voltage convertor (V to I) as shown in Figure 4, the size of Vref can equal the direct voltage of VRX among the figure, the direct current size of the last feed current of triode Q1 equals the size of current of work feed current ISS1, just can reach the purpose of control feed direct current size by the size of current that changes work feed current ISS1, and the VRX signal is by after converting current signal to, formed the AC portion of feed current, and constituted total feed current on the work feed current ISS1 that is added to, therefore, this circuit had both been realized the control to direct current signal, had also realized the AC signal transmission from 4 lines to 2 lines.

Metal-oxide-semiconductor M1 used among Fig. 4 also can change triode into, also can be suitable for bipolar process or BiCMOS technology.

In common mode control circuit CMCC, as shown in Figure 5, the voltage of TIP and RING converts electric current to by resistance R T, RR earlier, again by superposeing behind the current mirror Current Mirror, and converting voltage Va to by resistance R 7, the size of the obvious Va of voltage has just reflected the voltage sum of TIP and RING end.After Va compares with Vref again, determined the size of current of M2, the size of current of Q2 just, three internal reference voltage Vref among Fig. 5 can receive same voltage source, also can connect different voltage as required respectively, resistance R T, RR are the non-essential resistance of similar resistance.

When the voltage of TIP and RING is higher, electric current on resistance R T, the RR is just less, also less through the electric current that flows into R7 behind the mirror image, so voltage Va is just lower, make that the electric current of PMOS pipe M2 is bigger, the electric current of triode Q3 by triode Q2 control RING end is just bigger, thereby reduces the voltage of TIP and RING; Conversely, when the voltage of TIP and RING is low, can raise the voltage of TIP and RING by common mode control circuit CMCC, as voltage Va and reference voltage V _RefDuring basic equating, circuit just is in poised state.Suppose that now two current mirror ratios are 1: M, this moment, the voltage of TIP and RING satisfied following relation:

V _TIP+V _RING＝2*V _ref-V _ref*RT/(M*RR)

By resistance R T, RR, R7, M and reference voltage V appropriately are set _RefValue, we just can make both members equal desirable value, for example: RT=260K, RR=5K, M=2, V _Ref=2V, then the voltage sum of TIP and RING just equals-48V.

Aspect impedance matching: the built-in DSP of third generation CODEC can assist SLIC to finish the function of impedance matching, but because the DSP delay time of AD, DA and inside is longer, though in audiorange, can match satisfactory impedance, if but feedback quantity is too much, the problem of stability takes place easily, therefore, best method is exactly that the SLIC front end is realized simple true impedance feedback, realizes the complex impedance coupling in inside.

For adopting circuit of the present invention, as shown in Figure 6, relevant impedance matching can be calculated as follows:

Suppose R1=R3, R2=R4 can calculate the interchange port Impedance of being seen into by TIP, RING end.

Suppose the loop current I of TIP, RING _LoopDirection is to be flowed into by TIP, is flowed out by RING, then can obtain following formula:

$I_{\mathrm{loop}}\left(\mathrm{AC}\right)=\frac{V_{\mathrm{TX}}}{R_5}=(V_{\mathrm{TIP}}-V_{\mathrm{RING}})\·\frac{R_2}{R_1\·R_5}$

Thereby the size of equiva lent impedance is:

$R_{\mathrm{eq}}=\frac{R_1\·R_5}{R_2}$

The resistance of resistance R 1, R2, R5 is set rightly, just can obtains needed matched impedance size.For example: R1=80K, R2=20K, R5=150, then matched impedance is 600 ohm.

Suppose that the telephone wire of 2 line ends and the impedance of telephone set are R _2W, then 4 lines can be calculated as follows to the signal transmission gain of 2 lines:

$\frac{V_{\mathrm{TIP}}-V_{\mathrm{RING}}}{R_{2W}}=I_{\mathrm{loop}}=\frac{V_{\mathrm{RX}}}{R_6}-\frac{(V_{\mathrm{TIP}}-V_{\mathrm{RING}})\·R_2}{R_5\·R_1}$

The arrangement following formula gets:

$V_{\mathrm{TIP}}-V_{\mathrm{RING}}=\frac{V_{\mathrm{RX}}}{R_6\·(\frac{1}{R_{2W}}+\frac{R_2}{R_1\·R_5})}$

For example: R1=80K, R2=20K, R5=150, R6=200, R2W=600, then 4 lines are 1.5 times (3.5dB) to the signal transmission gain of 2 lines.

Under the situation of long loop high capacity, if feed out big electric current by force, can cause efferent duct to be in saturation condition, circuit can't normally transmit the AC signal, so when long loop for fear of TIP, voltage between the RING is excessive and cause device state unusual, need reduction work feed current ISS1, the present invention can be to the moving pressure limiting of long loop, promptly work feed current ISS1 is carried out control, as shown in Figure 7, show a current-limiting control circuit, in this current-limiting control circuit, draw another current mirror CurrentMirror to comparator negative terminal by the common mode operational amplifier that connects TIP among the common mode control circuit CMCC, convert voltage to by resistance R 8, this comparator anode internal reference voltage V _RefIts output connects control valve M3, control valve M3 operating current and work feed current ISS1 are provided by internal fixation current source Ibias, wherein, when loop resitance hour, TIP voltage is lower, make the electric current of control valve M4 bigger, the pressure drop that produces on resistance R 8 is just bigger, and the output of comparator is low level just, making on the control valve M3 does not have electric current, and the electric current of work feed current ISS1 just equals the electric current of fixed current source Ibias; Conversely, when loop resitance was big, TIP voltage was higher, and the comparator output voltage raises, and makes control valve M3 conducting, and the electric current of control valve M3 can be offset the electric current of part Ibias, thereby reduced the size of current of work feed current ISS1.

By the resistance of resistance R 8 is set, the TIP terminal voltage in the time of can controlling this circuit and work, two reference voltage Vref among Fig. 7 both can be the same or different.For example: RT=260K, R8=25K, Vref=2V, the current ratio sum of two image currents is 1: 4, then the pressure limiting of TIP size is-3.2V, because the just direct current that need to reduce, so the capacitor C that needs an outside in parallel on the next door of resistance R 8 is with the filtering Alternating Component.

The left side is to identical to the circuit of TIP voltage sample among the circuit of TIP voltage sample and the common mode control circuit CWCC among Fig. 7, thus can be shared, only need to draw a current mirror Current Mirror branch more and get final product.

In sum, the present invention realizes 2/4 line conversion between 4 lines of 2 lines of subscribers feeder and CODEC; Realize the short loop constant-current feeding, long loop carries out the constant-voltage feeding function of pressure limiting; Support the on-hook transfer function; The inner true impedance coupling that realizes certain resistance can cooperate with CODEC easily and finish remaining complex impedance coupling.

Claims (10)

1. programme-controlled switching system user line interface method is characterized in that:

A, receive analog signal (VRX) for 4 lines of handling through phonetic codec chip, the external high pressure signal is separated with the chip low-voltage signal with chip periphery circuit and device by the chip internal receiving circuit, finish of the conversion of 4 lines of VRX signal to 2 lines, described chip internal receiving circuit comprises current/charge-voltage convertor and common mode control circuit (CMCC), described chip periphery circuit and device comprise transistor amplifier, the VRX signal of described reception is converted to feed current through current/charge-voltage convertor, described feed current provides Voltage Feedback by the transistor amplifier of described periphery to loop, and described common mode control circuit is controlled described transistor amplifier holding circuit balance;

B, for the subscriber line signal of handling through protective circuit; adopt peripheral capacitance isolating exterior high-voltage dc signal; simultaneously by capacitance and chip internal transtation mission circuit AC coupled; finish the conversion of 2 lines of subscriber line signal to 4 lines, described chip internal transtation mission circuit comprises that a reception operational amplifier amplifies 2 line signals.

2. programme-controlled switching system user line interface method according to claim 1, it is characterized in that: described chip periphery circuit is a transistor amplifier, the signal that chip internal sends is by peripheral transistor amplifier, provide Voltage Feedback to loop, the VRX signal is exported with the alternating-current feeding current system by transistor amplifier, wherein said transistor amplifier comprises a PNP triode (Q1), and described PNP triode (Q1) base stage connects low-voltage, guarantees the driving response of a described PNP triode to weak signal.

3. programme-controlled switching system user line interface method according to claim 2, it is characterized in that: described chip internal receiving circuit provides work feed current (ISS1) to peripheral PNP triode (Q1) emitter, the one PNP triode (Q1) collector electrode is connected to the TIP holding wire, the one PNP triode (Q1) base stage connects 0 volt of voltage, and the VRX signal acts on PNP triode (Q1) emitter with the alternating-current feeding current system.

4. programme-controlled switching system user line interface method according to claim 2, it is characterized in that: described transistor amplifier comprises the 2nd PNP triode (Q2), the 3rd NPN triode (Q3), the 2nd PNP triode (Q2), the 3rd NPN triode (Q3) amplify form with secondary and directly link to each other, common mode control circuit (CMCC) control the 2nd PNP triode (Q2), the 2nd PNP triode (Q2) base stage connects 0 volt of voltage, and the 3rd NPN triode (Q3) collector electrode is connected to the RING holding wire.

5. programme-controlled switching system user line interface circuit of realizing the described subscriber line interface method of claim 1, comprise the reception operational amplifier, its anode is connected resistance R 1, R3 respectively and sees through outside capacitance C1, C2 respectively with negative terminal and links to each other with TIP holding wire, RING holding wire, it is characterized in that:

Described reception operational amplifier anode connects resistance R 2, and inserts internal reference voltage (V _Ref), link to each other by resistance R 4 between its negative terminal and the output;

Current/charge-voltage convertor is connected to an outside PNP triode (Q1) jointly with work feed current (ISS1), and PNP triode (Q1) base stage connects 0 volt of voltage, and collector electrode is connected to the TIP holding wire;

Common mode control circuit (CMCC) connects two sampling resistors (RT), (RR) and respectively TIP holding wire, RING holding wire is sampled, and two sampling resistor outer ends connect a big resistance resistance (RL);

This common mode control circuit (CMCC) output connects a transistor amplifier that is directly linked to each other with the secondary amplification by the 2nd PNP triode (Q2) and the 3rd NPN triode (Q3), the 2nd PNP triode (Q2) emitter of this transistor amplifier links to each other with common mode control circuit (CMCC) output, and the 3rd NPN triode (Q3) collector electrode links to each other with the RING holding wire.

6. programme-controlled switching system user line interface circuit according to claim 5 is characterized in that: described the 2nd PNP triode (Q2) base stage connects 0 volt of voltage.

7. programme-controlled switching system user line interface circuit according to claim 5, it is characterized in that: described current/charge-voltage convertor comprises an operational amplifier, this operational amplifier negative terminal connects the VRX signal by resistance R 6, and its anode connects internal reference voltage (V _Ref), its output connects PMOS pipe (M1), and PMOS pipe (M1) emitter communicates with the operational amplifier negative terminal, and communicates with work feed current (ISS1), and PMOS pipe (M1) collector electrode connects an outside PNP triode (Q1).

8. programme-controlled switching system user line interface circuit according to claim 7 is characterized in that: described operational amplifier negative terminal links to each other with the reception operational amplifier output terminal by resistance R 5.

9. programme-controlled switching system user line interface circuit according to claim 5, it is characterized in that: described common mode control circuit (CMCC) comprises two common mode operational amplifiers, its negative terminal is connected to the TIP holding wire respectively, the RING holding wire, the output of common mode operational amplifier is respectively by superposeing behind the current mirror (Current Mirror), and convert voltage (Va) to by resistance R 7 and load on a comparator anode, this comparator output terminal connects the 2nd PMOS pipe (M2), the 2nd PMOS pipe (M2) emitter adds a builtin voltage (VDD), the 2nd PMOS pipe (M2) collector electrode links to each other with the 2nd PNP triode (Q2) emitter, and the anode of two common mode operational amplifiers in this common mode control circuit (CMCC) and the negative terminal of comparator insert internal reference voltage (V respectively _Ref).

10. programme-controlled switching system user line interface circuit according to claim 9, it is characterized in that: in the described common mode control circuit (CMCC), the common mode operational amplifier that connects the TIP holding wire is drawn another current mirror (Current Mirror) to a comparator negative terminal, convert voltage to by resistance R 8, this comparator anode inserts internal reference voltage (V _Ref), its output connects control valve (M3), and control valve (M3) operating current and work feed current (ISS1) are provided by internal fixation current source (Ibias).

Images