CN111917920B

CN111917920B - Intelligent loop holding device

Info

Publication number: CN111917920B
Application number: CN202010805550.6A
Authority: CN
Inventors: 沈洪
Original assignee: CIG Shanghai Co Ltd
Current assignee: CIG Shanghai Co Ltd
Priority date: 2020-08-12
Filing date: 2020-08-12
Publication date: 2022-02-08
Anticipated expiration: 2040-08-12
Also published as: CN111917920A

Abstract

The invention discloses intelligent loop holding equipment which comprises a sending signal impedance matching circuit, a receiving signal impedance matching circuit, a blocking coupling circuit and a loop holder, wherein the sending signal impedance matching circuit and the receiving signal impedance matching circuit are connected with the blocking coupling circuit, the blocking coupling circuit is connected with the loop holder, the sending signal impedance matching circuit is used for performing impedance matching on a TX end of the loop holder, and the receiving signal impedance matching circuit is used for performing impedance matching on an RX end of the loop holder. The invention can meet the requirements of any external impedance configuration by only using two basic test modes of low resistance and high resistance, and is convenient to use.

Description

Intelligent loop holding device

Technical Field

The invention relates to a fixed telephone test device, in particular to a loop holding device.

Background

A fixed telephone is a device commonly used in our daily lives. Many network communication devices in the home have a telephone interface. The telephone interfaces are tested during the production of the equipment, and various impedance requirements, such as 600 ohms, 900 ohms, F1, F2 and the like, of the telephone external interfaces correspond to the impedance requirements of the telephone external interfaces in different countries and regions. This puts various demands on the impedance pattern of the meter, and it is difficult to have a meter that can meet all the demands currently on the market.

A conventional telephone interface voice test circuit is shown in fig. 1. The function of the loop keeper is to provide a dc load for the telephone to go off-hook, but at the same time it does not have an effect on the audio signal carried over the telephone line, so the resistance to the audio signal is large. Generally, the inductor with the height of more than 10H is adopted for realization, the size and the cost are large, and the use is inconvenient. In addition, the impedance converter is costly in an active manner.

Thus, it is desirable to find a test apparatus that is less costly and that also has an easily implemented impedance transformation.

Disclosure of Invention

The invention aims to overcome the defect that a fixed telephone test instrument in the prior art is difficult to meet various test requirements, and provides intelligent loop holding equipment.

The invention solves the technical problems through the following technical scheme:

an intelligent loop holding apparatus characterized by comprising a transmission signal impedance matching circuit, a reception signal impedance matching circuit, a dc blocking coupling circuit, and a loop holder, wherein,

the transmitting signal impedance matching circuit and the receiving signal impedance matching circuit are both connected with the blocking coupling circuit, the blocking coupling circuit is connected with the loop retainer,

the transmission signal impedance matching circuit is used for performing impedance matching on the TX end of the loop retainer, and the reception signal impedance matching circuit is used for performing impedance matching on the RX end of the loop retainer.

Preferably, the transmission signal impedance matching circuit comprises a first resistor and a first capacitor and a second resistor which are connected in parallel, and the first resistor is connected in series with the first capacitor and the second resistor which are connected in parallel.

Preferably, the dc blocking coupling circuit comprises a second capacitor and a third capacitor.

Preferably, the received signal impedance matching circuit comprises a third resistor and a fourth capacitor and a fourth resistor connected in parallel, and the third resistor is connected in series with the fourth capacitor and the fourth resistor connected in parallel.

Preferably, the dc blocking coupling circuit comprises a fifth capacitor and a sixth capacitor.

Preferably, the loop holder includes a bridge rectifier, a first transistor, a second transistor, a fifth resistor, a sixth resistor, and a seventh capacitor, wherein,

the collector of the first triode is connected with the collector of the second triode, the emitter of the first triode is connected with the base of the second triode, the fifth resistor is connected between the output of the bridge rectifier and the base of the first triode, and the base of the first triode is connected with the seventh capacitor.

On the basis of the common knowledge in the field, the above preferred conditions can be combined randomly to obtain the preferred embodiments of the invention.

The positive progress effects of the invention are as follows: the invention provides a plug-in interface instrument, which can meet the requirement of any external impedance configuration by using two basic test modes of low resistance and high resistance and is convenient to use. In the invention, the impedance conversion and the direct current loop retainer are integrated, so that the test can be conveniently completed.

Drawings

Fig. 1 is a schematic diagram of a prior art phone interface voice test circuit.

Fig. 2 is a schematic block diagram of an intelligent loop holding apparatus according to an embodiment of the present invention.

Fig. 3 is a schematic diagram of a transmit signal impedance matching circuit according to an embodiment of the invention.

Fig. 4 is a schematic diagram of a received signal impedance matching circuit according to an embodiment of the invention.

Fig. 5 is a schematic diagram of a loop keeper according to an embodiment of the invention.

Detailed Description

The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.

Referring to fig. 2-5, the intelligent loop-maintaining apparatus of the present invention will be described. The device comprises a sending signal impedance matching circuit 11, a receiving signal impedance matching circuit 12, a blocking coupling circuit 2 and a loop retainer 3, wherein the input end of the sending signal impedance matching circuit 11 is connected with a sending end (low resistance) of a test signal of a test instrument, the output end of the receiving signal impedance matching circuit 12 is connected with a test signal receiving end of the test instrument, the loop retainer is connected with a device to be tested, and at the moment, the combination of the test instrument and the loop retainer is equivalent to a telephone.

The transmission signal impedance matching circuit 11 and the reception signal impedance matching circuit 12 are both connected to the dc blocking coupling circuit 13, the dc blocking coupling circuit 13 is connected to the loop holder 14,

Referring to fig. 3 to 5, specific compositions of the transmission signal impedance matching circuit, the reception signal impedance matching circuit, and the loop holder are described, respectively.

A transmission signal impedance matching circuit: the meter uses a low impedance (0 ohms) for external transmissions, the meter referring to a test meter such as a voice test meter (e.g., PCM4), the low impedance referring to the output impedance of the voice test meter being (0 ohms).

Then a specific impedance match is made at the TX input of the external intelligent loop holder. Since the matching devices are all resistors or capacitors, the devices can be conveniently obtained.

Specifically, referring to fig. 3, the transmission signal impedance matching circuit includes a first resistor R1 and a first capacitor C1 and a second resistor R2 connected in parallel, and the first resistor R1 is connected in series with the first capacitor C1 and the second resistor R2 connected in parallel. The dc blocking coupling circuit comprises a second capacitance CX1 and a third capacitance CX 2. The first resistor R1, the second resistor R2 and the first capacitor C1 are all key devices for impedance matching. The second capacitance CX1 and the third capacitance CX2 are used as dc blocking capacitances, and the capacitance value needs to be larger than 10 uF. (in FIG. 3, Tip, Ring indicates two wires constituting a telephone wiring circuit, and are present in pairs. TIP0 and RING0 indicate that they are another pair of wires.)

Receive signal impedance matching circuit: the meter receiving circuit adopts high resistance (internal resistance of more than 10K ohm, which refers to the impedance inside the meter and can be set through a meter keyboard or an interface), and then the RX input end of the external intelligent loop retainer is connected in parallel with the matching of specific impedance. Since the matching devices are all resistors or capacitors, the devices can be conveniently obtained.

Specifically, referring to fig. 4, the received signal impedance matching circuit includes a third resistor R3 and a fourth capacitor C3 and a fourth resistor R4 connected in parallel, and the third resistor R3 is connected in series with the fourth capacitor C3 and the fourth resistor R4 connected in parallel. The dc blocking coupling circuit comprises a fifth capacitance CX3 and a sixth capacitance CX 4. The third resistor R3, the fourth resistor R4 and the fourth capacitor C3 are all key devices for impedance matching. The capacitance values of the fifth capacitor CX3 and the sixth capacitor CX4 are required to be larger than 10 uF.

Referring to fig. 5, the loop holder includes a bridge rectifier, a first transistor VT1, a second transistor VT2, a fifth resistor R10, a sixth resistor R11, and a seventh capacitor C10, wherein,

the collector of the first triode VT1 is connected with the collector of the second triode VT2, the emitter of the first triode VT1 is connected with the base of the second triode VT2, the fifth resistor R10 is connected between the output of the bridge rectifier and the base of the first triode VT1, and the base of the first triode VT1 is connected with the seventh capacitor C10.

In fig. 5D 1 is a bridge rectifier to ensure the correct polarity of the incoming voltage. VT1 and VT2 form a high-gain Darlington tube; r10, R11 provide dc bias for VT 1. C10 provides an ac signal short circuit, preferably a high quality tantalum capacitor. R15 provides negative feedback for the transistors preventing them from operating into saturation. The VD1 is used for protecting the voltage regulator tubes from damaging VT1 and VT2 due to overhigh external voltage.

While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that these are by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.

Claims

1. An intelligent loop holding apparatus comprising a transmission signal impedance matching circuit, a reception signal impedance matching circuit, a dc blocking coupling circuit, and a loop holder, wherein,

the transmission signal impedance matching circuit is used for performing impedance matching on a TX end of the loop holder, the reception signal impedance matching circuit is used for performing impedance matching on an RX end of the loop holder,

the transmitting signal impedance matching circuit comprises a first resistor, a first capacitor and a second resistor which are connected in parallel, wherein the first resistor is connected with the first capacitor and the second resistor which are connected in parallel in series;

the receiving signal impedance matching circuit comprises a third resistor, a fourth capacitor and a fourth resistor which are connected in parallel, wherein the third resistor is connected with the fourth capacitor and the fourth resistor which are connected in parallel in series.

2. The intelligent loop-holding device of claim 1, wherein the dc blocking coupling circuit comprises a second capacitor connected between the first capacitor and the first output TIPO terminal of the transmit signal impedance matching circuit, and a third capacitor connected between the second input RING terminal of the transmit signal impedance matching circuit and the second output RING terminal of the transmit signal impedance matching circuit.

3. The intelligent loop-holding device of claim 1, wherein said dc blocking coupling circuit comprises a fifth capacitor connected between said receive signal impedance matching circuit first input TIP terminal and said receive signal impedance matching circuit first output TIPI terminal, and a sixth capacitor connected between said receive signal impedance matching circuit second input RING terminal and said receive signal impedance matching circuit second output RING terminal.

4. The intelligent loop holding device of any one of claims 1-3, wherein the loop holder comprises a bridge rectifier, a first transistor, a second transistor, a fifth resistor, a sixth resistor, and a seventh capacitor, wherein,