CN113938628B - Current-frequency oscillator for digital pixel readout circuit - Google Patents
Current-frequency oscillator for digital pixel readout circuit Download PDFInfo
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- CN113938628B CN113938628B CN202111170997.1A CN202111170997A CN113938628B CN 113938628 B CN113938628 B CN 113938628B CN 202111170997 A CN202111170997 A CN 202111170997A CN 113938628 B CN113938628 B CN 113938628B
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- 230000009286 beneficial effect Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000007599 discharging Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N25/00—Circuitry of solid-state image sensors [SSIS]; Control thereof
- H04N25/70—SSIS architectures; Circuits associated therewith
- H04N25/71—Charge-coupled device [CCD] sensors; Charge-transfer registers specially adapted for CCD sensors
- H04N25/75—Circuitry for providing, modifying or processing image signals from the pixel array
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Abstract
The invention belongs to the technical field of image sensors, and particularly relates to a current-frequency oscillator used in a digital pixel reading circuit, which comprises the following components: the detector, the current buffer circuit, the first reset circuit, the second reset circuit and the comparator; the output end of the detector is connected with the input end of the current buffer circuit, and the output end of the current buffer circuit is connected with the input end of the comparator; the first reset circuit and the second reset circuit are respectively connected with the comparator in parallel to form a current-frequency oscillator; the invention realizes the digital pixel readout circuit compatible with the current directions of the inflow detector and the outflow detector by adding the current direction control logic circuit into the current-frequency oscillator circuit, and greatly increases the application range of the circuit at the cost of very small area and power consumption.
Description
Technical Field
The invention belongs to the technical field of image sensors, and particularly relates to a current-frequency oscillator used in a digital pixel reading circuit.
Background
In conventional analog readout integrated circuit technology, the current generated by the detector is locally accumulated and stored in a capacitor (electron well); the maximum charge stored in the integration time is equal to the product of the total capacitance and the maximum allowed voltage across the capacitor, and the unit well depth fundamentally determines the maximum sensitivity of the detector Focal Plane Array (FPA) given the limited voltage and capacitance density that the technology limits.
Digital pixel readout integrated circuits (DROICs) typically include a pre-amplifier/buffer, an in-pixel analog-to-digital converter circuit consisting of a photocurrent-to-frequency converter (I-to-F converter) coupled to a counter/shift register, and control circuitry. The digital pixel readout integrated circuit overcomes the limitations of the traditional analog focal plane array by digitizing the in-pixel signals, and can achieve a larger dynamic range, faster low-noise all-digital readout and on-chip processing to reduce sensor power.
Infrared focal plane detectors are generally classified as both pon and non p types, i.e., the detector current direction is divided into inflow and outflow. Different digital pixel readout circuits and current-frequency oscillators are often required to be designed aiming at different detector types, and an input signal cannot be processed by adopting one current-frequency oscillator, so that the problems of resource waste and difficulty in measuring the signal are caused; therefore, designing a digital pixel readout circuit architecture compatible with both PonN and NonP detector types is of great significance.
Disclosure of Invention
To solve the above problems of the prior art, the present invention proposes a current-frequency oscillator for use in a digital pixel readout circuit, the device comprising: a current buffer circuit, a first reset circuit, a second reset circuit, and a comparator; the input end of the current buffer circuit is connected with the peripheral matching circuit, the output end of the current buffer circuit is connected with the input end of the comparator, and the peripheral matching circuit is a detector; the first reset circuit and the second reset circuit are respectively connected with the comparator in parallel to form a current-frequency oscillator.
Preferably, the detector is a photodiode; the photosensitive diode is of a non P type or a PonN type; if the current buffer circuit is a Nonp type photodiode, the cathode of the photodiode is grounded, and the anode of the photodiode is connected with the input end of the current buffer circuit; if the light source is a PonN type light sensitive secondary, the anode of the light sensitive diode is grounded, and the cathode of the light sensitive diode is connected with the input end of the current buffer circuit.
Preferably, the current buffer circuit comprises a MOS tube N2, a MOS tube N3, a MOS tube P2 and a MOS tube P3; the source electrode of the MOS tube N2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube N3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube N3 is connected with the input port of the comparator, and the grid electrode is connected with a current direction control signal; the source electrode of the MOS tube P2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube P3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube P3 is connected with the input port of the comparator, and the grid electrode is connected with the current direction control signal.
Preferably, the first reset circuit comprises a potential reset tube P1 and a NAND gate logic array; the source electrode of the potential reset tube P1 is connected with the power supply voltage, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NAND gate logic array; the first input end of the NAND gate logic array is connected with a current direction control signal, and the second input end is connected with the output end of the comparator.
Preferably, the second reset circuit comprises a potential reset tube N1 and a NOR gate logic array; the source electrode of the potential reset tube N1 is grounded, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NOR gate logic array; the first input end of the NOR gate logic array is connected with a current direction control signal, and the second input end of the NOR gate logic array is connected with the output end of the comparator.
Preferably, the current-frequency oscillator further comprises an integrating capacitor, an upper polar plate of the integrating capacitor is connected with the input end of the comparator, and a lower polar plate of the integrating capacitor is grounded.
The invention has the beneficial effects that:
the invention realizes the digital pixel readout circuit compatible with the current directions of the inflow detector and the outflow detector by adding the current direction control logic circuit into the current-frequency oscillator circuit, and greatly increases the application range of the circuit at the cost of very small area and power consumption.
Drawings
In order to make the technical scheme and beneficial effects of the invention clearer, the invention provides the following drawings for explanation:
FIG. 1 is a schematic block diagram of a prior art digital pixel readout circuit;
fig. 2 is a block diagram of a circuit of a frequency oscillator in the present invention.
Detailed Description
The following description of the embodiments of the present invention will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present invention, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
The drawings provided in the present embodiment merely illustrate the basic idea of the present invention by way of illustration, and only the components related to the present invention are shown in the drawings, not according to the number, shape and size of the components in actual implementation, the form, number and proportion of each component in actual implementation may be arbitrarily changed, and the layout of the components may be more complicated. The structures, proportions, sizes, etc. shown in the drawings attached hereto are for illustration purposes only and are not intended to limit the scope of the invention, which is defined by the claims, but rather by the claims.
A digital pixel readout circuit, as shown in fig. 1, comprising: the detector, the oscillator, the counter, the displacement register and the data bus are formed; the detector is used for acquiring an optical signal, generating a photocurrent according to a photoelectric response, and transmitting the generated photocurrent to the oscillator; the oscillator is used for converting the photocurrent into an oscillation signal (frequency signal) with the frequency related to the current intensity, and forwarding the oscillation signal (frequency signal) to the counter and the shift register; the counter and the shift register count the oscillation signal (frequency signal) and output the oscillation signal through the data bus. Because the detector currents of different types are divided into two directions of inflow and outflow, and different current-frequency oscillator circuits are designed generally, the invention provides a digital pixel reading circuit compatible with the two directions of inflow and outflow of the detector currents.
An embodiment of a current-frequency oscillator for use in a digital pixel readout circuit, as shown in fig. 2, the oscillator comprising: a current buffer circuit, a first reset circuit, a second reset circuit, and a comparator; the input end of the current buffer circuit is connected with the peripheral matching circuit, the output end of the current buffer circuit is connected with the input end of the comparator, and the peripheral matching circuit is a detector; the first reset circuit and the second reset circuit are respectively connected with the comparator in parallel to form a current-frequency oscillator.
The detector is a photosensitive diode; if the photodiode is of the non P type, the cathode of the photodiode is grounded, and the anode of the photodiode is connected with the input end of the current buffer circuit; if the photodiode is of the PonN type, the anode of the photodiode is grounded, and the cathode of the photodiode is connected with the input end of the current buffer circuit.
Optionally, the detector is composed of a first photodiode, the cathode of the first photodiode is grounded, and the anode of the first photodiode is connected with the input end of the current buffer circuit.
Optionally, the detector is formed by a second photodiode, the anode of the second photodiode is grounded, and the cathode of the second photodiode is connected with the input end of the current buffer circuit.
Preferably, the first photodiode and the second photodiode are connected in parallel to form a detector together. The first photodiode and the second photodiode are connected in parallel to output photocurrents in different directions, so that the output voltage of the detector is increased.
The current buffer circuit comprises a MOS tube N2, a MOS tube N3, a MOS tube P2 and a MOS tube P3; the source electrode of the MOS tube N2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube N3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube N3 is connected with the input port of the comparator, and the grid electrode is connected with a current direction control signal; the source electrode of the MOS tube P2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube P3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube P3 is connected with the input port of the comparator, and the grid electrode is connected with the current direction control signal.
The current buffer MOS tube is connected in series between the current input port of the detector and the input port of the comparator; buffer MOS transistors N2 and P2 supporting two current directions of PonN (inflow current) and NonP (outflow current) and corresponding switch control transistors N3 and P3 are connected in parallel.
And the input end of the comparator is connected with the output port of the current buffer module, and the output end of the comparator is connected with the frequency signal output port of the detection unit and is used for generating an oscillation pulse signal in the continuous charging or discharging process of the detector current.
Preferably, the current-frequency oscillator further comprises an integrating capacitor Cint, an upper polar plate Vint of the integrating capacitor is connected with an input end of the comparator, and a lower polar plate is grounded; this capacitance is charged or discharged by the detector current.
The reset circuit comprises an N1 pipe for resetting the PonN type detector and control logic thereof, and a P1 pipe for resetting the NonP type detector and control logic thereof; for resetting the comparator input node Vint to the supply voltage or ground.
Preferably, the first reset circuit comprises a potential reset tube P1 and a NAND gate logic array; the source electrode of the potential reset tube P1 is connected with the power supply voltage, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NAND gate logic array; the first input end of the NAND gate logic array is connected with a current direction control signal, and the second input end is connected with the output end of the comparator.
Preferably, the second reset circuit comprises a potential reset tube N1 and a NOR gate logic array; the source electrode of the potential reset tube N1 is grounded, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NOR gate logic array; the first input end of the NOR gate logic array is connected with a current direction control signal, and the second input end of the NOR gate logic array is connected with the output end of the comparator.
Specifically, the current-frequency oscillator includes: the buffer MOS transistors N2 and P2 and the branch switch control transistors N3 and P3 are input; the source electrode of the N2 tube is connected with the detector, the drain electrode of the N3 tube is connected with the source electrode of the N3 tube, the grid electrode of the N3 tube is connected with the adjustable bias voltage Vcomp, the drain electrode of the N3 tube is connected with the input port Vint of the comparator, and the grid electrode of the N3 tube is connected with the current direction control signal i_dir; the source electrode of the P2 tube is connected with the detector, the drain electrode is connected with the source electrode of the P3 tube, the grid electrode is connected with the adjustable bias voltage Vcomp1, the drain electrode of the P3 tube is connected with the input port Vint of the comparator, and the grid electrode of the P3 tube is connected with the current direction control signal i_dir.
The upper polar plate of the integrating capacitor Cint is connected with the input end Vint of the comparator, and the lower polar plate is grounded; the output end of the comparator is connected with the input port of the reset circuit; the source electrode of a power potential reset tube P1 in the reset circuit is connected with a power voltage, the drain electrode is connected with the input end Vint of the comparator, and the grid electrode is controlled by a logic circuit formed by a current direction control signal i_dir and the output end of the comparator together; in the reset circuit, the source electrode of the ground potential reset tube N1 is grounded, the drain electrode is connected with the input end Vint of the comparator, and the grid electrode is controlled by a logic circuit formed by a current direction control signal i_dir and the output end of the comparator.
The working principle of the current-frequency oscillator circuit is as follows:
1) When the detector type is PonN type, the detector current is in the inflow direction; at this time, the i_dir signal is configured to be low level, the buffer branches N2 and N3 are disconnected, and the detector current flows in through the branches P2 and P3; i_dir is low so that the reset tube P1 remains turned off all the time, and the reset tube N1 is turned off when the comparator output is high; the detector current charges the integrating capacitor Cint, and when the capacitor voltage Vint reaches the comparator overturning voltage, the comparator output is changed from high level to low level; the reset tube N1 is conducted, the voltage Vint of the upper polar plate of the capacitor is reset to the ground potential by the reset tube N1, the output of the comparator is turned to be high level again, the reset tube N1 is disconnected, and the detector current charges the capacitor Cint again until the output of the comparator is turned over and then is reset to the ground potential; the charge and discharge are continuously circulated, and the output end of the comparator generates a pulse frequency signal proportional to the current of the detector;
2) When the detector type is of the non P type, the detector current is in the outflow direction; at this time, the i_dir signal is configured to be at a high level, the buffer branches P2 and P3 are disconnected, and the detector current flows out through the N2 and N3 branches; i_dir is high so that the reset tube N1 is kept off all the time, and the reset tube P1 is turned off when the output of the comparator is low; the detector current discharges the integrating capacitor Cint, and when the capacitor voltage Vint is lower than the overturning voltage of the comparator, the output of the comparator is changed from low level to high level; the reset tube P1 is conducted, the upper polar plate voltage Vint of the capacitor is reset to the power supply voltage by the reset tube P1, at the moment, the output of the comparator is turned to be low level again, the reset tube P1 is disconnected, and the detector current discharges the capacitor Cint again until the output of the comparator is turned over and then is reset to the power supply voltage; the charge and discharge are circulated continuously, and the output end of the comparator generates a pulse frequency signal proportional to the current of the detector.
While the foregoing is directed to embodiments, aspects and advantages of the present invention, other and further details of the invention may be had by the foregoing description, it will be understood that the foregoing embodiments are merely exemplary of the invention, and that any changes, substitutions, alterations, etc. which may be made herein without departing from the spirit and principles of the invention.
Claims (2)
1. A current-frequency oscillator for use in a digital pixel readout circuit, the oscillator comprising: a current buffer circuit, a first reset circuit, a second reset circuit, and a comparator; the input end of the current buffer circuit is connected with the peripheral matching circuit, the output end of the current buffer circuit is connected with the input end of the comparator, and the peripheral matching circuit is a detector; the first reset circuit and the second reset circuit are respectively connected with the comparator in parallel to form a current-frequency oscillator;
the current buffer circuit comprises a MOS tube N2, a MOS tube N3, a MOS tube P2 and a MOS tube P3; the source electrode of the MOS tube N2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube N3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube N3 is connected with the input port of the comparator, and the grid electrode is connected with a current direction control signal; the source electrode of the MOS tube P2 is connected with the detector, the drain electrode is connected with the source electrode of the MOS tube P3, and the grid electrode is connected with the adjustable bias voltage; the drain electrode of the MOS tube P3 is connected with the input port of the comparator, and the grid electrode is connected with a current direction control signal;
the first reset circuit comprises a potential reset tube P1 and a NAND gate logic array; the source electrode of the potential reset tube P1 is connected with the power supply voltage, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NAND gate logic array; the first input end of the NAND gate logic array is connected with a current direction control signal, and the second input end is connected with the output end of the comparator;
the second reset circuit comprises a potential reset tube N1 and a NOR gate logic array; the source electrode of the potential reset tube N1 is grounded, the drain electrode is connected with the input end of the comparator, and the grid electrode is connected with the output end of the NOR gate logic array; the first input end of the NOR gate logic array is connected with a current direction control signal, and the second input end of the NOR gate logic array is connected with the output end of the comparator;
the current-frequency oscillator also comprises an integrating capacitor, wherein an upper polar plate of the integrating capacitor is connected with the input end of the comparator, and a lower polar plate of the integrating capacitor is grounded.
2. A current-frequency oscillator for use in a digital pixel readout circuit according to claim 1, wherein the detector is a photodiode; the photosensitive diode is of a non P type or a PonN type; in the case of a Nonp type photodiode, the cathode of the photodiode is grounded, and the anode of the photodiode is connected with the input end of the current buffer circuit; if the current buffer circuit is a PonN type photodiode, the anode of the photodiode is grounded, and the cathode of the photodiode is connected with the input end of the current buffer circuit.
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| CN202111170997.1A CN113938628B (en) | 2021-10-08 | 2021-10-08 | Current-frequency oscillator for digital pixel readout circuit |
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| CN202111170997.1A CN113938628B (en) | 2021-10-08 | 2021-10-08 | Current-frequency oscillator for digital pixel readout circuit |
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