CN113937191A

CN113937191A - Method for manufacturing device

Info

Publication number: CN113937191A
Application number: CN202111542313.6A
Authority: CN
Inventors: 李卫东; 李新连; 赵志国; 赵东明; 张赟; 夏渊; 秦校军; 王雪玲; 王森
Original assignee: Huaneng Clean Energy Research Institute; Huaneng Renewables Corp Ltd
Current assignee: Huaneng Clean Energy Research Institute; Huaneng Renewables Corp Ltd
Priority date: 2021-12-16
Filing date: 2021-12-16
Publication date: 2022-01-14

Abstract

The application provides a manufacturing method of a device, can form transparent conductive film layer on the substrate to be processed, be formed with organic coating on the transparent conductive film layer, be formed with the sculpture groove that runs through organic coating in the grid line region, form the conducting material layer that covers organic coating and sculpture groove, utilize the mode of laser etching, the conducting material layer on the organic coating etches, in order to expose organic coating, utilize organic solvent to dissolve organic coating, can get rid of the conducting material layer on organic coating and the organic coating, form the electrically conductive grid line that is located the grid line region, when utilizing organic solvent to dissolve organic coating, organic solvent and the organic coating contact that is not covered by the conducting material layer, demoulding efficiency is higher, improve the manufacturing efficiency of grid line.

Description

Method for manufacturing device

Technical Field

The application relates to the technical field of energy sources, in particular to a manufacturing method of a device.

Background

The solar thin film cell is also called a solar chip or a photovoltaic cell, is a photoelectric device which directly generates electricity by utilizing sunlight, and common thin film solar cells comprise cadmium telluride (CdTe), Copper Indium Gallium Selenide (CIGS), amorphous silicon (a-Si: H), gallium arsenide (GaAs), perovskite solar cells and the like. The basic structure of a thin film solar cell generally consists of a PN junction semiconductor layer and front and rear electrodes, and generally, the solar cell includes a first electrode, an electron transport layer, a light absorption layer, a hole transport layer, and a second electrode, where the light absorption layer can generate electron-hole pairs under illumination, electrons can be transported to the first electrode through the electron transport layer, and holes can be transported to the second electrode through the hole transport layer, thereby generating current. The electron transport layer, the light absorption layer, the hole transport layer, and the like may be referred to as functional layers.

In particular, for a trans-structured solar thin film cell, the first electrode layer is a light receiving side electrode layer, and a transparent conductive oxide thin film material (TCO) is generally used, which is required to have both high permeability and high conductivity from the viewpoint of functional requirements of the film layer. The film layer serves on the one hand for collecting charges and transporting them in the plane, so that it is required to have as high an electrical conductivity as possible; on the other hand, the electrode film on the light receiving side is also required to have a high transmittance in order to let more light enter the absorption layer to excite the photogenerated carriers. However, in terms of technology, the conductivity and the transmittance of the transparent conductive film layer are restricted to each other, and the maximum conductivity and the maximum transmittance cannot be obtained at the same time. In order to effectively collect carriers, a metal grid line can be prepared on the surface of the transparent conductive film so as to improve the carrier collection capability, and meanwhile, the thickness of the TCO layer can be reduced to the greatest extent, and the light transmittance is improved. However, the current grid line forming method has the problem of low efficiency.

Disclosure of Invention

In view of the above, an object of the present application is to provide a method for manufacturing a device, which is used to improve the forming efficiency of a gate line.

To achieve the above object, the present application provides a method of manufacturing a device, comprising:

providing a substrate to be processed; a transparent conductive film layer, an organic coating layer on the transparent conductive film layer and an etching groove which is positioned in the grid line region and penetrates through the organic coating layer are formed on the substrate to be processed;

forming a conductive material layer covering the organic coating and the etched groove;

etching the conductive material layer on the organic coating by using a laser etching mode to expose the organic coating;

dissolving the organic coating by using an organic solvent to remove the organic coating, wherein the conductive material layer positioned in the grid line region is used as a conductive grid line; the transparent conductive film layer and the conductive grid line are used as a lower electrode material layer.

Optionally, etching the conductive material layer on the organic coating by using a laser etching method to expose the organic coating, including:

etching the conductive material layer on the organic coating by using a laser etching mode to form a groove penetrating through the conductive material layer; the extending direction of the groove is parallel to the extending direction of the grid line region, and the groove is positioned in the middle of the continuous conductive material layer.

Optionally, the method further includes:

sequentially forming a functional material layer and an upper electrode material layer on the lower electrode material layer; the functional material layer is used for generating and transmitting photon-generated carriers.

Optionally, the functional material layer includes an electron transport layer, a light absorption layer, and a hole transport layer, which are sequentially stacked.

Optionally, a plurality of the gate line regions are arranged in parallel.

Optionally, the width range of the gate line region is 5 to 50 μm, and the distance range between adjacent gate line regions is 0.5 to 5 mm.

Optionally, the etching groove further penetrates through part or all of the transparent conductive film layer.

Optionally, the conductive grid line is made of one or more of the following materials: gold, silver, copper, aluminum, nickel, graphene.

Optionally, the organic coating is a photoresist layer, and the organic solvent is DMSO.

Optionally, the solar cell device comprises a plurality of cells; forming a functional material layer and an upper electrode material layer on the transparent conductive film layer in sequence, including:

scribing the lower electrode material layer to form first trenches dividing the lower electrode material layer into lower electrodes of the plurality of battery cells;

forming a functional material layer on the lower electrode material layer and in the first trench;

scribing the functional material layer to form a second groove; the second grooves divide the functional material layer into functional layers of the plurality of battery cells;

forming an upper electrode material layer on the functional material layer and in the second trench;

scribing the upper electrode material layer to form third trenches dividing the upper electrode material layer into upper electrodes of a plurality of battery cells; at least a part of the upper electrode is connected with the lower electrode in the adjacent battery cell through the second groove to realize the series connection of the plurality of battery cells.

The embodiment of the application provides a manufacturing method of a device, can form transparent conductive film layer on the substrate to be processed, be formed with organic coating on the transparent conductive film layer, be formed with the sculpture groove that runs through organic coating in the grid line region, form the conducting material layer that covers organic coating and sculpture groove, utilize the mode of laser etching, the conducting material layer on the organic coating etches, in order to expose organic coating, utilize organic solvent to dissolve organic coating, can get rid of the conducting material layer on organic coating and the organic coating, form the electrically conductive grid line that is located the grid line region, when utilizing organic solvent to dissolve organic coating, organic solvent contacts with the organic coating that is not covered by the conducting material layer, demoulding efficiency is higher, improve the manufacturing efficiency of grid line.

Drawings

In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present application, and it is obvious for those skilled in the art to obtain other drawings based on these drawings without creative efforts.

FIG. 1 shows a schematic flow diagram of a method of manufacturing a device according to an embodiment of the present application;

fig. 2-7 show schematic structural diagrams during device formation according to fabrication methods of embodiments of the present application.

Detailed Description

In order to make the aforementioned objects, features and advantages of the present application more comprehensible, embodiments accompanying the present application are described in detail below with reference to the accompanying drawings.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, but the present application may be practiced in other ways than those described herein, and it will be apparent to those of ordinary skill in the art that the present application is not limited by the specific embodiments disclosed below.

Next, the present application will be described in detail with reference to the drawings, and in the detailed description of the embodiments of the present application, the cross-sectional views illustrating the structure of the device are not enlarged partially according to the general scale for convenience of illustration, and the drawings are only examples, which should not limit the scope of the protection of the present application. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.

As described in the background art, in order to effectively collect carriers, a metal grid line may be formed on the surface of the transparent conductive film to improve the carrier collection capability, and at the same time, the thickness of the TCO layer may be reduced to the greatest extent, and the light transmittance may be improved. At present, the preparation process of the metal grid line can be specifically as follows: 1) uniformly coating the photoresist on the surface of the battery chip by adopting a printing mode, and baking and curing after printing; 2) covering a mask plate with a grid line shape on the surface of the chip, and irradiating through the mask plate by using UV light to perform partial exposure; 3) developing in a developing solution to wash away the photoresist of the exposed part; 4) plating a layer of metal film on the developed substrate in an evaporation plating mode; 5) and introducing the substrate into an organic solvent, washing away the photoresist and the metal film on the photoresist, and finally, leaving the metal wire with the shape of the grid line.

However, the inventors have found through research that in a stripping process for removing the photoresist and the metal film thereon, the organic solvent is difficult to contact with the photoresist, resulting in low stripping efficiency, and thus the conventional grid line forming method has a problem of low efficiency.

Based on the technical problem, an embodiment of the present application provides a method for manufacturing a device, a transparent conductive film layer may be formed on a substrate to be processed, an organic coating layer is formed on the transparent conductive film layer, an etching groove penetrating through the organic coating layer is formed in a gate line region, a conductive material layer covering the organic coating layer and the etching groove is formed, the conductive material layer on the organic coating layer is etched in a laser etching manner to expose the organic coating layer, the organic coating layer is dissolved by an organic solvent, the organic coating layer and the conductive material layer on the organic coating layer may be removed, a conductive gate line located in the gate line region is formed, when the organic coating layer is dissolved by the organic solvent, the organic solvent contacts the organic coating layer which is not covered by the conductive material layer, the demolding efficiency is high, and the manufacturing efficiency of the gate line is improved.

For the sake of understanding, the following describes a method for manufacturing a device provided in the embodiments of the present application in detail with reference to the accompanying drawings.

Referring to fig. 1, a flow chart of a method for manufacturing a device according to an embodiment of the present application is shown, and referring to fig. 2 to fig. 7, schematic structural diagrams in a process for manufacturing a device according to an embodiment of the present application are shown, and the method may include the following steps.

S101, providing a substrate 100 to be processed, as shown in fig. 2, 3 and 4.

In embodiments of the present application, devices may be formed on a substrate 100 to be processed, with the substrate 100 to be processed providing support for device structures thereon. The substrate to be processed 100 may be a glass substrate or a flexible substrate. The substrate 100 to be processed may have a gate line region for forming the conductive gate line 401 and a non-gate region, the gate line region may be a stripe region, a plurality of gate line regions may be arranged in parallel, and the non-gate region is a region between the gate line regions. The width range of the conductive grid lines in the grid line region can be 5-50 mu m, one grid line region can be provided with one conductive grid line, the conductive grid lines and the grid line region can have the same width and length, then a plurality of conductive grid lines are also arranged in parallel, and the distance between adjacent grid line regions, namely the width range of the non-grid region can be 0.5-5 mm.

The transparent conductive film layer 200 may be formed on the substrate 100 to be processed, and the material of the transparent conductive film layer 200 may be Transparent Conductive Oxide (TCO), such as Indium Tin Oxide (ITO), Indium Zinc Oxide (IZO), or fluorine-tin oxide (FTO). The transparent conductive film layer 200 may be formed by magnetron sputtering, physical vapor deposition, or the like.

The organic coating 300 may be formed on the transparent conductive film layer 200, and the material of the organic coating 300 may be a photoresist or other organic film layers. The organic coating layer 300 may be formed by printing, and when the organic coating layer 300 is a photoresist layer, baking and curing may be performed after the photoresist layer is formed.

The organic coating 300 may be formed on the non-gate region without forming the gate line region, and in particular, after the organic coating 300 is formed, the organic coating 300 may be etched to form an etching groove 302 penetrating the organic coating in the gate line region. Specifically, when the organic coating 300 is a photoresist layer, after the photoresist layer is formed, a mask having a gate line shape may be covered on the substrate 100 to be processed, UV light may be irradiated through the mask to expose an exposure region 301 of the photoresist layer, as shown in fig. 3, and then developed in a developing solution to wash away the photoresist in the exposure region 301, thereby forming an etching trench 302. Of course, when the organic coating 300 is made of other materials, the organic coating 300 formed on the non-gate region may be obtained in other manners.

In the embodiment of the present invention, the etching groove 302 may further penetrate through part or all of the transparent conductive film layer 200, that is, the transparent conductive film layer 200 may be etched by using an additional etching process, so that the bottom surface of the conductive gate line 401 formed subsequently is lower than the upper surface (not shown) of the transparent conductive film layer 200.

S102, a conductive material layer 400 is formed to cover the organic coating 300 and the etched trench 302, as shown with reference to fig. 6.

In the embodiment of the present disclosure, the conductive material layer 400 may be formed on the surface of the transparent conductive film layer 200 by evaporation coating, and the organic coating 300 may be covered on the conductive material layer 400. The material of the conductive material layer 400 may be one or more of the following materials: aluminum (Al), silver (Ag), gold (Au), nickel (Ni), copper (Cu), graphene, and the like. The thickness of the conductive material layer 400 may be the same as the thickness of the organic coating layer 300, or may be smaller than the thickness of the organic coating layer 300.

And S103, etching the conductive material layer on the organic coating by using a laser etching mode to expose the organic coating, which is shown in reference to FIG. 5.

In the embodiment of the application, the conductive material layer on the organic coating can be etched in a laser etching mode to expose the organic coating. Specifically, all the conductive material layer on the organic coating layer may be etched, or a part of the conductive material layer on the organic coating layer may be etched, for example, the conductive material layer on the organic coating layer may be etched in a laser etching manner to form a trench penetrating through the conductive material layer, an extending direction of the trench may be parallel to an extending direction of the gate line region, and the trench is located in the middle of the continuous conductive material layer, that is, the organic coating layer 300 is exposed between the conductive material layers 400 in the non-gate region, as shown in fig. 5. The width of the trench is smaller than the width of the non-gate region, that is, smaller than the interval between adjacent gate line regions.

And S104, dissolving all the organic coatings by using an organic solvent to remove the organic coatings, wherein the conductive material layer positioned in the grid line region is used as a conductive grid line, and the method is shown in reference to FIGS. 6 and 7.

After the conductive material layer on the organic coating is etched, the organic coating 300 may be dissolved by an organic solvent, and when a part of the conductive material layer is removed, along with the dissolution of the organic coating 300, the conductive material layer 400 on the organic coating 300 is also peeled off, so that the conductive material layer 400 on the organic coating 300 and the organic coating 300 is removed, and the conductive gate line 401 in the gate line region is retained, as shown in fig. 6, the conductive gate line 401 is directly formed on the transparent conductive film layer 200 and is electrically connected to the transparent conductive film layer 200, and the conductive gate line 401 and the transparent conductive film layer 200 constitute the lower electrode material layer 20, compared with the case that the transparent conductive film layer 200 constitutes the lower electrode material layer 20, the lower electrode material layer 20 with the conductive gate line 401 added has better conductivity and higher carrier collection efficiency, and can realize a thinner transparent conductive film layer 200, which is beneficial to improving transmittance.

Where the organic coating 300 is a photoresist layer, the organic solvent may be DMSO.

The lower electrode material layer 20 is formed in the above steps, and other structures of the device can also be formed on the lower electrode material layer 20, for example, in a solar cell device, a functional material layer 30 and an upper electrode material layer 40 can be sequentially formed on the lower electrode material layer 20, as shown with reference to fig. 7, wherein the functional material layer 30 is used for generating and transmitting photogenerated carriers to generate current under illumination. The functional material layer 30 may include an electron transport layer, a light absorption layer, and a hole transport layer, which are sequentially stacked, the light absorption layer being configured to generate photo-generated carriers, electrons in the photo-generated carriers being transported to one side electrode through the electron transport layer, and holes in the photo-generated carriers being transported to the other side electrode through the hole transport layer. It should be noted that the electron transport layer in the embodiment of the present application may be located below the light absorbing layer, or may be located above the light absorbing layer, that is, the solar cell device may include the lower electrode material layer 20, the electron transport layer, the light absorbing layer, the hole transport layer, and the upper electrode material layer 40, which are sequentially stacked, or may include the lower electrode material layer 20, the hole transport layer, the light absorbing layer, the electron transport layer, and the upper electrode material layer 40, which are sequentially stacked.

The light absorption layer can be an organic light absorption layer, a perovskite layer, a quantum dot layer or the like, wherein the organic light absorption layer comprises a two-element or multi-element blended film of at least one electron donor and at least one electron acceptor material, the electron donor material can be at least one of polymers PTB7-Th, PBDB-T, PM6, D18 and derivatives, the electron acceptor material can be at least one of PCBM, ITIC, Y6 materials and derivatives, when the light absorption layer is the perovskite layer, the materials can comprise one or more of methylamine lead iodide, formamidine ether lead iodide, cesium lead iodide and a plurality of complex cations and complex anions in three-dimensional and two-dimensional perovskites, and when the light absorption layer is the quantum dot layer, the materials can comprise perovskite quantum dots, lead (selenide) sulfide, cadmium sulfide, indium phosphide or the like. The light absorbing layer may also be cadmium telluride (CdTe), Copper Indium Gallium Selenide (CIGS), amorphous silicon (a-Si: H), gallium arsenide (GaAs), and the like.

The electron transport layer may be, for example, zinc oxide (ZnO), titanium oxide (TiO 2), or the like; the hole transport layer may be, for example, PEDOT PSS, spiro-OMeTAD, molybdenum oxide (MoO 3), or nickel oxide (NiOx), among others. The material of the upper electrode material layer 40 may be a metal material, such as gold, silver, aluminum, or the like.

The electron transport layer, the light absorption layer, the hole transport layer and the upper electrode material layer 40 can be formed by deposition, such as evaporation, but some of the electron transport layer, the light absorption layer and the hole transport layer can also be formed by blade coating or spin coating.

In this embodiment, the solar cell device may include a plurality of battery cells, the plurality of battery cells are formed on the same substrate and connected in series, and then the functional material layer 30 and the upper electrode material layer 40 are sequentially formed on the transparent conductive film layer, which may specifically be: scribing the lower electrode material layer 20 to form first grooves P1, the first grooves P1 dividing the lower electrode material layer 20 into lower electrodes of the battery cells, enabling the division of the lower electrode material layer 20; forming a functional material layer 30 on the lower electrode material layer 20 and in the first trench P1; scribing the functional material layer 30 to form second grooves P2, the second grooves P2 dividing the functional material layer 30 into functional layers of a plurality of battery cells; forming an upper electrode material layer 40 on the functional material layer 30 and in the second trench P2; the upper electrode material layer 40 is scribed to form third grooves P3, the third grooves P3 dividing the upper electrode material layer 40 into upper electrodes of the plurality of battery cells, at least a portion of the upper electrodes being connected to lower electrodes in adjacent battery cells through the second grooves P2 to enable series connection of the plurality of battery cells.

The embodiment of the application provides a manufacturing method of a device, a transparent conductive film layer can be formed on a substrate to be processed, an organic coating is formed on the transparent conductive film layer, an etching groove penetrating through the organic coating is formed in a grid line area, a conductive material layer covering the organic coating and the etching groove is formed, the conductive material layer on the organic coating is etched by utilizing a laser etching mode, so that the organic coating is exposed, the organic coating is dissolved by utilizing an organic solvent, the organic coating and the conductive material layer on the organic coating can be removed, a conductive grid line positioned in the grid line area is formed, when the organic coating is dissolved by utilizing the organic solvent, the organic solvent is in contact with the organic coating which is not covered by the conductive material layer, the demolding efficiency is higher, and the manufacturing efficiency of the grid line is improved.

The foregoing is merely a preferred embodiment of the present application and, although the present application discloses the foregoing preferred embodiments, the present application is not limited thereto. Those skilled in the art can now make numerous possible variations and modifications to the disclosed embodiments, or modify equivalent embodiments, using the methods and techniques disclosed above, without departing from the scope of the claimed embodiments. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application still fall within the protection scope of the technical solution of the present application without departing from the content of the technical solution of the present application.

Claims

1. A method of manufacturing a device, comprising:

2. The method of claim 1, wherein etching the conductive material layer on the organic coating layer by laser etching to expose the organic coating layer comprises:

3. The method of claim 1, further comprising:

4. The method according to claim 3, wherein the functional material layer comprises an electron transport layer, a light absorption layer, and a hole transport layer, which are sequentially stacked.

5. The method of any one of claims 1-4, wherein a plurality of the gate line regions are arranged in parallel.

6. The method of claim 5, wherein the width of the grid line region is in a range of 5 to 50 μm, and the distance between adjacent grid line regions is in a range of 0.5 to 5 mm.

7. The method according to any one of claims 1 to 4, wherein the etching groove further penetrates through part or all of the transparent conductive film layer.

8. The method of any one of claims 1 to 4, wherein the conductive grid line is made of one or more of the following materials: gold, silver, copper, aluminum, nickel, graphene.

9. The method of any one of claims 1-4, wherein the organic coating is a photoresist layer and the organic solvent is DMSO.

10. The method of claim 3 or 4, wherein the solar cell device comprises a plurality of cells; forming a functional material layer and an upper electrode material layer on the transparent conductive film layer in sequence, including: