CN114203623B - Manufacturing method of device and bearing plate - Google Patents
Manufacturing method of device and bearing plate Download PDFInfo
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- CN114203623B CN114203623B CN202111544524.3A CN202111544524A CN114203623B CN 114203623 B CN114203623 B CN 114203623B CN 202111544524 A CN202111544524 A CN 202111544524A CN 114203623 B CN114203623 B CN 114203623B
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 20
- 239000011248 coating agent Substances 0.000 claims abstract description 68
- 238000000576 coating method Methods 0.000 claims abstract description 68
- 239000000758 substrate Substances 0.000 claims abstract description 63
- 239000004020 conductor Substances 0.000 claims abstract description 38
- 239000003960 organic solvent Substances 0.000 claims abstract description 22
- 239000010410 layer Substances 0.000 claims description 198
- 239000000463 material Substances 0.000 claims description 46
- 239000007772 electrode material Substances 0.000 claims description 41
- 238000000034 method Methods 0.000 claims description 22
- 229920002120 photoresistant polymer Polymers 0.000 claims description 19
- 230000005525 hole transport Effects 0.000 claims description 12
- 238000005530 etching Methods 0.000 claims description 11
- IAZDPXIOMUYVGZ-UHFFFAOYSA-N Dimethylsulphoxide Chemical group CS(C)=O IAZDPXIOMUYVGZ-UHFFFAOYSA-N 0.000 claims description 9
- 239000000969 carrier Substances 0.000 claims description 9
- 239000011247 coating layer Substances 0.000 claims description 8
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 7
- 229910052782 aluminium Inorganic materials 0.000 claims description 5
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 5
- 239000010931 gold Substances 0.000 claims description 5
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 4
- 239000010949 copper Substances 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 239000002346 layers by function Substances 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 239000004332 silver Substances 0.000 claims description 4
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 3
- 229910052802 copper Inorganic materials 0.000 claims description 3
- 229910021389 graphene Inorganic materials 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 239000010408 film Substances 0.000 description 42
- 229910052751 metal Inorganic materials 0.000 description 13
- 239000002184 metal Substances 0.000 description 13
- 230000031700 light absorption Effects 0.000 description 10
- 238000002834 transmittance Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- MARUHZGHZWCEQU-UHFFFAOYSA-N 5-phenyl-2h-tetrazole Chemical compound C1=CC=CC=C1C1=NNN=N1 MARUHZGHZWCEQU-UHFFFAOYSA-N 0.000 description 4
- KTSFMFGEAAANTF-UHFFFAOYSA-N [Cu].[Se].[Se].[In] Chemical compound [Cu].[Se].[Se].[In] KTSFMFGEAAANTF-UHFFFAOYSA-N 0.000 description 4
- 229910021417 amorphous silicon Inorganic materials 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 230000008020 evaporation Effects 0.000 description 4
- 238000001704 evaporation Methods 0.000 description 4
- 230000004048 modification Effects 0.000 description 4
- 238000012986 modification Methods 0.000 description 4
- 239000010409 thin film Substances 0.000 description 4
- 239000002096 quantum dot Substances 0.000 description 3
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 2
- RTZKZFJDLAIYFH-UHFFFAOYSA-N Diethyl ether Chemical compound CCOCC RTZKZFJDLAIYFH-UHFFFAOYSA-N 0.000 description 2
- 238000005286 illumination Methods 0.000 description 2
- 229910000480 nickel oxide Inorganic materials 0.000 description 2
- 238000001259 photo etching Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- XDXWNHPWWKGTKO-UHFFFAOYSA-N 207739-72-8 Chemical compound C1=CC(OC)=CC=C1N(C=1C=C2C3(C4=CC(=CC=C4C2=CC=1)N(C=1C=CC(OC)=CC=1)C=1C=CC(OC)=CC=1)C1=CC(=CC=C1C1=CC=C(C=C13)N(C=1C=CC(OC)=CC=1)C=1C=CC(OC)=CC=1)N(C=1C=CC(OC)=CC=1)C=1C=CC(OC)=CC=1)C1=CC=C(OC)C=C1 XDXWNHPWWKGTKO-UHFFFAOYSA-N 0.000 description 1
- WUPHOULIZUERAE-UHFFFAOYSA-N 3-(oxolan-2-yl)propanoic acid Chemical compound OC(=O)CCC1CCCO1 WUPHOULIZUERAE-UHFFFAOYSA-N 0.000 description 1
- 229910000838 Al alloy Inorganic materials 0.000 description 1
- HQOWCDPFDSRYRO-CDKVKFQUSA-N CCCCCCc1ccc(cc1)C1(c2cc3-c4sc5cc(\C=C6/C(=O)c7ccccc7C6=C(C#N)C#N)sc5c4C(c3cc2-c2sc3cc(C=C4C(=O)c5ccccc5C4=C(C#N)C#N)sc3c12)(c1ccc(CCCCCC)cc1)c1ccc(CCCCCC)cc1)c1ccc(CCCCCC)cc1 Chemical compound CCCCCCc1ccc(cc1)C1(c2cc3-c4sc5cc(\C=C6/C(=O)c7ccccc7C6=C(C#N)C#N)sc5c4C(c3cc2-c2sc3cc(C=C4C(=O)c5ccccc5C4=C(C#N)C#N)sc3c12)(c1ccc(CCCCCC)cc1)c1ccc(CCCCCC)cc1)c1ccc(CCCCCC)cc1 HQOWCDPFDSRYRO-CDKVKFQUSA-N 0.000 description 1
- PNKUSGQVOMIXLU-UHFFFAOYSA-N Formamidine Chemical compound NC=N PNKUSGQVOMIXLU-UHFFFAOYSA-N 0.000 description 1
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 description 1
- 229920000144 PEDOT:PSS Polymers 0.000 description 1
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 description 1
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 1
- MCEWYIDBDVPMES-UHFFFAOYSA-N [60]pcbm Chemical compound C123C(C4=C5C6=C7C8=C9C%10=C%11C%12=C%13C%14=C%15C%16=C%17C%18=C(C=%19C=%20C%18=C%18C%16=C%13C%13=C%11C9=C9C7=C(C=%20C9=C%13%18)C(C7=%19)=C96)C6=C%11C%17=C%15C%13=C%15C%14=C%12C%12=C%10C%10=C85)=C9C7=C6C2=C%11C%13=C2C%15=C%12C%10=C4C23C1(CCCC(=O)OC)C1=CC=CC=C1 MCEWYIDBDVPMES-UHFFFAOYSA-N 0.000 description 1
- VPTDFJOOPWOZRN-UHFFFAOYSA-N [I].[Pb].[Cs] Chemical compound [I].[Pb].[Cs] VPTDFJOOPWOZRN-UHFFFAOYSA-N 0.000 description 1
- IKUCKMMEQAYNPI-UHFFFAOYSA-N [Pb].CN.[I] Chemical compound [Pb].CN.[I] IKUCKMMEQAYNPI-UHFFFAOYSA-N 0.000 description 1
- 238000010521 absorption reaction Methods 0.000 description 1
- 150000001450 anions Chemical class 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 229910052980 cadmium sulfide Inorganic materials 0.000 description 1
- 150000001768 cations Chemical class 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- NJWNEWQMQCGRDO-UHFFFAOYSA-N indium zinc Chemical compound [Zn].[In] NJWNEWQMQCGRDO-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- DXZHSXGZOSIEBM-UHFFFAOYSA-M iodolead Chemical compound [Pb]I DXZHSXGZOSIEBM-UHFFFAOYSA-M 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 238000001755 magnetron sputter deposition Methods 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- JKQOBWVOAYFWKG-UHFFFAOYSA-N molybdenum trioxide Chemical compound O=[Mo](=O)=O JKQOBWVOAYFWKG-UHFFFAOYSA-N 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 238000005240 physical vapour deposition Methods 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 239000010935 stainless steel Substances 0.000 description 1
- 229910001256 stainless steel alloy Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- -1 sulfur (selenium) lead sulfide Chemical compound 0.000 description 1
- 238000010345 tape casting Methods 0.000 description 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
- 229910001887 tin oxide Inorganic materials 0.000 description 1
- 238000007740 vapor deposition Methods 0.000 description 1
- YVTHLONGBIQYBO-UHFFFAOYSA-N zinc indium(3+) oxygen(2-) Chemical compound [O--].[Zn++].[In+3] YVTHLONGBIQYBO-UHFFFAOYSA-N 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/68785—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/02—Details
- H01L31/0224—Electrodes
- H01L31/022408—Electrodes for devices characterised by at least one potential jump barrier or surface barrier
- H01L31/022425—Electrodes for devices characterised by at least one potential jump barrier or surface barrier for solar cells
- H01L31/022433—Particular geometry of the grid contacts
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
- H01L31/0463—PV modules composed of a plurality of thin film solar cells deposited on the same substrate characterised by special patterning methods to connect the PV cells in a module, e.g. laser cutting of the conductive or active layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
- H01L31/042—PV modules or arrays of single PV cells
- H01L31/0445—PV modules or arrays of single PV cells including thin film solar cells, e.g. single thin film a-Si, CIS or CdTe solar cells
- H01L31/046—PV modules composed of a plurality of thin film solar cells deposited on the same substrate
- H01L31/0465—PV modules composed of a plurality of thin film solar cells deposited on the same substrate comprising particular structures for the electrical interconnection of adjacent PV cells in the module
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Sustainable Development (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Life Sciences & Earth Sciences (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Sustainable Energy (AREA)
- Manufacturing & Machinery (AREA)
- Photovoltaic Devices (AREA)
Abstract
The application provides a manufacturing method of a device and a bearing plate, wherein the bearing plate can comprise a frame and a plurality of cross beams connected with the frame, the frame is used for bearing a substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, the grid line areas are used for forming conductive grid lines, a transparent conductive film layer is formed on the substrate to be processed, an organic coating is formed on the non-grid areas on the transparent conductive film layer, when the substrate to be processed is borne on the frame, the cross beams are positioned below the substrate to be processed and cover part of areas in the non-grid areas, namely cover part of the organic coating, thus, when the conductive material layer is formed, the conductive material layer is not formed in the area covered by the cross beams, the organic coating and the conductive material layer on the organic coating can be removed by using an organic solvent, the conductive grid lines positioned in the grid line areas are formed, the organic solvent is contacted with the organic coating which is not covered by the conductive material layer, and the demolding efficiency is higher, and the manufacturing efficiency of the grid lines is improved.
Description
Technical Field
The application relates to the technical field of energy, in particular to a manufacturing method of a device and a bearing plate.
Background
Solar thin film solar cells, also called solar chips or photovoltaic cells, are photovoltaic devices that directly generate electricity using sunlight, and common thin film solar cells include cadmium telluride (CdTe), copper Indium Gallium Selenide (CIGS), amorphous silicon (a-Si: H), gallium arsenide (GaAs), perovskite solar cells, and the like. The basic structure of a thin film solar cell is generally composed of a PN junction semiconductor layer and front and rear electrodes, and in general, the solar cell includes a first electrode, an electron transport layer, a light absorption layer, a hole transport layer, and a second electrode, wherein the light absorption layer can generate electron-hole pairs under illumination, electrons can be transported to the first electrode through the electron transport layer, and holes can be transported to the second electrode through the hole transport layer, thereby generating current. The electron transport layer, the light absorption layer, the hole transport layer, etc. may be referred to as a functional layer.
In particular, the light-receiving-side electrode layer is usually made of a transparent conductive oxide thin film material (TCO), which is required to have both high transmittance and high conductivity from the viewpoint of functional requirements of the film layer. The film layer is used on the one hand for collecting charges and transporting them in-plane, thus requiring the film layer to have as high conductivity as possible; on the other hand, the electrode film on the light receiving side is also required to have a higher transmittance so as to allow more light to enter the absorption layer to excite the light-generated carriers. However, in terms of technology, the conductivity and the transmittance of the transparent conductive film layer are mutually restricted, and the maximum conductivity and the maximum transmittance cannot be obtained at the same time. In order to effectively collect carriers, a metal grid line can be prepared on the surface of the transparent conductive film so as to improve the carrier collection capability, and meanwhile, the thickness of the TCO layer can be reduced to the greatest extent, and the light transmittance is improved.
The metal grid line can be prepared on the surface of the battery by a photoetching method generally so as to improve the carrier collecting capability, and meanwhile, the thickness of the TCO layer can be reduced to the greatest extent, and the light transmittance is improved.
The process steps for preparing the metal grid line by using the photoetching method are as follows:
a) And uniformly coating the photoresist on the surface of the battery chip in a printing mode. And baking and curing after printing is finished.
B) Covering the mask plate with the grid line shape on the surface of the chip, and carrying out partial exposure by utilizing UV light to irradiate through the mask plate.
C) Developing is performed in a developing solution, and the photoresist of the exposed portion is washed off.
D) And plating a layer of metal film on the developed substrate by an evaporation coating mode.
E) The substrate is immersed in an organic solvent, the photoresist and the metal film thereon are washed away, and finally the metal wire with the shape of the grid line is left.
In the above stripping procedure, the surface of the film layer is covered with the metal film layer, so that the organic solvent is difficult to contact the photoresist, and the stripping efficiency is low.
Disclosure of Invention
In view of the above, an object of the present application is to provide a method for manufacturing a device and a carrier plate for improving the formation efficiency of a gate line.
To achieve the above object, the present application provides a carrier plate, comprising:
The frame is used for bearing a substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, and the grid line areas are used for forming conductive grid lines;
A plurality of cross beams connected to the frame; when the substrate to be processed is carried on the frame, the beam is positioned below the substrate to be processed and covers a part of the area in the non-gate area so as to prevent the material of the conductive gate line from being formed in the area covered by the beam.
Optionally, a plurality of the grid line areas are arranged in parallel, and a plurality of the cross beams are arranged in parallel.
Optionally, the width of the conductive grid line ranges from 5 μm to 50 μm, the distance between the adjacent grid line regions ranges from 0.5 mm to 5mm, and the width of the cross beam is smaller than the distance between the adjacent grid line regions.
The embodiment of the application also provides a manufacturing method of the device, which comprises the following steps:
providing a substrate to be processed; a transparent conductive film layer, an organic coating layer on the transparent conductive film layer and an etching groove which is positioned in the grid line area and penetrates through the organic coating layer are formed on the substrate to be processed;
Carrying the substrate to be processed by using the carrying plate to form a conductive material layer covering the organic coating and the etching groove; the cross beam of the bearing plate covers part of the organic coating so as to prevent the conductive material layer from being formed in the area covered by the cross beam;
Dissolving the organic coating by using an organic solvent to remove the organic coating and the conductive material layer on the organic coating, wherein the conductive material layer positioned in the grid line area is used as a conductive grid line; the transparent conductive film layer and the conductive gate line serve as a lower electrode material layer.
Optionally, the method further comprises: sequentially forming a functional material layer and an upper electrode material layer on the lower electrode material layer; the functional material layer is used for generating and transmitting photo-generated carriers.
Optionally, the functional material layer includes an electron transport layer, a light absorption layer, and a hole transport layer that are sequentially stacked.
Optionally, the etching groove also penetrates part or all of the transparent conductive film layer.
Optionally, the material of the conductive gate line is one or more of the following materials: gold, silver, copper, aluminum, nickel, graphene.
Optionally, the organic coating is a photoresist layer, and the organic solvent is DMSO.
Optionally, the solar cell device comprises a plurality of battery cells; sequentially forming a functional material layer and an upper electrode material layer on the transparent conductive film layer, including:
Scribing the lower electrode material layer to form a first trench dividing the lower electrode material layer into lower electrodes of the plurality of battery cells;
Forming a functional material layer on the lower electrode material layer and in the first trench;
Scribing the functional material layer to form a second groove; the second grooves divide the functional material layer into functional layers of the plurality of battery cells;
forming an upper electrode material layer on the functional material layer and in the second trench;
Scribing the upper electrode material layer to form a third trench dividing the upper electrode material layer into upper electrodes of a plurality of battery cells; at least a portion of the upper electrode is connected with the lower electrode in the adjacent battery cells through the second grooves to realize the series connection of the plurality of battery cells.
The frame is used for bearing the substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, the grid line areas are used for forming conductive grid lines, a transparent conductive film layer is formed on the substrate to be processed, an organic coating is formed on the non-grid areas on the transparent conductive film layer, when the substrate to be processed is borne on the frame, the cross beams are positioned below the substrate to be processed and cover part of areas in the non-grid areas, namely cover part of the organic coating, so that the conductive material layer is not formed in the areas covered by the cross beams when the conductive material layer is formed, the organic coating is dissolved by using an organic solvent, the conductive material layer on the organic coating and the organic coating can be removed, the conductive grid lines positioned in the grid line areas are formed, when the organic coating is dissolved by using the organic solvent, the organic solvent is in contact with the organic coating which is not covered by the conductive material layer, and demolding efficiency is high, and manufacturing efficiency of the grid lines is improved.
Drawings
In order to more clearly illustrate the embodiments of the application or the technical solutions in the prior art, the drawings that are needed in the embodiments or the description of the prior art will be briefly described below, it being obvious that the drawings in the following description are some embodiments of the application and that other drawings may be obtained from these drawings without inventive effort for a person skilled in the art.
FIG. 1 shows a schematic flow diagram of a method of manufacturing a device according to an embodiment of the application;
FIGS. 2-4 show schematic structural diagrams during formation of devices according to a fabrication method of an embodiment of the present application;
Fig. 5 shows a schematic structural view of a carrier plate according to an embodiment of the present application;
fig. 6-8 show schematic structural diagrams during the formation of devices according to a manufacturing method according to an embodiment of the present application.
Detailed Description
In order that the above objects, features and advantages of the application will be readily understood, a more particular description of the application will be rendered by reference to the appended drawings.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application, but the present application may be practiced in other ways other than those described herein, and persons skilled in the art will readily appreciate that the present application is not limited to the specific embodiments disclosed below.
In the following detailed description of the embodiments of the present application, reference is made to the accompanying drawings, which form a part hereof, and in which are shown by way of illustration only, and in which is shown by way of illustration only, and in which the scope of the application is not limited for ease of illustration. In addition, the three-dimensional dimensions of length, width and depth should be included in actual fabrication.
As described in the background art, in order to effectively collect carriers, a metal gate line may be prepared on the surface of the transparent conductive film to improve the carrier collection capability, and simultaneously, the thickness of the TCO layer may be reduced to the greatest extent to improve the light transmittance. At present, the preparation process of the metal gate line can be specifically as follows: 1) Uniformly coating photoresist on the surface of a battery chip in a printing mode, and baking and curing after printing; 2) Covering a mask plate with a grid line shape on the surface of the chip, and irradiating the chip with UV light through the mask plate to perform partial exposure; 3) Developing in a developing solution to wash off the photoresist at the exposed part; 4) Plating a layer of metal film on the developed substrate by an evaporation coating mode; 5) The substrate is introduced into an organic solvent, the photoresist and the metal film thereon are washed away, and finally the metal line having the shape of the gate line is left.
However, the inventors have found that in the stripping process for removing the photoresist and the metal film thereon, the organic solvent is difficult to contact the photoresist, resulting in low stripping efficiency, and thus the conventional gate line formation method has a problem of low efficiency.
Based on the technical problems, the embodiment of the application provides a manufacturing method of a device and a bearing plate, wherein the bearing plate can comprise a frame and a plurality of cross beams connected with the frame, the frame is used for bearing a substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, the grid line areas are used for forming conductive grid lines, a transparent conductive film layer is formed on the substrate to be processed, an organic coating is formed on the non-grid areas on the transparent conductive film layer, when the substrate to be processed is borne on the frame, the cross beams are positioned below the substrate to be processed and cover part of the area in the non-grid areas, namely cover part of the organic coating, so that when the conductive material layer is formed, the conductive material layer is not formed in the area covered by the cross beams, the organic coating is dissolved by using an organic solvent, the conductive material layer on the organic coating and the organic coating can be removed, when the organic solvent is used for dissolving the organic coating, the organic solvent is contacted with the organic coating which is not covered by the conductive material layer, the stripping efficiency is high, and the manufacturing efficiency of the grid lines is improved.
In order to facilitate understanding, a method for manufacturing a device and a carrier plate according to embodiments of the present application are described in detail below with reference to the accompanying drawings.
Referring to fig. 1, which is a flowchart of a method for manufacturing a device according to an embodiment of the present application, and referring to fig. 2, 3,4, 6, 7 and 8, which are schematic structural diagrams in a manufacturing process of a device according to an embodiment of the present application, the method may include the following steps:
s101, a substrate 100 to be processed is provided, as shown with reference to fig. 2, 3 and 4.
In embodiments of the present application, devices may be formed on a substrate 100 to be processed, the substrate 100 to be processed providing support for the device structures thereon. The substrate 100 to be processed may be a glass base or a flexible base. The substrate 100 to be processed may have a gate line region for forming the conductive gate line 401, the gate line region may be a stripe region, and a plurality of gate line regions may be disposed in parallel, and a non-gate region is a region between the gate line regions. The width of the conductive gate line in the gate line region may be in a range of 5 to 50 μm, one gate line region may be formed with one conductive gate line, and the conductive gate line and the gate line region may have the same width and length, so that a plurality of conductive gate lines are also arranged in parallel, and the interval between adjacent gate line regions, that is, the width of the non-gate region may be in a range of 0.5 to 5mm.
On the substrate 100 to be processed, a transparent conductive film layer 200 may be formed, and the material of the transparent conductive film layer 200 may be a transparent conductive oxide (TRANSPARENT CONDUCTIVE OXIDE, TCO), such as Indium Tin Oxide (ITO), indium zinc oxide (indiumzinc oxide, IZO), or fluorine-doped tin oxide (FTO), or the like. The transparent conductive film layer 200 may be formed by, for example, magnetron sputtering, physical vapor deposition, or the like.
The organic coating layer 300 may be formed on the transparent conductive film layer 200, and the material of the organic coating layer 300 may be photoresist or other organic film layers. The organic coating 300 may be formed by printing, and when the organic coating 300 is a photoresist layer, baking and curing may be performed after the photoresist layer is formed.
The organic coating 300 may be formed in the non-gate region without forming the gate line region, and in particular, the organic coating 300 may be etched after the organic coating 300 is formed to form an etching groove 302 penetrating the organic coating in the gate line region. Specifically, when the organic coating 300 is a photoresist layer, after the photoresist layer is formed, a mask having a gate line shape may be covered on the substrate 100 to be processed, and the exposed area 301 of the photoresist layer is exposed by irradiation of UV light through the mask, as shown in fig. 3, and then developed in a developing solution to wash off the photoresist in the exposed area 301, thereby forming the etching groove 302. Of course, where the organic coating 300 is other materials, the organic coating 300 formed in the non-gate region may be obtained by other means.
In the embodiment of the present application, the etching groove 302 may also penetrate part or all of the transparent conductive film layer 200, that is, the transparent conductive film layer 200 may be etched by using an additional etching process, so that the bottom surface of the conductive gate line 401 formed later is lower than the upper surface (not shown) of the transparent conductive film layer 200.
S102, a substrate to be processed is carried by a carrier plate, and a conductive material layer 400 covering the organic coating 300 and the etching groove 302 is formed, as shown in fig. 6.
In this embodiment of the present application, the substrate 100 to be processed may be carried by a carrier plate, and referring to fig. 5, a schematic structural diagram of the carrier plate is shown, where the carrier plate has a frame 1, the shape of the frame 1 may be a rectangular frame, the rectangular frame forms a groove structure, the frame 1 contacts with an edge of the substrate 100 to be processed, so as to carry the substrate 100 to be processed, after the substrate 100 to be processed is placed on the carrier plate, a side of the substrate 100 to be processed, on which the transparent conductive film layer 200 is formed, is placed downward, an evaporation source is located below the carrier plate, and a conductive material layer 400 may be formed on the surface of the transparent conductive film layer 200 by evaporation coating, and the conductive material layer 400 may also cover the organic coating 300.
The carrier plate may further include a plurality of beams 2, where the beams 2 are connected to the frame 1, and when the frame 1 carries the substrate 100 to be processed, the beams 2 may be located below the substrate 100 to be processed, and the beams 2 may support the substrate 100 to be processed, or may have a smaller distance from the substrate 100 to be processed. The beam 2 may cover a part of the area of the non-gate area of the substrate 100 to be processed to prevent the material of the conductive gate line 401 from being formed in the area covered by the beam 2, and in particular, the non-gate area is formed with the organic coating 300, and then the beam 2 may cover a part of the organic coating 300 to prevent the subsequent conductive material layer 400 from being formed in the area covered by the beam 2, i.e., the area covered by the beam 2 is not formed with the conductive material layer 400, exposing the organic coating 300, as shown with reference to fig. 6. For example, the beam may cover a central region of a non-gate region of a substrate to be processed, exposing the organic coating 300 between the conductive material layers 400 of the non-gate region, as shown with reference to fig. 6.
When the plurality of gate line regions are arranged in parallel, the plurality of non-gate regions are also arranged in parallel, and the plurality of cross members 2 may be arranged in parallel. Since the beam 2 covers a partial region in the non-gate region of the substrate 100 to be processed, the width of the beam 2 is smaller than the width of the non-gate region, i.e., smaller than the pitch between adjacent gate line regions.
The material of the bearing plate can be aluminum, aluminum alloy, stainless steel or titanium alloy, etc. The material of the conductive material layer 400 may be one or more of the following materials: aluminum (Al), silver (Ag), gold (Au), nickel (Ni), copper (Cu), graphene, and the like. The thickness of the conductive material layer 400 may be identical to that of the organic coating layer 300 or may be smaller than that of the organic coating layer 300.
S103, the organic coating 300 is dissolved by using an organic solvent to remove the organic coating 300 and the conductive material layer 400 on the organic coating 300, and the conductive material layer 400 located in the gate line region serves as a conductive gate line 401, as shown with reference to fig. 7 and 8.
After the conductive material layer 400 covering the organic coating 300 and the etching groove 302 is formed, the organic coating 300 can be dissolved by using an organic solvent, and along with the dissolution of the organic coating 300, the conductive material layer 400 on the organic coating 300 is peeled off, so that the conductive material layer 400 on the organic coating 300 and the organic coating 300 is removed, the conductive grid line 401 in the grid line area is reserved, the conductive grid line 401 is directly formed on the transparent conductive film layer 200 and is electrically connected with the transparent conductive film layer 200, the conductive grid line 401 and the transparent conductive film layer 200 form the lower electrode material layer 20, compared with the lower electrode material layer 20 formed by the transparent conductive film layer 200, the conductivity of the lower electrode material layer 20 of the conductive grid line 401 is increased, the carrier collection efficiency is higher, and the thinner transparent conductive film layer 200 can be realized, thereby being beneficial to improving the transmittance.
Where the organic coating 300 is a photoresist layer, the organic solvent may be DMSO.
In the above steps, the lower electrode material layer 20 is formed, and other structures of the device may be formed on the lower electrode material layer 20, for example, in a solar cell device, the functional material layer 30 and the upper electrode material layer 40 may be sequentially formed on the lower electrode material layer 20, wherein the functional material layer 30 is used to generate and transmit photo-generated carriers to generate current under illumination. The functional material layer 30 may include an electron transport layer, a light absorbing layer, and a hole transport layer stacked in this order, the light absorbing layer being configured to generate photogenerated carriers, electrons in the photogenerated carriers being transported to one side electrode through the electron transport layer, and holes in the photogenerated carriers being transported to the other side electrode through the hole transport layer. It should be noted that, in the embodiment of the present application, the electron transport layer may be located below the light absorption layer or above the light absorption layer, that is, the solar cell device may include a lower electrode material layer 20, an electron transport layer, a light absorption layer, a hole transport layer, and an upper electrode material layer 40 sequentially stacked, and may also include a lower electrode material layer 20, a hole transport layer, a light absorption layer, an electron transport layer, and an upper electrode material layer 40 sequentially stacked.
The light absorbing layer may be an organic light absorbing layer, a perovskite layer or a quantum dot layer, etc., wherein the organic light absorbing layer comprises a binary or multi-element blend film of at least one electron donor and at least one electron acceptor material, the electron donor material may be at least one of polymers PTB7-Th, PBDB-T, PM, D18 and derivatives, the electron acceptor material may be at least one of PCBM, ITIC, Y materials and derivatives, the material may comprise one or more of methylamine lead iodine, formamidine ether lead iodine, cesium lead iodine and three-dimensional and two-dimensional perovskite of various complex cations and complex anions when the light absorbing layer is a quantum dot layer, and the material may comprise perovskite quantum dots, sulfur (selenium) lead sulfide, cadmium sulfide, indium phosphide, etc. as described above. The light absorbing layer may also be cadmium telluride (CdTe), copper Indium Gallium Selenide (CIGS), amorphous silicon (a-Si: H), gallium arsenide (GaAs), or the like.
The electron transport layer may be, for example, zinc oxide (ZnO) or titanium oxide (TiO 2); the hole transport layer may be PEDOT: PSS, spiro-OMeTAD, molybdenum oxide (MoO 3), nickel oxide (NiOx), or the like, for example. The material of the upper electrode material layer 40 may be a metal material such as gold, silver, aluminum, etc.
The electron transport layer, the light absorption layer, the hole transport layer and the upper electrode material layer 40 may be formed by deposition, for example, by vapor deposition, although some of the electron transport layer, the light absorption layer and the hole transport layer may be formed by knife coating or spin coating.
In the embodiment of the present application, the solar cell device may include a plurality of battery cells formed on the same substrate and connected in series, and then the functional material layer 30 and the upper electrode material layer 40 are sequentially formed on the transparent conductive film layer, which may be specifically: scribing the lower electrode material layer 20 to form a first trench P1, the first trench P1 dividing the lower electrode material layer 20 into lower electrodes of the battery cells, thereby realizing division of the lower electrode material layer 20; forming a functional material layer 30 on the lower electrode material layer 20 and in the first trench P1; scribing the functional material layer 30 to form a second trench P2, the second trench P2 dividing the functional material layer 30 into functional layers of a plurality of battery cells; forming an upper electrode material layer 40 on the functional material layer 30 and in the second trench P2; the upper electrode material layer 40 is scribed to form a third trench P3, the third trench P3 dividing the upper electrode material layer 40 into upper electrodes of a plurality of battery cells, at least a portion of the upper electrodes being connected to lower electrodes in adjacent battery cells through the second trench P2 to achieve series connection of the plurality of battery cells.
The embodiment of the application provides a manufacturing method of a device, wherein a bearing plate can comprise a frame and a plurality of cross beams connected with the frame, the frame is used for bearing a substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, the grid line areas are used for forming conductive grid lines, a transparent conductive film layer is formed on the substrate to be processed, an organic coating is formed on the non-grid areas on the transparent conductive film layer, when the substrate to be processed is borne on the frame, the cross beams are positioned below the substrate to be processed and cover part of areas in the non-grid areas, namely cover part of the organic coating, so that when the conductive material layer is formed, the conductive material layer is not formed in the area covered by the cross beams, the organic coating and the conductive material layer on the organic coating can be removed by using an organic solvent, the conductive grid lines positioned in the grid line areas are formed, and when the organic coating is dissolved by using the organic solvent, the organic solvent is in contact with the organic coating which is not covered by the conductive material layer, so that the manufacturing efficiency of the grid line is improved.
The embodiment of the application also provides a bearing plate, referring to fig. 5, the bearing plate comprises:
A frame 1 for carrying a substrate to be processed, wherein the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, and the grid line areas are used for forming conductive grid lines;
A plurality of cross beams 2 connected to the frame 1; when the substrate to be processed is carried on the frame 2, the beam 2 is positioned below the substrate to be processed and covers a part of the non-gate region so as to prevent the material of the conductive gate line from being formed in the region covered by the beam.
Optionally, a plurality of the grid line areas are arranged in parallel, and a plurality of the cross beams are arranged in parallel.
Optionally, the width of the conductive grid line ranges from 5 μm to 50 μm, the distance between the adjacent grid line regions ranges from 0.5 mm to 5mm, and the width of the cross beam is smaller than the distance between the adjacent grid line regions.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be seen with each other.
The foregoing is merely a preferred embodiment of the present application, and the present application has been disclosed in the above description of the preferred embodiment, but is not limited thereto. Any person skilled in the art can make many possible variations and modifications to the technical solution of the present application or modifications to equivalent embodiments using the methods and technical contents disclosed above, without departing from the scope of the technical solution of the present application. Therefore, any simple modification, equivalent variation and modification of the above embodiments according to the technical substance of the present application still fall within the scope of the technical solution of the present application.
Claims (9)
1. A method of manufacturing a device, comprising:
providing a substrate to be processed; a transparent conductive film layer, an organic coating layer on the transparent conductive film layer and an etching groove which is positioned in the grid line area and penetrates through the organic coating layer are formed on the substrate to be processed;
Carrying the substrate to be processed by using a carrying plate to form a conductive material layer covering the organic coating and the etching groove; the cross beam of the bearing plate covers part of the organic coating so as to prevent the conductive material layer from being formed in the area covered by the cross beam; the conductive material covers the areas of the organic coating not covered by the beam;
After the bearing plate is removed, the organic coating is dissolved by utilizing an organic solvent, so that the organic coating and the conductive material layer on the organic coating are removed, and the conductive material layer positioned in the grid line area is used as a conductive grid line; the transparent conductive film layer and the conductive grid line are used as a lower electrode material layer;
the carrier plate includes:
The frame is used for bearing a substrate to be processed, the substrate to be processed is provided with a plurality of strip-shaped grid line areas and non-grid areas among the grid line areas, and the grid line areas are used for forming conductive grid lines;
A plurality of cross beams connected to the frame; when the substrate to be processed is carried on the frame, the beam is positioned below the substrate to be processed and covers a part of the area in the non-gate area so as to prevent the material of the conductive gate line from being formed in the area covered by the beam.
2. The method as recited in claim 1, further comprising: sequentially forming a functional material layer and an upper electrode material layer on the lower electrode material layer; the functional material layer is used for generating and transmitting photo-generated carriers.
3. The method according to claim 2, wherein the functional material layer includes an electron transport layer, a light absorbing layer, and a hole transport layer, which are sequentially stacked.
4. A method according to any one of claims 1 to 3, wherein the etched trenches also extend through part or all of the transparent conductive film layer.
5. A method according to any one of claims 1 to 3, wherein the material of the conductive gate line is one or more of the following materials: gold, silver, copper, aluminum, nickel, graphene.
6. A method according to any one of claims 1-3, wherein the organic coating is a photoresist layer and the organic solvent is DMSO.
7. A method according to claim 2 or 3, wherein the solar cell device comprises a plurality of battery cells; sequentially forming a functional material layer and an upper electrode material layer on the transparent conductive film layer, including:
Scribing the lower electrode material layer to form a first trench dividing the lower electrode material layer into lower electrodes of the plurality of battery cells;
Forming a functional material layer on the lower electrode material layer and in the first trench;
Scribing the functional material layer to form a second groove; the second grooves divide the functional material layer into functional layers of the plurality of battery cells;
forming an upper electrode material layer on the functional material layer and in the second trench;
Scribing the upper electrode material layer to form a third trench dividing the upper electrode material layer into upper electrodes of a plurality of battery cells; at least a portion of the upper electrode is connected with the lower electrode in the adjacent battery cells through the second grooves to realize the series connection of the plurality of battery cells.
8. The method of claim 1, wherein a plurality of said gate line regions are disposed in parallel and a plurality of said cross beams are disposed in parallel.
9. The method of claim 8, wherein the conductive gate lines have a width in the range of 5 to 50 μm and the adjacent gate line regions have a pitch in the range of 0.5 to 5mm, and the cross beam has a width smaller than the pitch between the adjacent gate line regions.
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| EP1369931A1 (en) * | 2002-06-03 | 2003-12-10 | Hitachi, Ltd. | Solar cell and its manufacturing method, metal plate for the same |
| EP1840657A1 (en) * | 2006-03-28 | 2007-10-03 | Carl Zeiss SMT AG | Support structure for temporarily supporting a substrate |
| US20080121264A1 (en) * | 2006-11-28 | 2008-05-29 | Industrial Technology Research Institute | Thin film solar module and method of fabricating the same |
| JP2010281866A (en) * | 2009-06-02 | 2010-12-16 | Seiko Epson Corp | Manufacturing method of electrooptical device |
| JP5220204B2 (en) * | 2009-11-17 | 2013-06-26 | 三菱電機株式会社 | Thin film solar cell and manufacturing method thereof |
| KR101055980B1 (en) * | 2010-05-17 | 2011-08-11 | 주성엔지니어링(주) | Thin film type solar cell and method for manufacturing thereof |
| JP2013016405A (en) * | 2011-07-06 | 2013-01-24 | Konica Minolta Holdings Inc | Organic electronic device and manufacturing method thereof |
| JP6380177B2 (en) * | 2015-03-12 | 2018-08-29 | 住友大阪セメント株式会社 | Electrostatic chuck device |
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| CN108110025B (en) * | 2017-12-07 | 2023-11-17 | 长鑫存储技术有限公司 | Capacitor array structure and manufacturing method thereof |
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| CN113130675A (en) * | 2021-05-12 | 2021-07-16 | 华能新能源股份有限公司 | Thin-film solar cell structure based on different scribing lines and preparation method thereof |
| CN113257928A (en) * | 2021-05-12 | 2021-08-13 | 华能新能源股份有限公司 | Scribing method for reducing dead zone area of thin-film solar cell |
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