CN113687218B - Method for testing connectivity of power supply and ground pins of integrated circuit - Google Patents
Method for testing connectivity of power supply and ground pins of integrated circuit Download PDFInfo
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- CN113687218B CN113687218B CN202111013227.6A CN202111013227A CN113687218B CN 113687218 B CN113687218 B CN 113687218B CN 202111013227 A CN202111013227 A CN 202111013227A CN 113687218 B CN113687218 B CN 113687218B
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- 238000012360 testing method Methods 0.000 title claims abstract description 98
- 238000000034 method Methods 0.000 title claims abstract description 15
- 238000005259 measurement Methods 0.000 abstract description 7
- 238000011990 functional testing Methods 0.000 description 2
- 230000006978 adaptation Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000010998 test method Methods 0.000 description 1
Classifications
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2853—Electrical testing of internal connections or -isolation, e.g. latch-up or chip-to-lead connections
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/52—Testing for short-circuits, leakage current or ground faults
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/50—Testing of electric apparatus, lines, cables or components for short-circuits, continuity, leakage current or incorrect line connections
- G01R31/54—Testing for continuity
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- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
The invention discloses a method for testing connectivity of power and ground pins of an integrated circuit, which comprises the steps of building a test system, connecting a power pin and a ground pin in the tested integrated circuit with a current and voltage measurement module of the test system in batches, respectively testing current values of the power pin and the ground pin after the power pin and the ground pin are introduced into the test system, and judging whether the connectivity is qualified according to test results. The invention can eliminate the hidden trouble of breaking the power supply pin or the ground pin of the part of the integrated circuit to be tested and the test system by a step-by-step distinguishing comparison method.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a method for testing connectivity of power and ground pins of an integrated circuit.
Background
In the field of integrated circuits, the integrated circuits just produced are somewhat defective due to yield limitations. Therefore, the integrated circuits are all required to be connected with a test system for testing after production. And the goods can be supplied only when the test is qualified. If the pins of the integrated circuit to be tested are disconnected with the test system or a short circuit occurs between the pins of the integrated circuit to be tested when the test system is connected, the test of the integrated circuit to be tested cannot be completed. Therefore, when testing an integrated circuit, it is first necessary to test the connectivity between the integrated circuit under test and the test system.
The earliest connectivity test method is to observe whether the tested integrated circuit is normally connected with the test system or not by naked eyes, and the method not only consumes manpower and material resources, but also has low speed and low efficiency.
The conventional testing method for the connectivity of the power supply pin and the ground pin of the integrated circuit comprises the following steps: connectivity is automatically tested using the property of having a lower resistance between the power pin and ground. Firstly, grounding the ground pin of the tested integrated circuit, suspending or grounding the input and output pins, and then applying a voltage of 50 millivolts to 200 millivolts to the power pin. If the power pin and ground are normally connected to the test system, the current between the power pin and ground is typically greater than 1 microampere and less than the standby current of the integrated circuit. If the current between the power supply pin and the ground is less than 1 microampere, judging that the power supply pin or the ground pin is disconnected from the test system; if the current between the power supply pin and the ground is larger than the standby current of the integrated circuit, judging that a short circuit occurs in the tested integrated circuit or between the power supply pin and the ground pin.
The conventional method can find out the open circuit between the power supply pin or the ground pin and the test system, and can also find out the short circuit inside the tested integrated circuit or between the power supply pin and the ground pin. However, as integrated circuit power consumption increases, more than one power pin and ground pin of the integrated circuit are often used. When the tested integrated circuit has a plurality of power supply pins and ground feet, the existing method can not find out the disconnection of part of the power supply pins or ground feet and the test system, so that the missing report of the connectivity failure event occurs. When a part of power supply pins or feet are disconnected from the test system, the power supply is possibly insufficient, certain functional tests are possibly disqualified, and false alarm of disqualification of the functional tests of the integrated circuits occurs. Therefore, the traditional method for testing the connectivity of the power and ground pins of the integrated circuit has the hidden trouble of missing the power pins or the ground pins of the tested integrated circuit part and the circuit breaking of the test system.
Disclosure of Invention
The technical problem to be solved by the invention is as follows: aiming at the technical problems existing in the prior art, the invention provides the method for testing the connectivity of the power supply and the ground pins of the integrated circuit, which has the advantages of simple principle, easy realization and wide application range.
In order to solve the technical problems, the invention adopts the following technical scheme:
A method for testing connectivity of power and ground pins of an integrated circuit comprises the following steps:
Step S100: building a test system; connecting all pins of the integrated circuit to be tested with a test system, wherein the test system connects all ground pins of the integrated circuit to be tested with ground, and all other pins are suspended;
Step S200: connecting one power pin in the tested integrated circuit with a current and voltage measuring module of a test system; the port A of the current voltage measuring module of the test system outputs voltage V1, the current voltage measuring module of the test system judges whether the current I1 passing through the port A is larger than the threshold current Ith1 and smaller than the threshold current Ith2, if I1 is larger than Ith1 and smaller than Ith2, the step S300 is entered, otherwise, the step S700 is entered;
step S300: step S200 is repeatedly executed on the next power supply pin in the tested integrated circuit until the test of all the power supply pins is completed; turning to step S400;
step S400: the testing system connects all power supply pins of the integrated circuit to be tested to the ground, connects one ground pin of the integrated circuit to be tested to a current voltage measuring module of the testing system, and hangs all other pins in the air, a port A of the current voltage measuring module of the testing system outputs voltage V2, the current voltage measuring module of the testing system judges whether the current I2 passing through the port A is larger than threshold current Ith3 and smaller than threshold current Ith4, if I2 is larger than Ith3 and smaller than Ith4, the step S500 is turned, otherwise, the step S700 is turned;
step S500: step S400 is repeatedly executed on the next ground pin in the tested integrated circuit until the test of all the ground pins is completed; turning to step S600;
Step S600: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is qualified;
step S700: and the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is failed.
The V1 and V2 are the voltage stimuli applied by the test system.
As a further improvement of the invention: v1 is greater than 0.1V and less than VDD, which is the recommended operating voltage for the power supply pin.
As a further improvement of the invention: the Ith1 and Ith2 were determined by a bottoming test.
As a further improvement of the invention: the V2 is less than-0.1V and greater than-VDD.
As a further improvement of the invention: the Ith3 and Ith4 were determined by a bottoming test.
Compared with the prior art, the invention has the advantages that:
The method for testing the connectivity of the power supply and the ground pins of the integrated circuit is simple in principle, easy to realize, free from greatly changing the existing integrated circuit testing system, suitable for various application scenes, and capable of eliminating the hidden trouble of missing the power supply pins or the ground pins of the tested integrated circuit and the circuit breaking of the testing system through a step-by-step distinguishing comparison method.
Drawings
FIG. 1 is a schematic flow chart of the method of the present invention.
Detailed Description
The invention will be described in further detail with reference to the drawings and the specific examples.
As shown in fig. 1, the method for testing the connectivity of power and ground pins of an integrated circuit according to the present invention comprises the following steps:
Step S100: building a test system; connecting all pins of the integrated circuit to be tested with a test system, wherein the test system connects all ground pins of the integrated circuit to be tested with ground, and all other pins are suspended;
Step S200: connecting one power pin in the tested integrated circuit with a current and voltage measuring module of a test system; the port A of the current voltage measuring module of the test system outputs voltage V1, the current voltage measuring module of the test system judges whether the current I1 passing through the port A is larger than the threshold current Ith1 and smaller than the threshold current Ith2, if I1 is larger than Ith1 and smaller than Ith2, the step S300 is entered, otherwise, the step S700 is entered;
step S300: step S200 is repeatedly executed on the next power supply pin in the tested integrated circuit until the test of all the power supply pins is completed; turning to step S400;
step S400: the testing system connects all power supply pins of the integrated circuit to be tested to the ground, connects one ground pin of the integrated circuit to be tested to a current voltage measuring module of the testing system, and hangs all other pins in the air, a port A of the current voltage measuring module of the testing system outputs voltage V2, the current voltage measuring module of the testing system judges whether the current I2 passing through the port A is larger than threshold current Ith3 and smaller than threshold current Ith4, if I2 is larger than Ith3 and smaller than Ith4, the step S500 is turned, otherwise, the step S700 is turned;
step S500: step S400 is repeatedly executed on the next ground pin in the tested integrated circuit until the test of all the ground pins is completed; turning to step S600;
Step S600: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is qualified;
step S700: and the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is failed.
The V1 and V2 are the voltage stimuli applied by the test system.
In a specific application example, V1 is greater than 0.1V and less than VDD, where VDD is the recommended operating voltage of the power supply pin.
In a specific application example, the Ith1 and Ith2 are determined by a bottoming test.
In a specific application example, the V2 is less than-0.1V and greater than-VDD.
In a specific application example, the Ith3 and Ith4 were determined by a bottoming test.
In a specific application example, the detailed steps of the invention include:
step S1: connecting all pins of the integrated circuit to be tested with a test system, wherein the integrated circuit to be tested has M power supply pins and N ground pins;
Step S2: the test system connects all the pins of the tested integrated circuit to the ground, and all the other pins are suspended, and i=0 is set;
step S3: if i=m, go to step S8, otherwise go to step S4;
Step S4: connecting the ith power pin with a current and voltage measurement module of the test system;
step S5: the port A of the current-voltage measurement module of the test system outputs a voltage V1. V1 is greater than 0.1V and less than VDD. VDD is the recommended operating voltage for the ith power pin;
Step S6: the current-voltage measurement module of the test system determines whether the current I1 through the port a is greater than the threshold current Ith1 and less than the threshold current Ith2, and goes to step S7 if I1 is greater than Ith1 and less than Ith2, otherwise goes to step S15. Preferably, ith1 and Ith2 are determined by a bottoming test;
step S7: suspending the ith power pin, i=i+1, and turning to step S3;
step S8: the test system connects all power supply pins of the tested integrated circuit to the ground, and all other pins are suspended, and j=0 is set;
step S9: if j=n, go to step S14, otherwise go to step S10;
step S10: connecting the jth ground pin with a current and voltage measurement module of the test system;
step S11: the port A of the current-voltage measurement module of the test system outputs a voltage V2. V2 is less than-0.1V and greater than-VDD;
step S12: the current-voltage measurement module of the test system determines whether the current I2 through the port a is greater than the threshold current Ith3 and less than the threshold current Ith4, and goes to step S13 if I2 is greater than Ith3 and less than Ith4, otherwise goes to step S15. Preferably, ith3 and Ith4 are determined by a bottoming test;
Step S13: suspending the jth ground pin, j=j+1, turning to step S9;
step S14: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is qualified;
step S15: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is unqualified;
the above is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above examples, and all technical solutions belonging to the concept of the present invention belong to the protection scope of the present invention. It should be noted that modifications and adaptations to the invention without departing from the principles thereof are intended to be within the scope of the invention as set forth in the following claims.
Claims (1)
1. The method for testing the connectivity of the power supply and the ground pins of the integrated circuit is characterized by comprising the following steps:
Step S100: building a test system; connecting all pins of the integrated circuit to be tested with a test system, wherein the test system connects all ground pins of the integrated circuit to be tested with ground, and all other pins are suspended;
Step S200: connecting one power pin in the tested integrated circuit with a current and voltage measuring module of a test system; the port A of the current voltage measuring module of the test system outputs voltage V1, the current voltage measuring module of the test system judges whether the current I1 passing through the port A is larger than the threshold current Ith1 and smaller than the threshold current Ith2, if I1 is larger than Ith1 and smaller than Ith2, the step S300 is entered, otherwise, the step S700 is entered;
step S300: step S200 is repeatedly executed on the next power supply pin in the tested integrated circuit until the test of all the power supply pins is completed; turning to step S400;
Step S400: the testing system connects all power supply pins of the integrated circuit to be tested to the ground, connects one ground pin of the integrated circuit to be tested to a current voltage measuring module of the testing system, and hangs all other pins in the air, a port A of the current voltage measuring module of the testing system outputs voltage V2, the current voltage measuring module of the testing system judges whether the current I2 passing through the port A is larger than threshold current Ith3 and smaller than threshold current Ith4, if I2 is larger than Ith3 and smaller than Ith4, the step S500 is turned, otherwise, the step S700 is turned; the Ith3 and the Ith4 are determined by a bottoming test;
step S500: step S400 is repeatedly executed on the next ground pin in the tested integrated circuit until the test of all the ground pins is completed; turning to step S600;
Step S600: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is qualified;
step S700: the connectivity test of the power supply pin and the ground pin of the tested integrated circuit is unqualified;
the V1 is greater than 0.1V and less than VDD; the V2 is less than 0.1V and greater than VDD.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111013227.6A CN113687218B (en) | 2021-08-31 | 2021-08-31 | Method for testing connectivity of power supply and ground pins of integrated circuit |
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| Application Number | Priority Date | Filing Date | Title |
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| CN202111013227.6A CN113687218B (en) | 2021-08-31 | 2021-08-31 | Method for testing connectivity of power supply and ground pins of integrated circuit |
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| CN113687218A CN113687218A (en) | 2021-11-23 |
| CN113687218B true CN113687218B (en) | 2024-08-30 |
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| CN114325341B (en) * | 2021-12-31 | 2023-12-15 | 北京小马智行科技有限公司 | Circuit board testing equipment and testing systems |
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| CN113687218A (en) | 2021-11-23 |
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Application publication date: 20211123 Assignee: Zhejiang Weigu Information Technology Co.,Ltd. Assignor: SHANGHAI V&G INFORMATION TECHNOLOGY CO.,LTD. Contract record no.: X2024980016641 Denomination of invention: A testing method for power and ground pin connectivity of integrated circuits Granted publication date: 20240830 License type: Common License Record date: 20240929 |