CN113497023B - Long and narrow type ink jet head chip - Google Patents
Long and narrow type ink jet head chip Download PDFInfo
- Publication number
- CN113497023B CN113497023B CN202010200964.6A CN202010200964A CN113497023B CN 113497023 B CN113497023 B CN 113497023B CN 202010200964 A CN202010200964 A CN 202010200964A CN 113497023 B CN113497023 B CN 113497023B
- Authority
- CN
- China
- Prior art keywords
- high precision
- long side
- switches
- heater
- encoder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
- 239000000758 substrate Substances 0.000 claims abstract description 18
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 17
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 17
- 239000010703 silicon Substances 0.000 claims abstract description 17
- 239000004065 semiconductor Substances 0.000 claims description 15
- 229910044991 metal oxide Inorganic materials 0.000 claims description 8
- 150000004706 metal oxides Chemical class 0.000 claims description 8
- 230000005611 electricity Effects 0.000 claims description 3
- 230000003068 static effect Effects 0.000 claims description 3
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 239000010931 gold Substances 0.000 claims description 2
- 229910052715 tantalum Inorganic materials 0.000 claims description 2
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 claims description 2
- 238000000034 method Methods 0.000 description 19
- 238000010586 diagram Methods 0.000 description 9
- 238000004519 manufacturing process Methods 0.000 description 8
- 230000000295 complement effect Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B41—PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
- B41J—TYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
- B41J2/00—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
- B41J2/005—Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
- B41J2/01—Ink jet
- B41J2/135—Nozzles
- B41J2/14—Structure thereof only for on-demand ink jet heads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0617—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region comprising components of the field-effect type
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Engineering & Computer Science (AREA)
- Particle Formation And Scattering Control In Inkjet Printers (AREA)
Abstract
An elongated inkjet head chip comprising: silicon substrate, active device layer, passive device layer. The active element is laminated on the silicon substrate and is provided with an electrostatic protection unit, a plurality of encoder switches, a plurality of discharge protection units and a plurality of heater switches. The electrostatic protection unit, the encoder switch and the heater switch are respectively arranged in at least two high-precision areas of the active element layer, and the relative positions and the relative numbers of the electrostatic protection unit, the encoder switch and the heater switch are the same. The passive element layer is laminated on the active element layer and is provided with a plurality of heaters, a plurality of electrode gaskets, a plurality of encoders and a plurality of circuit wires. The circuit wiring is electrically connected with the electrostatic protection unit, the encoder switch, the discharge protection unit, the heater switch, the heater, the electrode pad and the encoder.
Description
Technical Field
The present disclosure relates to an inkjet head chip, and more particularly to a modularized inkjet head chip with metal oxide semiconductor.
Background
With the technology becoming more and more advanced, the size and shape of inkjet heads also change with different customer demands (e.g., faster printing speeds). However, variations in the size and shape of the inkjet head are limited by the size of the mask during the process, and increase the production cost.
Referring to fig. 1, the conventional inkjet head chip 9 has a plurality of electrode pads 91, a plurality of electrostatic protection units 92, a plurality of heaters 93, a plurality of heater switches 94, a plurality of encoders 95, a plurality of encoder switches 96, and a plurality of discharge protection units 97. The electrode pads 91 are disposed adjacently on opposite sides of the ink jet head chip 9. The plurality of electrostatic protection units 92 are disposed adjacent to the electrode pads 91, respectively. The plurality of heaters 93 are disposed adjacent to and symmetrically on the other opposite sides of the inkjet head chip 9. A plurality of heater switches 94 are respectively disposed in close proximity to the heaters 93. A plurality of encoders 95 are provided adjacently at one place of the inkjet head chip 9. A plurality of encoder switches 96 are disposed immediately adjacent to the encoders 95, respectively. The plurality of discharge protection units 97 are adjacently disposed at another place of the inkjet head chip 9.
Referring to fig. 1 and 2, when the heater 93 is to be driven, for example, the heater switch 94 is turned on by applying a proper voltage to the electrode pad 91, and the heater 93 is driven by applying a proper voltage to the electrode pad 91.
However, in the conventional inkjet head chip 9, since the electrostatic protection unit 92 needs to be disposed in close proximity to the electrode pad 91 and the heater switch 94 needs to be disposed in close proximity to the heater 93, flexibility in configuration is low. Furthermore, due to the limitation of the size of the photomask, it is difficult to manufacture the long and narrow industrial inkjet head according to the customized requirement.
Disclosure of Invention
The main objective of the present invention is to provide a long and narrow type ink-jet head chip, which comprises circuits such as Complementary Metal Oxide Semiconductor (CMOS) or N-type metal oxide semiconductor (NMOS), is not limited by the size of the photomask, and can form ink-jet heads with various lengths and shapes by only changing part of the photomask, and has high usability and low production cost.
To achieve the above object, one aspect of the present invention provides an elongated inkjet head chip, comprising: a silicon substrate having a first long side; a second long side opposite to the first long side; a first short side connected with the first long side and the second long side; and a second short side connected with the first long side and the second long side and opposite to the first short side; an active device layer stacked on the silicon substrate, comprising: the plurality of static electricity protection units are adjacent to the first long edge and are arranged along the first long edge; a plurality of encoder switches disposed adjacent to and aligned along the first long side; a plurality of discharge protection units adjacent to and arranged along the first long side; and a plurality of heater switches arranged in parallel with the plurality of electrostatic protection units and the plurality of electrostatic protection units; the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches of the active element layer are arranged in at least two high-precision areas, and the relative positions and the numbers of the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches in the at least two high-precision areas are the same; a passive device layer stacked on the active device layer, comprising: a plurality of heaters arranged along the second long side; a plurality of electrode pads; a plurality of encoders arranged along the first long side and adjacent to the plurality of encoder switches respectively; and a plurality of circuit traces electrically connected to the plurality of electrostatic protection units, the plurality of encoder switches, the plurality of discharge protection units, the plurality of heater switches, the plurality of heaters, the plurality of electrode pads, and the plurality of encoders.
Drawings
Fig. 1 is a schematic diagram of a die layout of a conventional inkjet head chip.
Fig. 2 is a schematic circuit diagram of a portion of a conventional inkjet head chip.
Fig. 3A is a schematic diagram of an embodiment of an elongated inkjet head chip.
FIG. 3B is a schematic cross-sectional view of an embodiment of an elongate inkjet head chip.
FIG. 3C is a schematic diagram of another embodiment of an elongate inkjet head chip.
Fig. 4 is a schematic layout diagram of a front-end-of-line process of an elongated inkjet head chip.
Fig. 5 is a schematic layout diagram of a back-end-of-line process of the long and narrow inkjet head chip.
Fig. 6A is a schematic layout of an elongated inkjet head chip on a wafer.
FIG. 6B is a schematic diagram of another embodiment of an elongated inkjet head chip in a wafer layout.
FIG. 7A is a schematic diagram of an embodiment of an electrode pad of an elongate inkjet head chip.
Fig. 7B is a schematic diagram of another embodiment of an electrode pad of the long and narrow inkjet head chip.
Description of the reference numerals
1: long and narrow type ink jet head chip
1a: first high precision zone
1b: second high precision zone
1c: third high precision zone
11: silicon substrate
111: a first long side
112: a second long side
113: a first short side
114: second short side
12: active device layer
121: electrostatic protection unit
122: encoder switch
123: discharge protection unit
124: heater switch
13: passive element layer
131: heater
132: electrode pad
133: circuit wiring
134: encoder with a plurality of sensors
9: ink jet head chip
91: electrode pad
92: electrostatic protection unit
93: heater
94: heater switch
95: encoder with a plurality of sensors
96: encoder switch
97: discharge protection unit
10: semiconductor wafer
Detailed Description
The embodiments which embody the features and advantages of the present invention are described in detail in the following description. It will be understood that various changes can be made in the above-described embodiments without departing from the scope of the invention, and that the description and illustrations herein are to be taken in an illustrative and not a limiting sense.
Referring to fig. 3A and 3B, the long and narrow inkjet head chip 1 of the present embodiment includes: a silicon substrate 11, an active device layer 12 and a passive device layer 13, the silicon substrate 11 comprising: a first long side 111, a second long side 112, a first short side 113 and a second short side 114. The first long side 111 and the second long side 112 correspond to each other. The first short side 113 corresponds to the second short side 114, and is connected to the first long side 111 and the second long side 112, respectively.
The active device layer 12 is stacked on the silicon substrate 11, and the active device layer 12 has a plurality of electrostatic protection units 121, a plurality of encoder switches 122, a plurality of discharge protection units 123, and a plurality of heater switches 124. The electrostatic protection units 121 are adjacent to the first long side 111 of the silicon substrate 11, and are arranged along the first long side 111. The encoder switch 122 is also adjacent to the first long side 111 of the silicon substrate 11, and is disposed in line along the first long side 111. The discharge protection units 123 are also adjacent to the first long side 111 of the substrate 11, and are arranged along the first long side 111. In the present embodiment, the electrostatic protection unit 121, the encoder switch 122 and the discharge protection unit 123 are aligned along the first long side 111, but not limited thereto. The heater switch 124 is located in the middle of the long and narrow inkjet head 1, and is arranged side by side with the electrostatic protection unit 121, the encoder switch 122, and the discharge protection unit 123.
The long and narrow inkjet head 1 has at least two high precision areas, in which the electrostatic protection units 121, the encoder switches 122, the discharge protection units 123 and the heater switches 124 of the active device layer 12 are arranged in an aligned manner, and the relative positions and numbers of the electrostatic protection units 121, the encoder switches 122, the discharge protection units 123 and the heater switches 124 in the high precision areas are the same.
The passive element layer 13 is stacked on the active element layer 12, and the passive element layer 13 has a plurality of heaters 131, a plurality of electrode pads 132, a plurality of circuit traces 133, and a plurality of encoders 134. The heaters 131 are arranged along the second long side 112 of the silicon substrate 11 and are arranged in rows. The electrode pads 132 are arranged along the first short side 113 and the second short side 114. In the present embodiment, the partial electrode pads 132 are arranged in a row along the first short side 113, and the partial electrode pads 132 are arranged in a row along the second short side 114, but not limited thereto. The encoders 134 are arranged along the first long side 111 and are adjacent to the corresponding encoder switches 122, and the circuit traces 133 are electrically connected to the electrostatic protection unit 121, the encoder switches 122, the discharge protection unit 123, the heater switch 124, the heater 131 and the electrode pads 132, wherein the circuit traces 133 are respectively disposed on different metal layers, so that complex circuit jumper actions can be reduced, and the material of the passive element layer 13 can be one of gold, aluminum and tantalum or a combination thereof, but is not limited thereto.
In the present embodiment, the heater 131 may be configured in a column 300 (Dots Per Inch, DPI), but the configuration of the heater 131 may be changed according to design requirements in other embodiments.
It should be noted that, in the present embodiment, the discharge protection unit 123 is a Pull-Down Resistor Protection Device (RPD), but not limited thereto; in this embodiment, the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123, and the heater switch 124 are N-type metal oxide semiconductor (NMOS) devices, but not limited thereto. In other embodiments, the esd protection unit 121, the encoder switch 122, the discharge protection unit 123, and the heater switch 124 may be a Complementary Metal Oxide Semiconductor (CMOS) device or a Bipolar (Bipolar) device, respectively.
With continued reference to fig. 3A, the at least two high-precision regions include a first high-precision region 1a and a second high-precision region 1b, the first high-precision region 1a and the second high-precision region 1b are elongated and arranged in a row along the first long side 11, and the numbers of the electrostatic protection units 121, the encoder switches 122, the discharge protection units 123 and the heater switches 124 in the first high-precision region 1a and the second high-precision region 1b are the same. Referring to fig. 3C, in another embodiment of the long and narrow type inkjet head 1, the high precision area includes a first high precision area 1a, a second high precision area 1b and a third high precision area 1C, and the first high precision area 1a, the second high precision area 1b and the third high precision area 1C are all long and narrow and are arranged in a row along the first long side 11. The number of the electrostatic protection units 121, the encoder switch 122, the discharge protection units 123, and the heater switch 124 in the first high precision area 1a, the second high precision area 1b, and the third high precision area 1c is the same.
In addition, taking the first high-precision area 1a as an example, the components in the first high-precision area 1a may be sequentially arranged in rows along the first long side 111 in the order of the partial discharge protection unit 123, the partial electrostatic protection unit 121, the encoder switch 122, the partial electrostatic protection unit 121, and the partial discharge protection unit 123, while the heater switch 124 is arranged side by side with the first long side 111, but not limited thereto, where the relative positions and the number of the components in each high-precision area are the same, so when the components in the first high-precision area 1a are arranged in the above manner, the components of the active component layer 12 in the second high-precision area 1b (or including the third high-precision area 1 c) are also sequentially arranged in rows along the first long side 111 in the order of the partial electrostatic protection unit 121, the encoder switch 122, the partial discharge protection unit 123, and the like, and the heater switch 124 is arranged side by side.
It should be noted that, in each embodiment, the length of each high precision region is 13500 micrometers (μm) and the width is 2500 micrometers (μm), for example, the interval between the first high precision region 1a and the second high precision region 1b in the length direction is 100 micrometers (μm), and in addition, since the heaters 131 are arranged in a row on the silicon substrate 11 to form 300dpi, when the length and width of each heater 131 are 35 micrometers (μm) and the interval between every two heaters is 50 micrometers (μm), part of the heaters 131 is disposed at the boundary of the first high precision region 1a and the second high precision region 1 b.
In the present embodiments, the fabrication of the long and narrow inkjet head chip 1 is divided into a front-end process and a back-end process. In the front-end process, as shown in fig. 4, the electronic device with higher accuracy is fabricated by using the mask with higher resolution, and the electronic device with higher accuracy is a device of the active device layer, so in the front-end process, the electronic device with higher accuracy such as the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123, and the heater switch 124 is disposed on the silicon substrate 11. In the embodiments, the mask used in the front-end process is a 1/5-fold step mask, but not limited thereto. In other embodiments, the choice of mask used in the front-end-of-line process may be varied according to design requirements. It should be noted that, since the 1/5-fold step masks are used to fabricate the electronic devices in the high precision area on the silicon substrate 11 of the inkjet head chip 1, and the active device layer 12 is mainly formed by sequentially stacking multiple layers of materials, multiple masks are needed in the process, and the masks a1, a2, a3, a4, a5 are used to expose each layer in sequence, so as to complete the multi-layer material stacking, and the inkjet head chip 1 includes at least two high precision areas, such as the first high precision area 1a and the second high precision area 1b, and since the number of devices in the first high precision area 1a and the second high precision area 1b and the arrangement thereof are the same, when the first high precision area 1a and the second high precision area 1b are exposed, the same set of masks (e.g., masks a 1-a 5) can be used to perform the exposure operation, and the active device layers 12 of the first high-precision region 1a and the second high-precision region 1b are stacked, so that the arrangement of devices in the high-precision regions (e.g., the first high-precision region 1a and the second high-precision region 1 b) is the same, the processing time and the cost can be effectively reduced, otherwise, if the number and the arrangement of devices in the first high-precision region 1a and the second high-precision region 1b are different, the masks used in the first high-precision region 1a may be masks a 1-a 5, the masks used in the second high-precision region 1b may be masks b 1-b 5, and the situation that the first high-precision region 1a must be completed by using the masks a 1-a 5 and the second high-precision region 1b must be completed can be generated, which requires more than one mask and the exposure processing time can be increased.
After each element of the active element layer 12 is disposed, a back-end process is performed, as shown in fig. 5, in order to clearly illustrate the back-end process, each element of the active element layer 12 formed in the previous process is shown by a dotted line, and in the back-end process of the long and narrow inkjet head chip 1, a mask with a poor resolution is selected to manufacture an electronic element with a low precision, such as the passive element layer 13: the heater 131, the electrode pads 132, the circuit traces 133, and the encoder 134 are electronic components that do not require high precision. Therefore, in the embodiments, the mask used in the back-end-of-line process is 1 times the alignment mask, so that all devices on all passive device layers 13 on the silicon substrate 11 can be completed at one time.
Referring to fig. 6A, the distribution of 1 inch long and narrow inkjet heads 1 on a 6 inch semiconductor wafer 10 is shown, each long and narrow inkjet head chip 1 includes two high precision regions (a first high precision region 1a and a second high precision region 1 b), and each inkjet head chip 1 has a length of 27000 micrometers (μm) and a width of 2500 micrometers (μm), which is almost halved compared with the conventional single inkjet head chip (15000 micrometers (μm) and 4500 micrometers (μm)), so that the total manifold core number of each semiconductor wafer 10 is 160 (190) and thus the cost of manufacturing 1 inch long and narrow inkjet head chips 1 on the same 6 inch semiconductor wafer 10 is still controlled within an acceptable range.
Referring to fig. 6B, in the embodiments, the 1.5 inch long inkjet head chips 1 are distributed on a 6 inch semiconductor wafer 10, each long inkjet head chip 1 includes three high precision regions (a first high precision region 1a, a second high precision region 1B, and a third high precision region 1 c), and each inkjet head chip 1 has a length of 40500 micrometers (μm) and a width of 2500 micrometers (μm), so that the total number of die contained in each semiconductor wafer 10 is still 100, and the cost of manufacturing 1.5 inch long inkjet head chips 1 on the same 6 inch semiconductor wafer 10 is still controlled within an acceptable range.
Referring to fig. 7A, in another embodiment of the long and narrow inkjet head chip 1, part of the electrode pads 132 of the present embodiment are arranged in an L-shape along the first short side 113 and the first long side 111, and the other part of the electrode pads 132 are arranged in an L-shape along the second short side 114 and the first long side 111. Referring to fig. 7B again, in another embodiment of the long and narrow inkjet head chip 1, the electrode pads 132 of the present embodiment are arranged along the first long side 111 and between the first high precision area 1a and the second high precision area 1B, wherein after fixing the elements of the active element layer 12 in the first high precision area 1a and the second high precision area 1B, the line width and the pitch or the routing configuration are adjusted by adjusting the positions and the arrangement of the electrode pads 132, so that the inkjet head area can be effectively utilized, and the area of the inkjet head can be further reduced.
In summary, the present disclosure provides an inkjet head chip, which is modularized by improving the chip layout and the process, so as to increase the printing speed and meet the customer requirements. The ink jet head chip includes Complementary Metal Oxide Semiconductor (CMOS) or N-type metal oxide semiconductor (NMOS) and other circuits, and has high activity and low production cost, and the process is disassembled into front stage process and back stage process.
The present invention is modified in this way by those skilled in the art without departing from the scope of the appended claims.
Claims (9)
1. An elongated inkjet head chip comprising:
a silicon substrate, having:
a first long side;
a second long side opposite to the first long side;
a first short side connected with the first long side and the second long side; and
a second short side connected with the first long side and the second long side and opposite to the first short side;
an active device layer stacked on the silicon substrate and having:
the plurality of static electricity protection units are adjacent to the first long edge and are arranged along the first long edge;
a plurality of encoder switches disposed adjacent to and aligned along the first long side;
a plurality of discharge protection units adjacent to and arranged along the first long side; and
a plurality of heater switches arranged side by side with the plurality of electrostatic protection units;
the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches of the active element layer are arranged in at least two high-precision areas, and the relative positions and the numbers of the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches in the at least two high-precision areas are the same;
a passive element layer stacked on the active element layer and having:
a plurality of heaters arranged along the second long side;
a plurality of electrode pads;
a plurality of encoders arranged along the first long side and adjacent to the plurality of encoder switches respectively; and
the plurality of circuit wires are electrically connected with the plurality of static electricity protection units, the plurality of encoder switches, the plurality of discharge protection units, the plurality of heater switches, the plurality of heaters, the plurality of electrode gaskets and the plurality of encoders.
2. The elongate inkjet printhead die of claim 1, wherein each of the plurality of discharge protection cells is a pull-down resistor protection device.
3. The elongate inkjet printhead die of claim 1 wherein the plurality of electrostatic protection units, the plurality of heater switches, and the plurality of encoder switches are all N-type metal oxide semiconductor (NMOS) devices.
4. The inkjet printhead die of claim 1, wherein the at least two high precision regions comprise a first high precision region and a second high precision region, the first high precision region and the second high precision region are elongated and arranged along the first long side, and the relative positions and numbers of the plurality of electrostatic protection units, the plurality of encoder switches, the plurality of discharge protection units and the plurality of heater switches in the first high precision region and the second high precision region are the same.
5. The inkjet printhead die of claim 1, wherein the at least two high precision regions comprise a first high precision region, a second high precision region, and a third high precision region, the first high precision region, the second high precision region, and the third high precision region are elongated and arranged along the first long side, and the relative positions and numbers of the plurality of electrostatic protection units, the plurality of encoder switches, and the plurality of heater switches in the first high precision region, the second high precision region, and the third high precision region are the same.
6. The inkjet printhead of claim 1, wherein the passive component layer is made of one or a combination of gold, aluminum, and tantalum.
7. The elongate inkjet printhead die of claim 1, wherein the plurality of electrode pads are disposed along the first short side and the second short side.
8. The elongate inkjet head chip of claim 1, wherein the plurality of electrode pads are arranged in an L-shape.
9. The elongate inkjet head chip of claim 1, wherein the plurality of electrode pads are aligned along the first long side.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010200964.6A CN113497023B (en) | 2020-03-20 | 2020-03-20 | Long and narrow type ink jet head chip |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010200964.6A CN113497023B (en) | 2020-03-20 | 2020-03-20 | Long and narrow type ink jet head chip |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN113497023A CN113497023A (en) | 2021-10-12 |
| CN113497023B true CN113497023B (en) | 2024-02-06 |
Family
ID=77993915
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010200964.6A Active CN113497023B (en) | 2020-03-20 | 2020-03-20 | Long and narrow type ink jet head chip |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN113497023B (en) |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200416144A (en) * | 2003-02-24 | 2004-09-01 | Int United Technology Co Ltd | Driving apparatus for a printing head and method thereof |
| CN1556435A (en) * | 2003-12-31 | 2004-12-22 | 友达光电股份有限公司 | Manufacturing method of thin film transistor array substrate |
| CN1841873A (en) * | 2005-03-28 | 2006-10-04 | 台湾积体电路制造股份有限公司 | ESD protection circuit and its layout |
| TW200713297A (en) * | 2005-09-19 | 2007-04-01 | Faraday Tech Corp | A shuttle mask layout method and a semiconductor element producing method using the same |
| TW201238777A (en) * | 2011-03-23 | 2012-10-01 | Microjet Technology Co Ltd | Inkjet head structure |
| CN103660574A (en) * | 2012-09-20 | 2014-03-26 | 研能科技股份有限公司 | Ink-jet head chip structure |
-
2020
- 2020-03-20 CN CN202010200964.6A patent/CN113497023B/en active Active
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TW200416144A (en) * | 2003-02-24 | 2004-09-01 | Int United Technology Co Ltd | Driving apparatus for a printing head and method thereof |
| CN1556435A (en) * | 2003-12-31 | 2004-12-22 | 友达光电股份有限公司 | Manufacturing method of thin film transistor array substrate |
| CN1841873A (en) * | 2005-03-28 | 2006-10-04 | 台湾积体电路制造股份有限公司 | ESD protection circuit and its layout |
| TW200713297A (en) * | 2005-09-19 | 2007-04-01 | Faraday Tech Corp | A shuttle mask layout method and a semiconductor element producing method using the same |
| TW201238777A (en) * | 2011-03-23 | 2012-10-01 | Microjet Technology Co Ltd | Inkjet head structure |
| CN103660574A (en) * | 2012-09-20 | 2014-03-26 | 研能科技股份有限公司 | Ink-jet head chip structure |
Also Published As
| Publication number | Publication date |
|---|---|
| CN113497023A (en) | 2021-10-12 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US9153549B2 (en) | Semiconductor device | |
| EP0250269B1 (en) | Integrated circuit semiconductor device having improved wiring structure | |
| US5681764A (en) | Method for forming a bipolar integrated ink jet printhead driver | |
| KR0125467B1 (en) | Thermal recording apparatus | |
| CN113497023B (en) | Long and narrow type ink jet head chip | |
| US11440322B2 (en) | Narrow type inkjet print head chip | |
| CN113492592B (en) | Method for manufacturing long and narrow ink jet head chip | |
| US20210291525A1 (en) | Manufacturing method of narrow type inkjet print head chip | |
| KR102098654B1 (en) | Probe card | |
| JP5358672B2 (en) | Semiconductor integrated circuit device | |
| US20110292127A1 (en) | Liquid discharge head | |
| US6606109B1 (en) | Thermal head and thermal head unit | |
| CN115179654A (en) | Semiconductor device, liquid discharge head, ink cartridge, and printing apparatus | |
| JP2002313937A (en) | Integrated circuit device | |
| US20240286416A1 (en) | Thermal print head | |
| JP2022029196A (en) | Ic chip mounting structure, thermal printhead, and manufacturing method of thermal printhead | |
| US20050012179A1 (en) | Semiconductor device | |
| JP7584315B2 (en) | Thermal Printhead | |
| US11735522B2 (en) | Semiconductor device including plurality of patterns | |
| JP3639226B2 (en) | Semiconductor integrated circuit device, mounting substrate, and mounting body | |
| JP2006334790A (en) | Thermal printing head | |
| JP2001130008A (en) | Manufacturing method for monolithic ink jet head | |
| JPH10150221A (en) | Wiring structure of led array | |
| JP2023026213A (en) | Manufacturing method of substrate for liquid discharge head and manufacturing method of liquid discharge head | |
| JP2023153472A (en) | Manufacturing method of thermal print head and thermal print head |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| GR01 | Patent grant | ||
| GR01 | Patent grant |