CN113497023B - Narrow inkjet head chip - Google Patents

Abstract

A long and narrow inkjet head chip includes: silicon substrate, active component layer, and passive component layer. The active component is stacked on the silicon substrate and has an electrostatic protection unit, a plurality of encoder switches, a plurality of discharge protection units and a plurality of heater switches. The electrostatic protection unit, encoder switch, and heater switch are respectively arranged in at least two high-precision areas of the active component layer, and their relative positions and quantities are the same. The passive component layer is stacked on the active component layer and has multiple heaters, multiple electrode pads, multiple encoders and multiple circuit traces. The circuit traces electrically connect the electrostatic protection unit, encoder switch, discharge protection unit, heater switch, heater, electrode pad and encoder.

Description

Narrow inkjet head chip

Technical field

This case is about an inkjet head chip, specifically a modular inkjet head chip that contains metal oxide semiconductors.

Background technique

With the rapid development of technology, the size and shape of inkjet heads are also changing according to the needs of different customers (for example, faster printing speed). However, changes in the size and shape of the inkjet head will be limited by the size of the photomask in the manufacturing process and increase production costs.

Please refer to Figure 1. The existing inkjet head chip 9 has multiple electrode pads 91, multiple electrostatic protection units 92, multiple heaters 93, multiple heater switches 94, multiple encoders 95, multiple encoding switch 96 and a plurality of discharge protection units 97. A plurality of electrode pads 91 are adjacently disposed on opposite sides of the inkjet head chip 9 . The plurality of electrostatic protection units 92 are respectively provided adjacent to the electrode pads 91 . A plurality of heaters 93 are adjacent and symmetrically arranged on the other opposite sides of the inkjet head chip 9 . The plurality of heater switches 94 are respectively provided adjacent to the heater 93. A plurality of encoders 95 are arranged adjacent to one place on the inkjet head chip 9 . A plurality of encoder switches 96 are respectively provided adjacent to the encoder 95 . A plurality of discharge protection units 97 are disposed adjacent to another part of the inkjet head chip 9 .

Please refer to Figure 1 and Figure 2. When you want to drive the heater 93, for example, apply an appropriate voltage to the electrode pad 91 to turn on the heater switch 94. At the same time, apply an appropriate voltage to the electrode pad 91 to drive the heater switch 94. Heater 93.

However, in the existing inkjet head chip 9, since the static electricity protection unit 92 needs to be disposed close to the electrode pad 91, and the heater switch 94 needs to be disposed close to the heater 93, the flexibility in configuration is low. Furthermore, due to the limitation of the size of the photomask, it is difficult to manufacture a long and narrow industrial inkjet head in response to customized needs.

Contents of the invention

The main purpose of this case is to provide a long and narrow inkjet head chip, which contains complementary metal oxide semiconductor (CMOS) or N-type metal oxide semiconductor (NMOS) circuits. It is not limited by the size of the mask and only needs to change part of the light. The cover can form inkjet heads of various lengths and shapes, with high usability and low production cost.

In order to achieve the above purpose, one embodiment of the present invention provides a long and narrow inkjet head chip, which includes: a silicon substrate with a first long side; a second long side opposite to the first long side; a first short side connected to the first long side and the second long side; and a second short side connected to the first long side and the second long side and relative to the first short side; an active The component layer is stacked on the silicon substrate and has: a plurality of electrostatic protection units adjacent to the first long side and arranged along the first long side; a plurality of encoder switches adjacent to the first long side and arranged along the first long side; a plurality of discharge protection units adjacent to the first long side and arranged along the first long side; and a plurality of heater switches, with the plurality of electrostatic protection units and with the plurality of The electrostatic protection units are arranged side by side; wherein, the plurality of electrostatic protection units, the plurality of encoder switches, and the plurality of heater switches of the active component layer are arranged in at least two high-precision areas, and the at least two high-precision areas The relative positions and numbers of the plurality of electrostatic protection units, the plurality of encoder switches, and the plurality of heater switches are the same; a passive component layer is stacked on the active component layer and has: a plurality of heaters, A plurality of electrode pads arranged along the second long side; a plurality of encoders arranged along the first long side and adjacent to the plurality of encoder switches respectively; and a plurality of circuit traces electrically connecting the plurality of The electrostatic protection unit, the plurality of encoder switches, the plurality of discharge protection units, the plurality of heater switches, the plurality of heaters, the plurality of electrode pads, and the plurality of encoders.

Description of drawings

Figure 1 is a schematic diagram of the die layout of a traditional inkjet head chip.

Figure 2 is a partial circuit schematic diagram of a traditional inkjet head chip.

Figure 3A is a schematic diagram of the long and narrow inkjet head chip in this case.

Figure 3B is a schematic cross-sectional view of the long and narrow inkjet head chip in this case.

FIG. 3C is a schematic diagram of another embodiment of the long and narrow inkjet head chip of the present invention.

Figure 4 is a schematic layout diagram of the front-end process of the long and narrow inkjet head chip in this case.

Figure 5 is a schematic layout diagram of the back-end process of the long and narrow inkjet head chip in this case.

Figure 6A is a schematic diagram of the layout of the long and narrow inkjet head chip on the wafer in this case.

FIG. 6B is a schematic diagram of the wafer layout of another embodiment of the long and narrow inkjet head chip of the present invention.

Figure 7A is a schematic diagram of an embodiment of the electrode pad of the long and narrow inkjet head chip in this case.

Figure 7B is a schematic diagram of another embodiment of the electrode pad of the long and narrow inkjet head chip in this case.

Explanation of reference signs

1: Narrow inkjet head chip

1a: The first high-precision area

1b: Second high-precision area

1c: The third high-precision area

11: Silicon substrate

111: First long side

112: Second long side

113: First short side

114: Second short side

12: Active component layer

121: Electrostatic protection unit

122: Encoder switch

123: Discharge protection unit

124: Heater switch

13: Passive component layer

131: Heater

132: Electrode pad

133: Circuit routing

134: Encoder

9: Inkjet head chip

91: Electrode pad

92: Electrostatic protection unit

93: heater

94: Heater switch

95: Encoder

96: Encoder switch

97: Discharge protection unit

10: Semiconductor wafer

Detailed ways

The implementation form that embodies the characteristics and advantages of this case will be described in detail in the later description. It should be understood that this case can have various changes in different aspects without departing from the scope of this case, and the descriptions and illustrations are essentially for illustrative purposes rather than limiting this case.

Please refer to Figure 3A and Figure 3B. The long and narrow inkjet head chip 1 of this case includes: a silicon substrate 11, an active component layer 12 and a passive component layer 13. The silicon substrate 11 includes: a first long side 111, a second long side 111, and a second long side 111. side 112, the first short side 113 and the second short side 114. The first long side 111 and the second long side 112 correspond to each other. The first short side 113 and the second short side 114 correspond to each other and are connected to the first long side 111 and the second long side 112 respectively.

The active element layer 12 is stacked on the silicon substrate 11 . The active element layer 12 has a plurality of electrostatic protection units 121 , a plurality of encoder switches 122 , a plurality of discharge protection units 123 and a plurality of heater switches 124 . The electrostatic protection units 121 are adjacent to the first long side 111 of the silicon substrate 11 and arranged along the first long side 111 . The encoder switches 122 are also adjacent to the first long side 111 of the silicon substrate 11 and arranged along the first long side 111 . The discharge protection units 123 are also adjacent to the first long side 111 of the substrate 11 and are arranged along the first long side 111 . In this embodiment, the electrostatic protection unit 121, the encoder switch 122 and the discharge protection unit 123 are arranged in a row along the first long side 111, but this is not a limitation. The heater switch 124 is located in the middle of the elongated inkjet head 1 and is arranged side by side with the electrostatic protection unit 121 , the encoder switch 122 and the discharge protection unit 123 .

Among them, the long and narrow inkjet head 1 has at least two high-precision areas for the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123 and the heater switch 124 of the active component layer 12 to be arranged, and the ones located in the high-precision area The relative positions and numbers of the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123 and the heater switch 124 are all the same.

The passive component layer 13 is stacked on the active component layer 12 . The passive component layer 13 has a plurality of heaters 131 , a plurality of electrode pads 132 , a plurality of circuit traces 133 and a plurality of encoders 134 . The heaters 131 are arranged along the second long side 112 of the silicon substrate 11 and are arranged in rows. The electrode pads 132 are arranged along the first short side 113 and the second short side 114 . In this embodiment, some of the electrode pads 132 are arranged in rows along the first short side 113 , and some of the electrode pads 132 are arranged in a row along the second short side 114 , but this is not a limitation. The encoders 134 are arranged along the first long side 111 and are respectively adjacent to their corresponding encoder switches 122. The circuit wiring 133 is used to electrically connect the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123, and the heater switch 124. , heater 131 and electrode pad 132, in which the circuit traces 133 are respectively arranged on different metal layers, thus reducing complicated circuit jumper actions. The material of the passive element layer 13 can be one of gold, aluminum, and tantalum. or combination thereof, not limited to this.

In this embodiment, the heaters 131 can be arranged in one row to form 300 (Dots Per Inch, DPI), but this is not a limitation. In other implementations, the configuration of the heaters 131 can be changed according to design requirements.

It is worth noting that in the implementation of this case, the discharge protection unit 123 is a pull-down resistor protection device (Pull Down, RPD), but it is not limited to this; in this case, the electrostatic protection unit 121, the encoder switch 122, The discharge protection unit 123 and the heater switch 124 are each an N-type metal oxide semiconductor (NMOS) element, but are not limited thereto. In other implementations, the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123 and the heater switch 124 may respectively be a complementary metal oxide semiconductor (CMOS) device or a bipolar (Bipolar) device.

Please continue to refer to FIG. 3A. The aforementioned at least two high-precision areas include a first high-precision area 1a and a second high-precision area 1b. The first high-precision area 1a and the second high-precision area 1b are both long and narrow. They are arranged in rows along the first long side 11, and the relative positions of the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123 and the heater switch 124 in the first high-precision area 1a and the second high-precision area 1b are all the same. same. Please refer to Figure 3C, another embodiment of the long and narrow inkjet head 1 of this case. The high-precision area includes a first high-precision area 1a, a second high-precision area 1b and a third high-precision area 1c. The first high-precision area 1c The area 1a, the second high-precision area 1b and the third high-precision area 1c are all elongated and arranged in rows along the first long side 11. The relative positions of the electrostatic protection units 121, encoder switches 122, discharge protection units 123 and heater switches 124 in the first high-precision area 1a, the second high-precision area 1b and the third high-precision area 1c are all the same.

In addition, taking the first high-precision area 1a as an example, the arrangement of components in the first high-precision area 1a can be a partial discharge protection unit 123, a partial electrostatic protection unit 121, an encoder switch 122, a partial electrostatic protection unit 121 and a partial discharge protection unit. The units 123 and so on are arranged in rows sequentially along the first long side 111, and the heater switches 124 are arranged side by side, but are not limited to this. The relative position arrangement and quantity of the components in each high-precision area are the same, so When the components in the first high-precision area 1a are arranged in the above-mentioned manner, the components in the active component layer 12 in the second high-precision area 1b (or include the third high-precision area 1c) are also arranged in accordance with the partial electrostatic protection unit 121, The encoder switch 122, partial discharge protection unit 123, etc. are arranged in rows sequentially along the first long side 111, and the heater switch 124 is arranged side by side.

It is worth noting that in each implementation aspect of this case, the length of each high-precision area is 13,500 microns (μm) and the width is 2,500 microns (μm). Taking the first high-precision area 1a and the second high-precision area 1b as an example, The distance between the first high-precision area 1a and the second high-precision area in the length direction is 100 microns (μm). In addition, since the heaters 131 are arranged in a row on the silicon substrate 11 to form 300dpi, when the length and width of the heater 131 When both are 35 micrometers (μm) and the distance between them is 50 micrometers (μm), the partial heater 131 is disposed at the junction of the first high-precision area 1a and the second high-precision area 1b.

In each implementation aspect of this case, the production of the long and narrow inkjet head chip 1 is divided into a front-end process and a back-end process. The front-end process is shown in Figure 4. The front-end process uses a higher-resolution photomask to produce electronic components with higher precision requirements. In this case, the electronic components with higher precision requirements are components of the active component layer, so in the front-end process , electronic components with high precision requirements such as the electrostatic protection unit 121, the encoder switch 122, the discharge protection unit 123, the heater switch 124, etc. are first laid on the silicon substrate 11. Among them, in each implementation aspect of this case, the photomask used in the front-end process is a 1/5x stepper photomask, but it is not limited to this. In other implementation aspects, the selection of the photomask used in the front-end process can be changed according to the design requirements. It is worth noting that since in the front-end process, the 1/5-fold stepper mask is used to produce electronic components in the high-precision area on the silicon substrate 11 of the inkjet head chip 1, the active component layer 12 is mainly composed of multiple layers. It is formed by stacking materials in sequence, so multiple masks need to be used in the process. Take masks a1, a2, a3, a4, and a5 as an example. Masks a1 to a5 are used in sequence to expose each layer. To complete the multi-layer material stacking, it is worth noting that the inkjet head chip 1 includes at least two high-precision areas, such as the first high-precision area 1a and the second high-precision area 1b. Since the first high-precision area 1a and the second high-precision area The number and arrangement of components in 1b are the same, so when performing exposure operations in the first high-precision area 1a and the second high-precision area 1b, the same set of masks (such as masks a1 to a5) can be used for exposure operations. The active component layers 12 of the first high-precision area 1a and the second high-precision area 1b are stacked. In this case, the arrangements of the components in the high-precision area (such as the first high-precision area 1a and the second high-precision area 1b) are all the same. , which can effectively reduce the process time and cost. On the contrary, if the number and arrangement of components in the first high-precision area 1a and the second high-precision area 1b are different, the mask used in the first high-precision area 1a may be Masks a1 to a5, the masks used in the second high-precision area 1b may be b1 to b5, which will result in the need to first use the masks a1 to a5 to complete the first high-precision area 1a, and then use the masks b1 to b5 to complete the second high-precision area 1a. The second high-precision area 1b not only requires twice as many masks, but also increases the exposure process time.

After the components of the active component layer 12 are laid out, the back-end process is performed, as shown in Figure 5. In order to clearly illustrate the back-end process, the components of the active component layer 12 formed in the previous process are represented by dotted lines and long and narrow lines. In the subsequent process of the inkjet head chip 1, a photomask with poor resolution is used to produce electronic components that require lower precision, such as the passive component layer 13: heater 131, electrode pad 132, circuit traces 133 and The encoder 134 is an electronic component that does not require high precision. Therefore, in each implementation aspect of this project, the photomask used in the back-end process is a 1x alignment photomask, so all components on all passive component layers 13 on the silicon substrate 11 can be completed at one time.

Please refer to FIG. 6A, which shows the distribution of a 1-inch elongated inkjet head 1 on a 6-inch semiconductor wafer 10. Each elongated inkjet head chip 1 includes two high-precision areas (the first high-precision area 1a , the second high-precision area 1b), and the length of each inkjet head chip 1 is 27,000 microns (μm) and the width is 2,500 microns (μm). Compared with the traditional single inkjet head chip (length is 15,000 microns) (μm), with a width of 4500 micrometers (μm)), its width is almost halved, so that the total number of dies contained in each semiconductor wafer 10 reaches 160 (the traditional total number of dies is 190). Therefore, in the same The cost of manufacturing a 1-inch long and narrow inkjet head chip 1 on a 6-inch semiconductor wafer 10 is still within an acceptable range.

Please refer to Figure 6B. In various implementations of this case, the 1.5-inch long and narrow inkjet head chip 1 is distributed on a 6-inch semiconductor wafer 10. Each long and narrow inkjet head chip 1 includes three high-precision areas (No. A high-precision area 1a, a second high-precision area 1b, and a third high-precision area 1c), and the length of each inkjet head chip 1 is 40,500 micrometers (μm) and the width is 2,500 micrometers (μm), so that each semiconductor The total number of dies contained in the wafer 10 is still 100, and the cost of manufacturing a 1.5-inch long and narrow inkjet head chip 1 on the same 6-inch semiconductor wafer 10 is still within an acceptable range.

Please review FIG. 7A , which is another embodiment of the long and narrow inkjet head chip 1 of this case. In this embodiment, some of the electrode pads 132 are arranged in an L shape along the first short side 113 and the first long side 111 , and another part of the electrode pads The pieces 132 are arranged in an L shape along the second short side 114 and the first long side 111 . Review FIG. 7B again, which is another embodiment of the long and narrow inkjet head chip 1. The electrode pads 132 of this embodiment are arranged along the first long side 111 and are located between the first high-precision area 1a and the second high-precision area 1b. During this time, after fixing the components of the active component layer 12 in the first high-precision area 1a and the second high-precision area 1b, the position and arrangement of the electrode pads 132 are adjusted, and the line width and spacing or wiring are adjusted. configuration, the inkjet head area can be effectively utilized, thereby reducing the area of the inkjet head.

To sum up, this project provides an inkjet head chip. By improving the chip layout and manufacturing process, the inkjet head chip can be modularized to speed up printing and meet customer needs. In addition, the inkjet head chip contains circuits such as complementary metal oxide semiconductor (CMOS) or N-type metal oxide semiconductor (NMOS), which is not limited by the size of the mask, has high usability and low production cost. In this case, the process is disassembled into a front-end process And in the back-end process, in the front-end process of active components that require high precision, they are gradually exposed through step masks. In the back-end process of passive components that require lower precision, a general photomask is used for one-time exposure and development. In addition, in The number and relative positions of the active component layers in the high-precision area are fixed, so that the same pattern of masks can be used in the front-end process to form an inkjet head chip of any size class. Under different needs, such as 1.5 inches, The 2-inch long and narrow inkjet head chip can also be composed into a 1-inch three-inkjet head chip or a multi-color wide-format inkjet head chip. There is no need to re-open the photomask of the front-end process and lay it out in different high-precision areas. When it comes to the active component layer, there is no need to replace the photomask. You only need to adjust the photomask of the passive component layer, and adjust the position and layout of the heater, electrode pad, and circuit traces of the passive component layer. There is no need to change the active component. A layer of photomask saves time and cost, and is highly industrially applicable and progressive.

This case may be modified in various ways by those who are familiar with this technology, but none of them will deviate from the intended protection within the scope of the patent application.

Claims (9)

1. An elongated inkjet head chip comprising:

a silicon substrate, having:

a first long side;

a second long side opposite to the first long side;

a first short side connected with the first long side and the second long side; and

a second short side connected with the first long side and the second long side and opposite to the first short side;

an active device layer stacked on the silicon substrate and having:

the plurality of static electricity protection units are adjacent to the first long edge and are arranged along the first long edge;

a plurality of encoder switches disposed adjacent to and aligned along the first long side;

a plurality of discharge protection units adjacent to and arranged along the first long side; and

a plurality of heater switches arranged side by side with the plurality of electrostatic protection units;

the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches of the active element layer are arranged in at least two high-precision areas, and the relative positions and the numbers of the plurality of electrostatic protection units, the plurality of encoder switches and the plurality of heater switches in the at least two high-precision areas are the same;

a passive element layer stacked on the active element layer and having:

a plurality of heaters arranged along the second long side;

a plurality of electrode pads;

a plurality of encoders arranged along the first long side and adjacent to the plurality of encoder switches respectively; and

the plurality of circuit wires are electrically connected with the plurality of static electricity protection units, the plurality of encoder switches, the plurality of discharge protection units, the plurality of heater switches, the plurality of heaters, the plurality of electrode gaskets and the plurality of encoders.

2. The elongate inkjet printhead die of claim 1, wherein each of the plurality of discharge protection cells is a pull-down resistor protection device.

3. The elongate inkjet printhead die of claim 1 wherein the plurality of electrostatic protection units, the plurality of heater switches, and the plurality of encoder switches are all N-type metal oxide semiconductor (NMOS) devices.

4. The inkjet printhead die of claim 1, wherein the at least two high precision regions comprise a first high precision region and a second high precision region, the first high precision region and the second high precision region are elongated and arranged along the first long side, and the relative positions and numbers of the plurality of electrostatic protection units, the plurality of encoder switches, the plurality of discharge protection units and the plurality of heater switches in the first high precision region and the second high precision region are the same.

5. The inkjet printhead die of claim 1, wherein the at least two high precision regions comprise a first high precision region, a second high precision region, and a third high precision region, the first high precision region, the second high precision region, and the third high precision region are elongated and arranged along the first long side, and the relative positions and numbers of the plurality of electrostatic protection units, the plurality of encoder switches, and the plurality of heater switches in the first high precision region, the second high precision region, and the third high precision region are the same.

6. The inkjet printhead of claim 1, wherein the passive component layer is made of one or a combination of gold, aluminum, and tantalum.

7. The elongate inkjet printhead die of claim 1, wherein the plurality of electrode pads are disposed along the first short side and the second short side.

8. The elongate inkjet head chip of claim 1, wherein the plurality of electrode pads are arranged in an L-shape.

9. The elongate inkjet head chip of claim 1, wherein the plurality of electrode pads are aligned along the first long side.