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CN113113511B - Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification - Google Patents

Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification Download PDF

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CN113113511B
CN113113511B CN202110388246.0A CN202110388246A CN113113511B CN 113113511 B CN113113511 B CN 113113511B CN 202110388246 A CN202110388246 A CN 202110388246A CN 113113511 B CN113113511 B CN 113113511B
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mesa
passivation layer
infrared material
mesa structure
side wall
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CN113113511A (en
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陈伟强
牛智川
蒋洞微
崔素宁
李勇
蒋俊锴
王国伟
徐应强
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Institute of Semiconductors of CAS
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • H01L31/1868Passivation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/0217Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/08Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof in which radiation controls flow of current through the device, e.g. photoresistors
    • H01L31/09Devices sensitive to infrared, visible or ultraviolet radiation
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Abstract

The invention discloses a preparation method of a detector for inhibiting side wall leakage current by using passivation layer electronegation, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.

Description

Preparation method of detector for inhibiting side wall leakage current by using passivation layer negative electrification
Technical Field
The invention relates to the technical field of semiconductors, in particular to a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer.
Background
The side wall leakage current of the detector is a component of the dark current of the whole device, and especially for a narrow bandgap device, the suppression of the mesa side wall leakage current becomes an important means for improving the impedance performance of the device. At present, the suppression of the surface leakage current of the side wall of the detector mesa is mainly realized by reducing the density of surface states, and the realization modes comprise that surface atoms form a sulfide layer, protective layers of special photoresist such as SU8, polyimide and the like are spin-coated, a dielectric film is deposited on the side wall, and a wide band gap material on the side wall is epitaxially grown. In addition, the effect of inhibiting the side wall leakage current can be improved under certain reverse bias by combining the side wall with a gate electrode. However, the effect of suppressing the surface leakage current is limited in each process, and therefore, it is meaningful to develop a detector capable of further improving the effect of suppressing the sidewall surface leakage current.
Disclosure of Invention
In view of this, in order to further improve the effect of suppressing the side wall surface leakage current of the detector, the invention provides a method for manufacturing a detector for suppressing the side wall leakage current by using the negative electrification of the passivation layer.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after element doping is carried out on the passivation layer with the mesa structure, rapid thermal annealing treatment is carried out, and the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer is obtained.
In some embodiments, the mesa mask comprises SiO 2 And (5) mesa masking.
In some embodiments, the mesa mask has a residual thickness of 0-400 nm after the infrared material is etched using an inductively coupled plasma process.
In some embodiments, the dry etching includes inductively coupled plasma etching, reactive ion etching; the wet etching is chemical etching with etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
In some embodiments, the mesa sidewalls of the infrared material with the mesa structure form an angle θ with the horizontal mesa of between 70 ° and 80 °.
In some embodiments, the dielectric film has a thickness of 500 to 1500 nm.
In some embodiments, the dielectric film is SiO 2 Or Si x N y
In some embodiments, the elemental doping is an element that forms an acceptor impurity in place of the silicon element in the dielectric film.
In some embodiments, the element doping of the passivation layer with the mesa structure is performed by ion implantation with an implantation dose of 5 × 10 10 ~10 14 cm -2 In the meantime.
In some embodiments, the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, the annealing temperature is less than or equal to 400 ℃, and the annealing time is less than or equal to 100 s.
The invention provides a detector obtained by the preparation method.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer. And doping the passivation layer under different doping conditions by an ion implantation process. The element doping enables the passivation layer formed by depositing the dielectric film to be negatively electrified from a negatively charged center, can inhibit leakage current formed by the negatively charged center caused by surface states, further can improve the inhibition effect of the leakage current on the surface of the side wall, and improves the impedance performance of the device.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a detector for suppressing a side wall leakage current by using a negative electrification of a passivation layer according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of an infrared material with a mesa mask formed therein according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram after etching an infrared material according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of the infrared material after the mesa mask is removed according to the embodiment of the present invention;
fig. 5 is a schematic structural diagram of a passivation layer formed by depositing a dielectric film according to an embodiment of the present invention.
[ description of reference ]
10-an infrared material; 20-mesa mask; 30-infrared material with mesa structure; 40-a dielectric thin film; theta-an included angle is formed between the side wall of the table top structure and the horizontal table top; 301 — upper contact layer; 302-lower contact layer
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the accompanying drawings in combination with the embodiments.
In the related art, the mesa sidewall leakage current is suppressed by depositing a dielectric film on the mesa sidewall of the detector, but the effect of this method on suppressing the mesa sidewall leakage current is limited. The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification.
The invention provides a preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification, which comprises the following steps: providing an infrared material, wherein a mesa mask is formed on the infrared material; etching the infrared material by adopting an inductive coupling plasma method; removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure; depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure; according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure; and after the passivation layer with the mesa structure is subjected to element doping, performing rapid thermal annealing treatment to obtain the detector for inhibiting the side wall leakage current by using the negative electrification of the passivation layer.
Fig. 1 is a flowchart of a method for manufacturing a detector for suppressing a side wall leakage current by using a negative electrification of a passivation layer according to an embodiment of the present invention. As shown in fig. 1, the preparation method includes operations S101 to S106.
Fig. 2 is a schematic structural diagram of an infrared material with a mesa mask formed thereon according to an embodiment of the present invention.
In operation S101, an infrared material having a mesa mask formed thereon is provided.
As shown in fig. 2, a mesa mask (20) is formed on the infrared material (10).
According to an embodiment of the invention, the infrared material (10) may be one of: short wave infrared material, medium wave infrared material, long wave infrared material, very long wave infrared material.
According to an embodiment of the invention, the mesa mask (20) may be SiO 2 And (5) mesa masking.
Fig. 3 is a schematic structural diagram after the infrared material is etched according to the embodiment of the present invention.
In operation S102, the infrared material is etched using an inductively coupled plasma method, resulting in the structure shown in fig. 3.
As can be seen from fig. 3, after the infrared material is etched by using the inductively coupled plasma method, the infrared material (30) with the mesa structure is formed, and the mesa mask (20) is disposed on the infrared material (30) with the mesa structure.
According to the embodiment of the invention, after the infrared material (10) is etched by adopting an inductively coupled plasma method, the residual thickness of the mesa mask (20) is 0-400 nm.
According to the embodiment of the invention, the etching depth of the infrared material (10) reaches the lower contact layer 302 of the infrared material (10) by adopting an inductively coupled plasma method.
Fig. 4 is a schematic structural diagram of the infrared material after the mesa mask is removed according to the embodiment of the present invention.
In operation S103, the mesa mask (20) is removed using dry etching or wet etching to form the infrared material (30) with the mesa structure.
As shown in fig. 4, the infrared material (30) with the mesa structure is formed, and an included angle between the mesa sidewall of the infrared material (30) with the mesa structure and the horizontal mesa is θ.
According to an embodiment of the invention, the dry etching includes inductively coupled plasma etching, reactive ion etching.
According to the embodiment of the invention, the wet etching is chemical etching by using an etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
According to the embodiment of the invention, in the etching solution of the wet etching, the proportion of hydrofluoric acid, ammonium fluoride and deionized water can be 1:4:5, wherein the hydrofluoric acid is analytically pure (the content is not less than 40%), and the ammonium fluoride solution is MOS-grade (the content is 40% +/-1%).
According to the embodiment of the invention, the included angle theta formed by the mesa side wall of the infrared material (30) with the mesa structure and the horizontal mesa is 70-80 degrees, for example, 70 degrees, 72 degrees, 75 degrees, 78 degrees and 80 degrees.
Fig. 5 is a schematic structural diagram of a passivation layer formed by depositing a dielectric film according to an embodiment of the present invention. In operation S104, a dielectric film (40) is deposited on the infrared material (30) with the mesa structure to form a passivation layer with the mesa structure.
As shown in fig. 5, a dielectric film (40) is deposited on the mesa sidewalls and horizontal mesas of infrared material (30) with mesa structures.
According to the embodiment of the invention, the thickness of the dielectric film (40) can be 500-1500 nm, for example, 500nm, 700nm, 1000nm, 1200nm, 1500 nm.
According to an embodiment of the present invention, the dielectric thin film (40) may be SiO 2 Or Si x N y
According to an embodiment of the invention, the dielectric film (40) may be deposited on the mesa-structured infrared material (30) in one of the following ways: plasma enhanced chemical vapor deposition, ion beam sputtering, electron beam evaporation.
In operation S105, the passivation layer with the mesa structure is doped with an element according to a thickness of a mesa sidewall of the passivation layer with the mesa structure.
According to an embodiment of the invention, the thickness of the dielectric film (40) on the mesa sidewalls is determined by sampling under a scanning electron microscope.
According to the embodiment of the present invention, the element doping is doping of an element which can form an acceptor impurity instead of a silicon element in the dielectric thin film (40), and for example, boron element, aluminum element, gallium element, and indium element can be used.
According to the embodiment of the invention, element doping of the passivation layer with the mesa structure is realized by means of ion implantation.
According to the embodiment of the invention, the implantation dosage of the ion implantation is 5 x 10 10 ~10 14 cm -2 May be, for example, 5 × 10 10 cm -2 、10 11 cm -2 、10 12 cm -2 、10 13 cm -2 、10 14 cm -2
According to the embodiment of the invention, the deposition thickness d of the dielectric film (40) is determined by the projection range R of the ion implantation parameter under the target doping condition p And range standard deviation Δ R p Determining that d is R p +4.3ΔR p
In operation S106, after the passivation layer with the mesa structure is doped with the element, a rapid thermal annealing process is performed to obtain a detector that suppresses the sidewall leakage current by using negative electrification of the passivation layer.
According to the embodiment of the invention, the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, and the annealing temperature is less than or equal to 400 ℃, for example, the annealing temperature can be 200 ℃, 250 ℃, 300 ℃, 350 ℃ and 400 ℃; the annealing time is 100s or less, and may be 40s, 60s, 80s, 90s, 100s, for example.
The invention provides a detector obtained by the preparation method.
To illustrate the features of the present invention, the present invention will be further described with reference to an example of a method for fabricating a detector for suppressing a side wall leakage current by using a negative electrification of a passivation layer.
Example 1
Taking one to form SiO 2 Mesa mask (20) patternThe infrared material (10) is etched by adopting an inductively coupled plasma method, and the etching depth reaches the lower contact layer of the infrared material. Hydrofluoric acid, ammonium fluoride and deionized water in a ratio of 1:4:5 are used to prepare a BOE etching solution. Removing residual SiO by BOE corrosive solution 2 A mesa mask (20) forming an infrared material (30) with a mesa structure. Depositing a dielectric film (40) on the mesa-structured infrared material (30) by plasma enhanced chemical vapor deposition, wherein the dielectric film (40) is SiO 2 . The deposited dielectric film (40) was sampled, and the thickness of the dielectric film (40) on the mesa side wall was measured by a scanning electron microscope to be 600 nm. After the deposition of the dielectric film (40), the element doping is carried out by ion implantation. Determining the implantation dosage of 5 × 10 ion implantation according to the measured thickness of the dielectric film (40) on the mesa sidewall 10 cm -2 The doping energy was 120 KeV. And after element doping is carried out on the passivation layer with the mesa structure, rapid thermal annealing treatment is carried out, the annealing temperature is 400 ℃, and the annealing time is 90 s. After the annealing is finished, the detector for inhibiting the side wall leakage current by using the passivation layer negative electrification can be obtained.
The embodiment of the invention provides a preparation method of a detector for inhibiting side wall leakage current by using negative electrification of a passivation layer. And doping the passivation layer under different doping conditions by an ion implantation process. The element doping enables the passivation layer formed by depositing the dielectric film to be negatively electrified from a negatively electrified center, can inhibit leakage current formed by the negatively electrified center caused by a surface state, further can improve the inhibition effect of the leakage current on the surface of the side wall, and improves the impedance performance of the device.
The above-mentioned embodiments, objects, technical solutions and advantages of the present invention are further described in detail, it should be understood that the above-mentioned embodiments are only examples of the present invention, and should not be construed as limiting the present invention, and any modifications, equivalent substitutions, improvements and the like made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims (8)

1. A preparation method of a detector for inhibiting side wall leakage current by using passivation layer negative electrification is characterized by comprising the following steps:
providing an infrared material, wherein a mesa mask is formed on the infrared material;
etching the infrared material by adopting an inductive coupling plasma method;
removing the mesa mask by dry etching or wet etching to form the infrared material with a mesa structure;
depositing a dielectric film on the infrared material with the mesa structure to form a passivation layer with the mesa structure;
according to the thickness of the mesa side wall of the passivation layer with the mesa structure, carrying out element doping on the passivation layer with the mesa structure;
after element doping is carried out on the passivation layer with the mesa structure, rapid thermal annealing treatment is carried out, and a detector for inhibiting side wall leakage current by using negative electrification of the passivation layer is obtained;
wherein the dielectric film is SiO 2 Or Si x N y
The element doping is an element which can substitute for a silicon element in the dielectric thin film to form an acceptor impurity.
2. The method of claim 1, wherein the mesa mask comprises SiO 2 And (5) mesa masking.
3. The method according to claim 1, wherein the residual thickness of the mesa mask is 0 to 400nm after the infrared material is etched by using an inductively coupled plasma method.
4. The method according to claim 1, wherein the dry etching includes inductively coupled plasma etching, reactive ion etching; the wet etching is chemical etching by using an etching solution prepared from hydrofluoric acid, ammonium fluoride and deionized water.
5. The preparation method of claim 1, wherein an included angle θ formed between the mesa sidewall of the infrared material with the mesa structure and the horizontal mesa is between 70 ° and 80 °.
6. The method according to claim 1, wherein the dielectric thin film has a thickness of 500 to 1500 nm.
7. The method according to claim 1, wherein the doping the passivation layer with the mesa structure is performed by ion implantation at a dose of 5 x 10 10 ~10 14 cm -2 In the middle of;
the condition of the rapid thermal annealing is determined according to the implantation dosage of the ion implantation, the annealing temperature is less than or equal to 400 ℃, and the annealing time is less than or equal to 100 s.
8. A probe obtained by the production method according to any one of claims 1 to 7.
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Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5821585A (en) * 1993-09-29 1998-10-13 Mitsubishi Denki Kabushiki Kaisha Thin film transistor and manufacturing method thereof
CN109285913A (en) * 2018-11-14 2019-01-29 中国电子科技集团公司第四十四研究所 Low tracking current mesa-type photodetectors and preparation method thereof
CN110176507A (en) * 2019-05-31 2019-08-27 厦门市三安集成电路有限公司 Passivating structure and photodiode of a kind of table top PIN and preparation method thereof

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Publication number Priority date Publication date Assignee Title
JP4755854B2 (en) * 2005-06-02 2011-08-24 富士通株式会社 Semiconductor light receiving device and manufacturing method thereof
US8178863B2 (en) * 2009-06-01 2012-05-15 Teledyne Scientific & Imaging, Llc Lateral collection architecture for SLS detectors
IL238368B (en) * 2015-04-19 2019-08-29 Semi Conductor Devices An Elbit Systems Rafael Partnership Photo-detector device
JP7283148B2 (en) * 2019-03-14 2023-05-30 富士通株式会社 Infrared detector, imaging device using the same, and method for manufacturing infrared detector

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5821585A (en) * 1993-09-29 1998-10-13 Mitsubishi Denki Kabushiki Kaisha Thin film transistor and manufacturing method thereof
CN109285913A (en) * 2018-11-14 2019-01-29 中国电子科技集团公司第四十四研究所 Low tracking current mesa-type photodetectors and preparation method thereof
CN110176507A (en) * 2019-05-31 2019-08-27 厦门市三安集成电路有限公司 Passivating structure and photodiode of a kind of table top PIN and preparation method thereof

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