CN112731719A - Display panel, driving method thereof, and computer storage medium - Google Patents
Display panel, driving method thereof, and computer storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 31
- 239000004973 liquid crystal related substance Substances 0.000 description 20
- 239000000758 substrate Substances 0.000 description 14
- 238000013506 data mapping Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 7
- 238000002834 transmittance Methods 0.000 description 7
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- 239000003990 capacitor Substances 0.000 description 3
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/136286—Wiring, e.g. gate line, drain line
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
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Abstract
The invention discloses a display panel, a driving method thereof and a computer storage medium, comprising the following steps: the number of the first gate lines is more than that of the second gate lines, and one second gate line is arranged between every two adjacent first gate lines; a row of pixels are arranged between each first gate line and the adjacent second gate line, a plurality of first pixels in each row of pixels are connected with the adjacent first gate lines, and a plurality of second pixels in each row of pixels are connected with the adjacent second gate lines; the voltage of a first gate driving voltage of the first pixel is different from the voltage of a second gate driving voltage of the second pixel; the polarities of the data driving signals corresponding to the first pixels are the same, and the polarities of the data driving signals corresponding to the second pixels are the same; the polarity of the data driving signal corresponding to the first pixel is opposite to the polarity of the data driving signal corresponding to the second pixel. The invention improves the problem of uneven brightness display.
Description
Technical Field
The present invention relates to the field of display panel technologies, and in particular, to a display panel, a driving method thereof, and a computer storage medium.
Background
A display panel takes a liquid crystal display panel as an example, and the liquid crystal display panel comprises an array substrate, liquid crystals, a color film substrate and a driving circuit board, wherein the liquid crystals are arranged between the array substrate and the color film substrate. The liquid crystal display panel controls the rotation angle of the liquid crystal through the voltage difference between two ends of the liquid crystal, thereby controlling the transmittance of light passing through the liquid crystal display panel.
In the driving display process of the display panel, the positive and negative polarity voltages are generally adopted to alternately drive each pixel, but due to the fact that the light penetration rates of different polarities are different, the transmittance of the negative polarity is higher, and the transmittance of the positive polarity is lower, the charging of the pixel of the negative polarity is better, the charging of the pixel of the positive polarity is poorer, and the problem of uneven brightness display occurs.
The above is only for the purpose of assisting understanding of the technical aspects of the present invention, and does not represent an admission that the above is prior art.
Disclosure of Invention
The invention mainly aims to provide a display panel, a driving method thereof and a computer storage medium, aiming at solving the problem of uneven brightness display of the panel.
To achieve the above object, the present invention provides a display panel including:
the gate lines comprise a plurality of first gate lines and a plurality of second gate lines, the number of the first gate lines is more than that of the second gate lines, and one second gate line is arranged between every two adjacent first gate lines;
the pixel array comprises a plurality of pixels, a plurality of first grid lines and a plurality of second grid lines, wherein a row of pixels is arranged between each first grid line and the adjacent second grid line, each row of pixels comprises a plurality of first pixels and a plurality of second pixels, the plurality of first pixels in each row of pixels are connected with the adjacent first grid lines, and the plurality of second pixels in each row of pixels are connected with the adjacent second grid lines; the first gate driving voltage output by the first gate line to the first pixel connected with the first gate line and the second gate driving voltage output by the second gate line to the second pixel connected with the second gate line are different in voltage; and the number of the first and second groups,
the data lines are arranged corresponding to the pixels and output data driving signals to the pixels connected with the data lines; the polarities of the data driving signals corresponding to the first pixels are the same, and the polarities of the data driving signals corresponding to the second pixels are the same; the polarity of the data driving signal corresponding to the first pixel is opposite to the polarity of the data driving signal corresponding to the second pixel.
Optionally, the display panel further comprises:
a gate driving circuit outputting a gate driving voltage to the gate line to turn on the pixel; the gate driving circuit outputs a first gate driving voltage to the first gate line and outputs a second gate driving voltage to the second gate line; and the number of the first and second groups,
and the data driving circuit outputs a data driving signal to charge the pixel through the data line.
Optionally, the gate driving circuit comprises:
a first gate driving circuit outputting a first gate driving voltage to the first gate line to turn on the first pixel; and the number of the first and second groups,
and a second gate driving circuit outputting a second gate driving voltage to the second gate line to turn on the second pixel.
Optionally, the first gate line is farther from the data driving circuit along the direction of the data line, the first gate driving voltage is larger, and meanwhile, the second gate line is farther from the data driving circuit, the second gate driving voltage is larger.
Further, to achieve the above object, the present invention also provides a driving method of a display panel applied to the display panel as described in any one of the above, including the steps of:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
Optionally, the driving method of the display panel further includes:
when outputting a first gate driving voltage to a first gate line of the plurality of gate lines, outputting a data driving signal of a first polarity to a data line connected to a first pixel in a first row of pixels adjacent to the first gate line, and outputting a preset dummy driving signal to a data line connected to a second pixel in the first row of pixels adjacent to the first gate line.
Optionally, the driving method of the display panel further includes:
when the first gate driving voltage is output to the last gate line of the plurality of gate lines, a data driving signal of a polarity is output to a data line connected with a first pixel in the last row of pixels adjacent to the last gate line, and a preset dummy driving signal is output to a data line connected with a second pixel in the last row of pixels adjacent to the last gate line.
Optionally, in the same frame, when the first polarity is a positive polarity and the second polarity is a negative polarity, the first gate driving voltage is greater than the second gate driving voltage; and the number of the first and second groups,
in the same frame, when the first polarity is negative and the second polarity is positive, the first gate driving voltage is less than the second gate driving voltage.
Alternatively, in a multi-frame picture, data driving signals of a first polarity and a second polarity are alternately output to the first pixels, and at the same time, data driving signals of a polarity opposite to that of the data driving signals output to the first pixels are alternately output to the second pixels.
In addition, to achieve the above object, the present invention further provides a computer storage medium having a display panel driver stored thereon, the display panel driver implementing the following steps of the display panel driving method when executed by a processor:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
The display panel, the driving method thereof and the computer storage medium provided by the embodiment of the invention comprise the following steps: the gate lines comprise a plurality of first gate lines and a plurality of second gate lines, the number of the first gate lines is more than that of the second gate lines, and one second gate line is arranged between every two adjacent first gate lines; the pixel array comprises a plurality of pixels, a plurality of first grid lines and a plurality of second grid lines, wherein a row of pixels is arranged between each first grid line and the adjacent second grid line, each row of pixels comprises a plurality of first pixels and a plurality of second pixels, the plurality of first pixels in each row of pixels are connected with the adjacent first grid lines, and the plurality of second pixels in each row of pixels are connected with the adjacent second grid lines; the first gate driving voltage output by the first gate line to the first pixel connected with the first gate line and the second gate driving voltage output by the second gate line to the second pixel connected with the second gate line are different in voltage; the data lines are arranged corresponding to the pixels and output data driving signals to the pixels connected with the data lines; the polarities of the data driving signals corresponding to the first pixels are the same, and the polarities of the data driving signals corresponding to the second pixels are the same; the polarity of the data driving signal corresponding to the first pixel is opposite to the polarity of the data driving signal corresponding to the second pixel. The invention connects the pixels corresponding to the data driving signals with different polarities to the gate lines with different types, and outputs the gate driving voltages with different voltages to the gate lines with different types, so as to compensate the difference of charging quantity caused by the different polarities of the data signals and improve the problem of uneven brightness display.
Drawings
FIG. 1 is a schematic diagram of a display panel according to the present invention;
fig. 2 is a schematic diagram of a terminal structure of a hardware operating environment according to an embodiment of the present invention;
FIG. 3 is a flowchart illustrating a driving method of a display panel according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of an equivalent circuit of a pixel of a display panel according to the present invention;
FIG. 5 is a graph showing the current-voltage relationship of the transistor of the present invention;
FIG. 6 is a graph showing the relationship between different polarities and light transmittance according to the present invention.
The implementation, functional features and advantages of the objects of the present invention will be further explained with reference to the accompanying drawings.
Detailed Description
It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Embodiments of the present invention provide a solution, in which pixels corresponding to data driving signals with different polarities are connected to different types of gate lines, and gate driving voltages with different voltages are output to the different types of gate lines, so as to compensate for a difference in charging amount caused by the different polarities of the data signals, and improve the problem of uneven brightness display.
In an embodiment, a display panel structure according to an embodiment of the present invention is described.
A display panel takes a liquid crystal display panel as an example and comprises an array substrate, liquid crystals, a color film substrate and a driving circuit board, wherein the liquid crystals are arranged between the array substrate and the color film substrate. The liquid crystal display panel controls the rotation angle of the liquid crystal through the voltage difference between two ends of the liquid crystal, thereby controlling the transmittance of light passing through the liquid crystal display panel. The array substrate includes a glass substrate on which a data line, a gate line, a TFT (Thin Film Transistor) and a pixel are disposed. The driving circuit board comprises a gate driving circuit and a data driving circuit, the gate driving circuit outputs a gate driving voltage to the gate line to control the TFT to be turned on or off, and the data driving circuit outputs a data driving signal to the data line to charge the pixel.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a display panel according to an embodiment of the present invention.
In the display panel shown in fig. 1, the display panel includes a plurality of gate lines, a plurality of pixels, and a plurality of data lines.
The plurality of Gate lines include a plurality of first Gate lines and a plurality of second Gate lines, the number of the first Gate lines is greater than that of the second Gate lines, and one second Gate Line is disposed between every two adjacent first Gate lines, for example, in fig. 1, the plurality of Gate lines (G-L, Gate Line) are disposed transversely and arranged longitudinally, the plurality of Gate lines include G1, G2, G3,. gto 2m-1, G2m, G2m +1, the plurality of first Gate lines are G1, G3, G5,. gto.gto 2m-1, G2m +1, and the plurality of second Gate lines are G2, G4, G6,. gto 2m-2, G2m, it can be seen that the number of the first Gate lines is greater than that of the second Gate lines, and the first Gate lines are more than that of the second Gate lines, so that one second Gate Line is disposed between every two adjacent first Gate lines, wherein, 2m is the number of rows of pixels in the display panel.
The plurality of pixels are arranged in a dot matrix, and when divided into rows, the plurality of pixels include a plurality of rows of pixels, and when divided into columns, the plurality of pixels include a plurality of columns of pixels. For example, as shown in fig. 1, only one row of pixels is disposed between the gate line G1 and the adjacent second gate line G2, and only one row of pixels is disposed between the gate line G3 and the adjacent second gate line G2. As shown in fig. 1, each row of pixels includes a plurality of first pixels and a plurality of second pixels, the plurality of first pixels in each row of pixels are connected to adjacent first gate lines, the plurality of second pixels in each row of pixels are connected to adjacent second gate lines, and thus, when the gate driving voltage is outputted to the pixels connected to the gate lines through the gate lines, since the first pixels and the second pixels in the same row of pixels are respectively connected to different gate lines, the first gate driving voltage may be output to the first pixel connected to the first gate line through the first gate line, and outputs a second gate driving voltage to a second pixel connected to the second gate line through a second gate line, the first gate driving voltage and the second gate driving voltage having different voltages, therefore, the grid driving voltages with different sizes are respectively output to the first pixels and the second pixels in the same row of pixels.
For example, as shown in fig. 1, each of the Data lines (D-L, Data Line) is disposed vertically and arranged horizontally, the Data lines include S1, S2, S3, S4, S5, S6, S2n-2, S2n-1, S2n, the Data Line S1 is connected to each pixel in a first column of pixels, the Data Line S2 is connected to each pixel in a second column of pixels, and the Data driving signal can be output to the pixels connected to the Data lines through the corresponding Data Line, where 2n is the column number of pixels in the display panel. When the pixels are driven, the polarities of the data driving signals corresponding to the first pixels are the same, the polarities of the data driving signals corresponding to the second pixels are the same, the polarities of the data driving signals corresponding to the first pixels are opposite to the polarities of the data driving signals corresponding to the second pixels, when the first polarity is positive, the second polarity is negative, and when the first polarity is negative, the second polarity is positive.
Alternatively, as shown in fig. 1, the display panel includes a driving circuit for driving the display panel, the driving circuit including a Gate driving circuit ("G/D" in fig. 1, Gate/Data) outputting a Gate driving voltage to a Gate line to which the Gate driving circuit is connected to open a pixel to which the Gate line is connected, and a Data driving circuit ("S/D" in fig. 1, Source/Data) outputting a Data driving signal to a Data line to which the Data driving circuit is connected to charge the pixel to which the Data line is connected.
Optionally, the gate driving circuit includes a first gate driving circuit and a second gate driving circuit, or two gate driving chips controlled independently to output different gate driving voltages, and then are connected to a Timing Controller (TCON) respectively, and perform Timing correspondence through the Timing Controller. The first gate driving circuit outputs a first gate driving voltage to a first gate line connected to the first gate driving circuit to open a first pixel connected to the first gate line, and the second gate driving circuit outputs a second gate driving voltage to a second gate line connected to the second gate driving circuit to open a second pixel connected to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages, and specifically, the pixel includes an active switch and a pixel electrode, and when the gate of the active switch receives the gate driving voltage, the source and the drain of the active switch are turned on to charge the pixel electrode with a data driving signal.
Optionally, in each row of pixels, one second pixel is disposed between two adjacent first pixels, one first pixel is disposed between two adjacent second pixels, and the number of the first pixels and the number of the second pixels in the same row of pixels are equal, so that the polarities of the data driving signals of the adjacent pixels in each row are different, and the corresponding pixels of the same polarity are connected to the same gate line, which is beneficial to conveniently controlling the gate driving voltages of the gate lines correspondingly connected to the pixels of different polarities; on the other hand, the difference of the charging quantity caused by the different polarities of the data signals of the pixels is compensated, so that the whole display of the display panel is more uniform. The polarity of the data driving signal for the first pixel may be a positive polarity or a negative polarity, and the polarity of the data driving signal for the second pixel may also be a positive polarity or a negative polarity. Specifically, in the same frame, when the data driving signal corresponding to the first pixel is of the first polarity, the data driving signal corresponding to the second pixel is of the second polarity; when the first polarity is positive and the second polarity is negative, the first gate driving voltage is greater than the second gate driving voltage; when the first polarity is negative polarity and the second polarity is positive polarity, the first gate driving voltage is smaller than the second gate driving voltage. Under the condition that the charging time is constant, because the charging rate of the data driving signal of the first pixel is positive relative to the charging rate of the negative, the corresponding first gate driving voltage is greater than the second gate driving voltage, which is equivalent to improving the charging efficiency of the first pixel, so that the charging quantity difference caused by the positive polarity of the data driving signal is compensated, and finally, the charging of the first pixel and the charging of the second pixel tend to be equal, so that the display of the display panel is uniform.
Alternatively, as the distance from the data driving circuit is farther, the transmitted signal is lost and the amount of charge is insufficient, so that the problem of insufficient amount of charge due to the distance can be compensated for by the difference in the gate driving voltage output by the gate driving circuit. Specifically, along the direction of the data line, the farther the first gate line is from the data driving circuit, the larger the first gate driving voltage is, and meanwhile, the farther the second gate line is from the data driving circuit, the larger the second gate driving voltage is. The farther from the gate line of the data driving circuit, the larger the corresponding output gate driving voltage is, so as to compensate the difference of the charging amount of the pixels with the same polarity due to the farther distance, and finally, the display of the whole display panel is uniform.
In this embodiment, fig. 4 is an equivalent circuit schematic diagram of an exemplary pixel, as shown in fig. 4, a Gate electrode of a TFT corresponding to one pixel is connected to the Gate Line (G-L, Gate Line), a source electrode of the TFT is connected to the Data Line (D-L, Data Line), a drain electrode of the TFT is connected to a pixel electrode of the pixel, a storage capacitor (Cst) is formed at a position where the pixel electrode overlaps a common Line of the array substrate, and a pixel capacitor (C1C) is formed at a position where the pixel electrode overlaps a common electrode of the color filter substrate, where a voltage of the common Line of the array substrate and a voltage of the common electrode of the color filter substrate are both Vcom. Among them, the TFT is generally an NMOS (N-Metal-0 oxide-Semiconductor) transistor.
Fig. 5 is a graph illustrating a current-voltage curve of an exemplary NMOS, as shown in fig. 5, where the abscissa VDS is the voltage difference between the source and the drain, Id is the drain current, and Id0 is the drain current curve corresponding to saturation. From the relationship diagram, VGS is the voltage difference between the gate and the source, VT is the threshold voltage, and is in the cut-off region when VGS is smaller than VT, and can be turned on only when VGS is larger than VT, which is usually applied in the saturation region of the NMOS transistor. The drain circuits Id are different when the gate driving voltages are different in magnitude, wherein VGS1, VGS2 and VGS3 are different in magnitude. In the saturation region, Id gradually increases as the gate driving voltage gradually increases. In the process of driving display of the liquid crystal display panel, in order to avoid polarization of liquid crystal, the data driving signals for driving the pixels have positive polarity and negative polarity. When the gate driving circuit outputs the high level VGH as the gate driving voltage to turn on the TFT, since the data driving signal is the positive TFT, the voltage difference VGS between the gate and the source is small, the data driving signal is the negative TFT, and the voltage difference VGS between the gate and the source is large, the negative TFT has a large drain current Id with respect to the positive polarity, and thus it is preferable that the corresponding data driving signal is charged to the negative polarity with respect to the corresponding data driving signal to be the positive polarity. For a large-sized ultra-high resolution liquid crystal display panel, the charging time is short, and the difference easily causes the phenomenon that the positive charging is poor to the negative charging, so that the display is uneven.
Fig. 6 is a graph illustrating exemplary relationship between different polarities and light transmittance, and as shown in fig. 6, the light transmittance of positive and negative polarities is illustrated when VGS is the same. However, in practice, VGH is the same, and the data driving signals of the positive electrode and the negative electrode are different, and VGS is different, so that there is a problem that the charging efficiency of the active switch is different, and the charging amount is different and the luminance is different. For the problem that the charging rates of the positive and negative polarities are different, which easily causes the brightness non-uniformity of the positive and negative polarities, the inventor tries to turn on the positive polarity by using different VGH voltages, that is, the positive polarity is turned on by using a relatively higher voltage VGH1, and the negative polarity is turned on by using a relatively lower voltage VGH2, so that the difference of the positive and negative polarities VGS can be reduced.
In the technical solution disclosed in this embodiment, the inventor has improved the architecture of the display panel, and by connecting the pixels corresponding to the data driving signals with different polarities to the gate lines with different types and outputting the gate driving voltages with different voltages to the gate lines with different types, the difference of the charging amounts caused by the different polarities of the data signals is compensated, so as to improve the problem of display non-uniformity caused by the different charging rates of the positive and negative polarities.
As shown in fig. 2, fig. 2 is a schematic terminal structure diagram of a hardware operating environment according to an embodiment of the present invention.
The terminal of the embodiment of the invention is a time sequence Controller (TCON).
As shown in fig. 1, the terminal may include: a processor 1001, such as a CPU, a communication bus 1002, and a memory 1003. Wherein a communication bus 1002 is used to enable connective communication between these components. The memory 1003 may be a high-speed RAM memory or a non-volatile memory (e.g., a disk memory). The memory 1003 may alternatively be a storage device separate from the processor 1001.
Those skilled in the art will appreciate that the terminal structure shown in fig. 1 is not intended to be limiting and may include more or fewer components than those shown, or some components may be combined, or a different arrangement of components.
As shown in fig. 1, the memory 1003, which is a kind of computer storage medium, may include a driver of a display panel, and the processor 1001 may be configured to call the driver of the display panel stored in the memory 1003, and perform the following operations:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
Further, the processor 1001 may call a driver of the display panel stored in the memory 1003, and also perform the following operations:
when outputting a first gate driving voltage to a first gate line of the plurality of gate lines, outputting a data driving signal of a first polarity to a data line connected to a first pixel in a first row of pixels adjacent to the first gate line, and outputting a preset dummy driving signal to a data line connected to a second pixel in the first row of pixels adjacent to the first gate line.
Further, the processor 1001 may call a driver of the display panel stored in the memory 1003, and also perform the following operations:
when the first gate driving voltage is output to the last gate line of the plurality of gate lines, a data driving signal of a polarity is output to a data line connected with a first pixel in the last row of pixels adjacent to the last gate line, and a preset dummy driving signal is output to a data line connected with a second pixel in the last row of pixels adjacent to the last gate line.
Further, the processor 1001 may call a driver of the display panel stored in the memory 1003, and also perform the following operations:
in the same frame, when the first polarity is positive and the second polarity is negative, the first gate driving voltage is greater than the second gate driving voltage; and the number of the first and second groups,
in the same frame, when the first polarity is negative and the second polarity is positive, the first gate driving voltage is less than the second gate driving voltage.
Further, the processor 1001 may call a driver of the display panel stored in the memory 1003, and also perform the following operations:
in a multi-frame picture, data driving signals of a first polarity and a second polarity are alternately output to first pixels, and at the same time, data driving signals of a polarity opposite to that of the data driving signals output to the first pixels are alternately output to second pixels.
In order to solve the problem of uneven brightness display, a liquid crystal panel driving architecture is usually required to be improved, but after the liquid crystal panel driving architecture is improved, pixels in a new architecture are still charged according to an original driving mode, so that a phenomenon of wrong charging is easy to occur, and the problem of uneven brightness display still exists.
Referring to fig. 3, in an embodiment, the driving method of the display panel is applied to the display panel according to the above embodiments, and includes the following steps:
step S1, outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
in this embodiment, the timing controller sequentially controls the gate driving circuit and the data driving circuit in the display panel according to a data mapping table (data mapping) to sequentially turn on each pixel and charge the pixel, thereby displaying an image. The timing controller can output a first gate driving voltage to the first gate line through the gate driving circuit, the first gate line transmits the first gate driving voltage to the first pixels connected with the first gate line, and outputs a second gate driving voltage to the second gate line, the second gate line transmits the second gate driving voltage to the second pixels connected with the second gate line, and the first gate driving voltage and the second gate driving voltage have different voltages so as to compensate for charging differences of pixels with different polarities.
In step S2, a data driving signal of a first polarity is output to the first pixel, and a data driving signal of a second polarity is output to the second pixel, the first polarity being opposite to the second polarity.
In this embodiment, the timing controller may output the data driving signal of the first polarity to the data line connected to the turned-on first pixel through the data driving circuit so that the data line transmits the data driving signal of the first polarity to the turned-on first pixel, and output the data driving signal of the second polarity to the data line connected to the turned-on second pixel so that the data line transmits the data driving signal of the second polarity to the turned-on second pixel.
Optionally, in the same frame, when the first polarity is a positive polarity and the second polarity is a negative polarity, the first gate driving voltage is greater than the second gate driving voltage, and in the same frame, when the first polarity is a negative polarity and the second polarity is a positive polarity, the first gate driving voltage is less than the second gate driving voltage.
Alternatively, as shown in fig. 1, the pixels in the display panel have 2m rows in the transverse direction and 2n columns in the longitudinal direction, the resolution of the display panel is 2m x (2n/3), and 2m +1 gate lines and 2n data lines are arranged in the structure of the display panel, wherein the number of the first gate lines is m +1, and the number of the second gate lines is m, it can be seen that the first gate line in the display panel, i.e. the first gate line G1 along the data line direction, is connected to only the first pixels in the first row of pixels and is not connected to the second pixels, and the last gate line in the display panel, i.e. the last first gate line G2m + 1 along the data line direction, is connected to only the second pixels in the last row of pixels and is not connected to the first pixels, at this time, if the pixels in the new structure are still charged according to the original data mapping table shown in table 1 below, the phenomenon of wrong charging is easy to occur, and the problem of uneven brightness display still exists.
TABLE 1
| S1 | S2 | S3 | …… | S2n-2 | S2n-1 | | |
| G1 | |||||||
| 1,1 | 1,2 | 1,3 | …… | 1,2n-2 | 1,2n-1 | 1, | |
| G2 | |||||||
| 2,1 | 2,2 | 2,3 | …… | 2,2n-2 | 2,2n-1 | 2, | |
| G3 | |||||||
| 3,1 | 3,2 | 3,3 | …… | 3,2n-2 | 3,2n-1 | 3,2n | |
| …… | …… | …… | …… | …… | …… | …… | …… |
| G2m-1 | 2m-1,1 | 2m-1,2 | 2m-1,3 | …… | 2m-1,2n-2 | 2m-1,2n-1 | 2m-1, |
| G2m | |||||||
| 2m,1 | 2m,2 | 2m,3 | …… | 2m,2n-2 | 2m,2n-1 | 2m,2n |
Therefore, the present embodiment resets the data mapping table for the improved display panel, as shown in table 2 below, only half of the data of the first row gate line and the last row gate line in table 2 is valid.
TABLE 2
| S1 | S2 | S3 | …… | S2n-2 | S2n-1 | | |
| G1 | Dummy | ||||||
| 1,2 | Dummy | …… | 1,2n-2 | |
1, | ||
| G2 | |||||||
| 1,1 | 2,2 | 1,3 | …… | 2,2n-2 | 1,2n-1 | 2, | |
| G3 | |||||||
| 2,1 | 3,2 | 2,3 | …… | 3,2n-2 | 2,2n-1 | 3,2n | |
| …… | …… | …… | …… | …… | …… | …… | …… |
| G2m | 2m-1,1 | 2m,2 | 2m-1,3 | …… | 2m,2n-2 | 2m-1,2n-1 | 2m,2n |
| G2m+1 | 2m,1 | Dummy | 2m,3 | …… | Dummy | 2m,2n-1 | Dummy |
Therefore, according to the modified data mapping table, when the timing controller outputs the first gate driving voltage to the first gate line of the plurality of gate lines, i.e., the first gate line ("G1" in fig. 1) through the first gate driving circuit, outputs the data driving signal of the first polarity to the data line connected to the first pixel of the first row of pixels adjacent to the first gate line through the data driving circuit, and outputs the preset dummy driving signal to the data line connected to the second pixel of the first row of pixels adjacent to the first gate line, since the first gate line of the plurality of gate lines is connected to only the first pixel of the first row of pixels and is not connected to the second pixel of the first row of pixels, the occurrence of the phenomenon of the mis-charge is prevented by the filling of the preset dummy driving signal. Similarly, according to the modified data mapping table, the timing controller outputs a data driving signal of a first polarity to a data line connected to a first pixel in a last row of pixels adjacent to a last gate line and outputs a preset dummy driving signal to a data line connected to a second pixel in a last row of pixels adjacent to a last gate line when outputting a first gate driving voltage to the last gate line, i.e., the last first gate line ("G2 m + 1" in fig. 1) through the first gate driving circuit, and thus avoids a phenomenon of mis-charging through the filling of the preset dummy driving signal since the last gate line of the plurality of gate lines is connected only to the first pixel in the last row of pixels and is not connected to the second pixel in the last row of pixels. By improving the data mapping table of the time schedule controller, the phenomenon of mis-charging is avoided.
In the technical solution disclosed in this embodiment, the pixels corresponding to the data driving signals with different polarities are connected to different types of gate lines, and gate driving voltages with different voltages are output to the different types of gate lines, so as to compensate for the difference in charging amount caused by the different polarities of the data signals, thereby improving the problem of uneven brightness display.
Furthermore, an embodiment of the present invention further provides a computer storage medium, where a driver of a display panel is stored on the computer storage medium, and the driver of the display panel, when executed by a processor, implements the steps of the driving method of the display panel according to the above embodiments, including implementing the following steps of the driving method of the display panel:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
It should be noted that, in this document, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or system that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or system. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other like elements in a process, method, article, or system that comprises the element.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments.
Through the above description of the embodiments, those skilled in the art will clearly understand that the method of the above embodiments can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware, but in many cases, the former is a better implementation manner. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium (e.g., ROM/RAM, magnetic disk, optical disk) as described above and includes instructions for enabling a terminal device (e.g., a mobile phone, a computer, a server, an air conditioner, or a network device) to execute the method according to the embodiments of the present invention.
The above description is only a preferred embodiment of the present invention, and not intended to limit the scope of the present invention, and all modifications of equivalent structures and equivalent processes, which are made by using the contents of the present specification and the accompanying drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A display panel, comprising:
the gate lines comprise a plurality of first gate lines and a plurality of second gate lines, the number of the first gate lines is more than that of the second gate lines, and one second gate line is arranged between every two adjacent first gate lines;
the pixel array comprises a plurality of pixels, a plurality of first grid lines and a plurality of second grid lines, wherein a row of pixels is arranged between each first grid line and the adjacent second grid line, each row of pixels comprises a plurality of first pixels and a plurality of second pixels, the plurality of first pixels in each row of pixels are connected with the adjacent first grid lines, and the plurality of second pixels in each row of pixels are connected with the adjacent second grid lines; the first gate driving voltage output by the first gate line to the first pixel connected with the first gate line and the second gate driving voltage output by the second gate line to the second pixel connected with the second gate line are different in voltage; and the number of the first and second groups,
the data lines are arranged corresponding to the pixels and output data driving signals to the pixels connected with the data lines; the polarities of the data driving signals corresponding to the first pixels are the same, and the polarities of the data driving signals corresponding to the second pixels are the same; the polarity of the data driving signal corresponding to the first pixel is opposite to the polarity of the data driving signal corresponding to the second pixel.
2. The display panel of claim 1, wherein the display panel further comprises:
a gate driving circuit outputting a gate driving voltage to the gate line to turn on the pixel; the gate driving circuit outputs a first gate driving voltage to the first gate line and outputs a second gate driving voltage to the second gate line; and the number of the first and second groups,
and the data driving circuit outputs a data driving signal to charge the pixel through the data line.
3. The display panel according to claim 2, wherein the gate driving circuit comprises:
a first gate driving circuit outputting a first gate driving voltage to the first gate line to turn on the first pixel; and the number of the first and second groups,
and a second gate driving circuit outputting a second gate driving voltage to the second gate line to turn on the second pixel.
4. The display panel of claim 2, wherein the first gate driving voltage is greater the farther the first gate line is from the data driving circuit along the direction of the data line, and wherein the second gate driving voltage is greater the farther the second gate line is from the data driving circuit.
5. A driving method of a display panel, applied to the display panel according to any one of claims 1 to 4, comprising the steps of:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
6. The method of driving a display panel according to claim 5, further comprising:
when outputting a first gate driving voltage to a first gate line of the plurality of gate lines, outputting a data driving signal of a first polarity to a data line connected to a first pixel in a first row of pixels adjacent to the first gate line, and outputting a preset dummy driving signal to a data line connected to a second pixel in the first row of pixels adjacent to the first gate line.
7. The method of driving a display panel according to claim 5, further comprising:
when the first gate driving voltage is output to the last gate line of the plurality of gate lines, a data driving signal of a polarity is output to a data line connected with a first pixel in the last row of pixels adjacent to the last gate line, and a preset dummy driving signal is output to a data line connected with a second pixel in the last row of pixels adjacent to the last gate line.
8. The method as claimed in claim 5, wherein the first gate driving voltage is greater than the second gate driving voltage when the first polarity is positive and the second polarity is negative in the same frame; and the number of the first and second groups,
in the same frame, when the first polarity is negative and the second polarity is positive, the first gate driving voltage is less than the second gate driving voltage.
9. The method of driving a display panel according to claim 8, wherein the data driving signals of the first polarity and the second polarity are alternately output to the first pixel, and simultaneously, the data driving signals of the polarity opposite to the data driving signals output to the first pixel are alternately output to the second pixel in the multi-frame picture.
10. A computer storage medium, wherein a driver of a display panel is stored on the computer storage medium, and when executed by a processor, the driver of the display panel implements the following steps of the driving method of the display panel:
outputting a first gate driving voltage to the first gate line and a second gate driving voltage to the second gate line, the first gate driving voltage and the second gate driving voltage having different voltages; and the number of the first and second groups,
and outputting a data driving signal of a first polarity to the first pixel and outputting a data driving signal of a second polarity to the second pixel, wherein the first polarity is opposite to the second polarity.
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