[go: up one dir, main page]
More Web Proxy on the site http://driver.im/

CN112420970B - Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device - Google Patents

Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device Download PDF

Info

Publication number
CN112420970B
CN112420970B CN202011299454.5A CN202011299454A CN112420970B CN 112420970 B CN112420970 B CN 112420970B CN 202011299454 A CN202011299454 A CN 202011299454A CN 112420970 B CN112420970 B CN 112420970B
Authority
CN
China
Prior art keywords
etching
substrate
ito
layer
selecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202011299454.5A
Other languages
Chinese (zh)
Other versions
CN112420970A (en
Inventor
曹贺
刘晓佳
吕迅
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Semiconductor Integrated Display Technology Co Ltd
Original Assignee
Semiconductor Integrated Display Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Semiconductor Integrated Display Technology Co Ltd filed Critical Semiconductor Integrated Display Technology Co Ltd
Priority to CN202011299454.5A priority Critical patent/CN112420970B/en
Publication of CN112420970A publication Critical patent/CN112420970A/en
Application granted granted Critical
Publication of CN112420970B publication Critical patent/CN112420970B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K71/00Manufacture or treatment specially adapted for the organic devices covered by this subclass
    • H10K71/20Changing the shape of the active layer in the devices, e.g. patterning
    • H10K71/231Changing the shape of the active layer in the devices, e.g. patterning by etching of existing layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

The invention provides a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro display device, which belongs to an etching method for protecting the side wall by etching back during silver wet etching, and the method can reduce the CD loss of Ag wet etching from 1 mu m to less than 0.1 mu m, greatly improve the precision of the Ag wet etching, enable the anode to adopt an Ag structure, effectively improve the reflectivity of the anode and greatly improve the luminous efficiency of the device.

Description

Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device
Technical Field
The invention belongs to the field of silicon-based Micro OLED Micro display, and particularly relates to a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro display device.
Background
In order to meet the requirement of high PPI, the silicon-based Micro OLED Micro display device anode structure needs to meet the requirement of high-precision process. The high-precision process is completed by matching photoetching with etching, and because the wet etching has larger CD loss and the precision is far worse than that of the dry etching, the current anode etching is carried out by adopting the dry etching process. In order to match with the dry etching process, the anode material needs to be a material easy to dry etch, and the anode material needs to have the properties of high work function, high reflectivity, good conductivity and the like, so the prior anode structure is preferably an ITO + Al + TiN structure. The structure is easy to dry etch, can meet the requirement of high PPI, but has slightly low reflectivity of about 91 percent, and is not an optimal structure. If Ag is adopted to replace anode Al and an ITO + Ag + ITO structure is adopted, the reflectivity can reach 98%, and the luminous efficiency of the device can be greatly improved. However, the difficulty of dry etching of Ag is high, and mass production is not feasible, and the requirement of high-precision process cannot be met due to the large CD loss of wet etching.
Disclosure of Invention
The invention provides a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro display device, which belongs to an etching method for protecting the side wall by etching back during silver wet etching, and the method can reduce the CD loss of Ag wet etching from 1 mu m to less than 0.1 mu m, greatly improve the precision of the Ag wet etching, enable the anode to adopt an Ag structure, effectively improve the reflectivity of the anode and greatly improve the luminous efficiency of the device.
The specific technical scheme of the invention is as follows:
a method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device comprises the following steps:
1) Photoetching the substrate 1 with the anode structure coated with ITO + Ag + ITO to perform anode graphical definition to obtain a substrate 2;
2) Wet etching of the upper ITO and Ag layer is carried out on the substrate 2 to obtain a substrate 3;
3) The substrate 3 is deposited with a SiN film layer to obtain a substrate 4;
4) Etching the substrate 4 by adopting a dry etching back etching process, and reserving a SiN film layer on the side wall of the anode to obtain a substrate 5;
5) And (3) carrying out wet etching on the lower layer of ITO on the substrate 5, and then removing the photoresist to obtain a substrate 6.
Further, in step 1), the substrate 1: the film layer structure is ITO + Ag + ITO, the thickness of the upper ITO layer and the lower ITO layer is controlled to be 100A +/-50A, the thickness of the upper ITO layer and the lower ITO layer is the same, and the thickness of the Ag film is controlled to be 1000A +/-500A;
the preparation method of the substrate 1 comprises the following steps: firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer.
Further, the process parameters of the ITO coating layer are selected as follows: DC sputtering power is 1000W + -200W, process pressure is 5.6mtorr + -0.5 mtorr, process gas is selected from Ar:20sccm +/-5 sccm 2 :2sccm +/-0.5 sccm; the upper and lower layers of ITO films have the same coating process.
The Ag film forming process parameters are selected as follows: DC sputtering power is 5000W +/-300W, process pressure is 5.6mtorr +/-0.5 mtorr, process gas is selected from Ar:20 sccm. + -.3 sccm.
The photoetching in the step 1) specifically comprises the following steps: selecting I-line wet etching glue as a mask, selecting 1000rpm +/-200 rpm as a gluing rotating speed, and controlling the glue thickness to be 2.5 microns +/-0.3 microns; the soft drying temperature is selected to be 90 +/-5 ℃, and the time is selected to be 60 +/-6 s; the exposure time is selected to be 350ms +/-50 ms, and the light intensity is selected to be 550mw/c square meter +/-50 mw/c square meter; the developing time is 60s +/-15 s, the developing solution is TMAH solution with the concentration of 2.38%, and the curing temperature is 120 +/-10 ℃.
In the step 2), wet etching is carried out, etching liquid adopts mixed nitrating acid which is mixed acid of nitric acid, phosphoric acid and acetic acid and is a commercially available product, and the upper ITO + Ag film etching is completed by using the mixed nitrating acid.
In the step 2), the etching rate of the nitrated mixed acid to ITO is 5A/s, the etching rate of the nitrated mixed acid to Ag is 250A/s, the selection ratio is high, the etching time of the upper layer ITO + Ag is controlled within 12-36s, the etching of the upper layer ITO + Ag can be completed, and the lowermost ITO is not etched on the substrate (the over-etching can be controlled to be less than 10A).
Further, in the step 3), the SiN film layer is deposited by adopting a CVD (chemical vapor deposition) mode to form a film, the SiN film layer is selected as the film layer, and the thickness is controlled to be 40nm +/-10 nm.
Specifically, the CVD film forming process parameters in the step 3): the power is 800W +/-50W, the pressure is 1000mT +/-10 mT, the temperature is 70 ℃ +/-5 ℃, and the gas is NH 3 The flow rate is 240sccm + -15 sccm, the film forming time is controlled within 16s + -2s, and the SiN film thickness can be controlled within 40nm + -10 nm.
In the step 4), dry etching is adopted for etching back etching process, siN is reserved on the side wall of the anode after back etching, and the surface of the anode and the channel are free of SiN residues;
specifically, the dry etching process comprises the following steps of: the power source power is 200W +/-10W, the Bias power is 40W +/-5W, and the etching gas is CF 4 The flow is 20sccm plus or minus 5sccm, the pressure is 10mT plus or minus 3mT, the temperature is 25 ℃ plus or minus 5 ℃, and the time is 20s plus or minus 3s, so that the SiN on the surface of the anode and the channel can be completely etched, and the SiN on the side wall of the anode is ensured to be reserved.
CF 4 The gas dry etching only etches SiN and does not damage ITO and Ag layers excessively.
In the step 5), carrying out ITO wet etching on the substrate 5, wherein the nitrated mixed acid is a mixed acid of nitric acid, phosphoric acid and acetic acid and is a commercially available product, and etching the lower layer of ITO is completed; wet etching is carried out at 25 +/-5 ℃ for 11-31s;
when the nitrified mixed acid is used for etching the bottom ITO, the SiN is protected on the side wall of the Ag, and the nitrified mixed acid does not etch the SiN, so that the Ag layer is not etched in the process of etching the bottom ITO.
Further, in the step 5), the photoresist is removed by a wet method, the photoresist removing liquid is NMP, and the photoresist is removed by spraying and soaking for 200s or 600s. The temperature was selected to be 50 ℃. + -. 5 ℃. The photoresist can be removed.
The SiN on the side wall can not be removed, and the performance of a product device is not influenced.
Further, the side wall SiN is selectively removed, and the removal mode adopts dry etching: the power source power is selected to be 600W +/-20W, the Bias power is selected to be 15W +/-2W, and the etching gas is selected to be CF 4 The flow rate is 50sccm +/-5 sccm 3 The flow is 10sccm +/-2 sccm, the pressure is 10mT +/-3 mT, the temperature is 25 +/-3 ℃, and the time is 20s +/-3 s, so that the etching of the side wall SiN can be completed without damaging the anode part.
Compared with the prior art, the substrate 6 finishes the side wall protection, when the lower layer ITO is etched, the side etching to Ag is avoided, the CD loss can be smaller than 0.1 mu m, the etching precision can be controlled, and the target pattern can be obtained.
Drawings
Fig. 1 is a schematic structural view of a substrate 1;
fig. 2 is a schematic structural view of the substrate 2;
FIG. 3 is a schematic structural diagram of a substrate 3;
fig. 4 is a schematic structural view of the substrate 4;
fig. 5 is a schematic structural view of the substrate 5;
FIG. 6 is a schematic view of a substrate 6;
FIG. 7 is a schematic diagram of a prior art etch;
FIG. 8 is an SEM photograph of the product of example 1;
FIG. 9 is an SEM photograph of a product of comparative example 1;
in the figure, 1-Ag layer, 2-upper ITO layer and 3-lower ITO layer; a 4-PR layer; 5-SiN layer.
Detailed Description
Example 1
A method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device comprises the following steps:
1) Firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer; the film layer structure is made of ITO + Ag + ITO, the thickness of the upper and lower ITO films is controlled to be 100AControlling the thickness of the Ag film to be 1000A to obtain a substrate 1; the specific coating process parameters are as follows: firstly, plating a lower layer ITO film on a substrate, wherein the DC sputtering power is 1000W, the process pressure is 5.6mtorr, and the process gas is selected from Ar:20sccm, O 2 :2sccm; plating Ag film, and selecting the following technological parameters: DC sputtering power is 5000W, process pressure is 5.6mtorr, process gas is selected from Ar:20sccm, ag film thickness is controlled at 1000A; finally, an upper ITO film is plated, the plating process is the same as that of the lower ITO film, and the thickness is also 100A; obtaining a substrate 1, the structure schematic diagram is shown in fig. 1;
photoetching the substrate 1 coated with the ITO + Ag + ITO of the anode structure to perform anode graphical definition, selecting I-line wet etching glue as a mask, selecting 1100rpm as a glue coating rotating speed, and controlling the glue thickness to be 2.6 mu m; the soft drying temperature is selected to be 90 ℃, and the time is selected to be 65s; the exposure time is selected to be 320ms, and the light intensity is selected to be 550mw/c square meter; the developing time is selected to be 60s, TMAH solution with the concentration of 2.38% is selected as the developing solution, and the curing temperature is selected to be 120 ℃ to obtain the substrate 2; the structure of the substrate 2 is schematically shown in fig. 2;
2) Wet etching of the upper ITO and Ag layer is carried out on the substrate 2, etching liquid is a commercially available product and is selected from nitrated mixed acid (nitric acid, phosphoric acid and acetic acid), etching is carried out for 24s, etching of the upper ITO + Ag film is completed, and a substrate 3 is obtained, wherein the structural schematic diagram is shown in FIG. 3;
3) The substrate 3 adopts a CVD mode to deposit the SiN film layer, and the CVD film forming technological parameters are as follows: the power is 780W, the pressure is 1000mT, the temperature is 70 ℃, and the gas is NH 3 The flow rate is 250sccm, the film forming time is controlled at 18s, and the SiN film thickness is controlled at 40nm, so that a substrate 4 is obtained, wherein the structural schematic diagram is shown in FIG. 4;
4) And etching the substrate 4 by adopting a dry etching process to perform etching back, wherein the dry etching process is selected, and the power is selected: source power selection 210W, bias power selection 40W, etch gas selection CF 4 The flow is 22sccm, the pressure is 8mT, the temperature is 25 ℃, the time is 20s, siN is reserved on the side wall of the anode after back etching, and the surface of the anode and the channel have no SiN residue; obtaining a substrate 5, the schematic structural diagram of which is shown in fig. 5;
5) Carrying out ITO wet etching on the substrate 5, selecting nitrifying mixed acid (nitric acid, phosphoric acid and acetic acid) as an etching solution, and etching at 25 ℃ for 21s, completing etching of the lower layer ITO; removing the side wall SiN in a dry etching mode: the power source power is selected to be 600W, the Bias power is selected to be 15W, and the etching gas is selected to be CF 4 Flow rate of 50sccm, CHF 3 The flow is 10sccm plus or minus 2sccm, the pressure is 10mT, the temperature is 25 ℃, and the time is 20s, so that the etching of the side wall SiN can be completed without damaging the anode part. Removing the photoresist by adopting a wet method, wherein NMP is selected as a photoresist removing liquid, and spraying is adopted for 200s; and (3) obtaining a substrate 6, namely completing the process, wherein a schematic diagram is shown in FIG. 6, the substrate 5 completes the side wall protection, when the lower layer ITO is etched in the step 5), the lateral etching to Ag is avoided, the CD loss is 0.09 mu m, and an SEM image of a product is shown in FIG. 8.
Comparative example 1
A method for etching a silicon-based Micro OLED Micro-display device comprises the following steps:
1) Firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer; selecting ITO + Ag + ITO as a film layer structure, controlling the thickness of the ITO films at 100A and the Ag films at 1000A to obtain a substrate 1; photoetching the substrate 1 coated with the ITO + Ag + ITO of the anode structure to perform anode graphical definition to obtain a substrate 2, wherein the specific preparation method is the same as the step 1) in the embodiment 1;
2) And (2) performing wet etching on the substrate 2, wherein etching liquid is a commercially available product which is mixed nitrating acid (nitric acid, phosphoric acid and acetic acid) selected, the etching time is 44s, the schematic diagram of the etched product is shown in FIG. 7, the SEM image of the etched product is shown in FIG. 9, and the CD loss is 1.1 μm.

Claims (7)

1. A method for protecting and etching the side wall of an anode of a silicon-based Micro OLED Micro-display device is characterized by comprising the following steps:
1) Photoetching the substrate 1 with the anode structure coated with ITO + Ag + ITO to perform anode graphical definition, and selecting photoresist as a mask to obtain a substrate 2;
2) Carrying out wet etching on the upper ITO and Ag layer of the substrate 2, wherein the etching time is controlled to be 12-36s;
obtaining a substrate 3;
3) The substrate 3 is deposited with a SiN film layer to obtain a substrate 4;
4) Etching the substrate 4 by adopting a dry etching back etching process, and reserving the SiN film layer on the side wall of the anode to obtain a substrate 5;
5) Carrying out wet etching on the lower layer of ITO on the substrate 5, and then removing the SiN film layer and the photoresist on the side wall of the anode to obtain a substrate 6;
in the step 3), the substrate 3 is deposited with the SiN film layer, CVD is adopted for film forming, and the process parameters are as follows: the power is 800W +/-50W, the pressure is 1000 mtorr +/-10 mtorr, the temperature is 70 +/-5 ℃, and the gas is NH 3 The flow rate is 240sccm + -15 sccm, the film forming time is controlled to be 16s + -2s, the SiN film thickness is controlled to be 40nm + -10 nm
In the step 4), a dry etching method is adopted for etching the back etching process, and the dry etching process comprises the following steps: the power source power is 200W +/-10W, the Bias power is 40W +/-5W, and the etching gas is CF 4 The flow is 20sccm +/-5 sccm, the pressure is 10 mtorr +/-3 mtorr, the temperature is 25 +/-5 ℃, and the time is 20s +/-3 s;
after etching, the CD loss is less than 0.1 μm.
2. The method according to claim 1, wherein in step 1), the substrate 1: the film structure is made of ITO + Ag + ITO, the thicknesses of the upper and lower layers of ITO film are controlled to be 100A +/-50A and are the same, and the thickness of the Ag film is controlled to be 1000A +/-500A.
3. The method according to claim 1, characterized in that the method for preparing the substrate 1: firstly plating an ITO layer on a substrate, then plating an Ag layer, and finally plating an ITO layer.
4. The method according to claim 3, wherein the ITO coating process parameters are selected from the group consisting of: DC sputtering power is 1000W + -200W, process pressure is 5.6mtorr + -0.5 mtorr, process gas is selected from Ar and O 2 Ar flow rate is 20sccm +/-5sccm 2 The flow rate is 2sccm +/-0.5 sccm; the upper and lower layers of ITO films have the same coating process.
5. The method according to claim 3 or 4, wherein the Ag film forming process parameters are selected as follows: the DC sputtering power is 5000W + -300W, the process pressure is 5.6mtorr + -0.5 mtorr, the process gas is Ar, and the Ar flow rate is 20sccm + -3 sccm.
6. The method according to claim 3, characterized in that the lithography in step 1) is in particular: selecting I-line wet etching glue for a mask, selecting 1000rpm +/-200 rpm for gluing, controlling the glue thickness to be 2.5 mu m +/-0.3 mu m, selecting 90 ℃ +/-5 ℃ for soft drying, selecting 60s +/-6 s for time, selecting 350ms +/-50 ms for exposure time, selecting 550mW/c square meter +/-50 mW/c square meter for light intensity, selecting 60s +/-15 s for developing time, selecting 2.38% TMAH solution for developing solution by mass concentration, and selecting 120 ℃ +/-10 ℃ for curing temperature.
7. The method according to claim 1 or 4, characterized in that in step 5), the sidewall SiN is removed after wet etching of the lower ITO layer, and the removal mode is dry etching: the power source power is selected to be 600W +/-20W, the Bias power is selected to be 15W +/-2W, and the etching gas is selected to be CF 4 And CHF 3 ,CF 4 The flow rate is 50sccm +/-5 sccm, CHF 3 The flow rate is 10sccm + -2 sccm, the pressure is 10 mtorr + -3 mtorr, the temperature is 25 deg.C + -3 deg.C, and the time is 20s + -3 s.
CN202011299454.5A 2020-11-19 2020-11-19 Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device Active CN112420970B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202011299454.5A CN112420970B (en) 2020-11-19 2020-11-19 Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202011299454.5A CN112420970B (en) 2020-11-19 2020-11-19 Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device

Publications (2)

Publication Number Publication Date
CN112420970A CN112420970A (en) 2021-02-26
CN112420970B true CN112420970B (en) 2022-10-28

Family

ID=74774274

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202011299454.5A Active CN112420970B (en) 2020-11-19 2020-11-19 Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device

Country Status (1)

Country Link
CN (1) CN112420970B (en)

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1575063A (en) * 2003-05-28 2005-02-02 索尼株式会社 Laminated structure, and manufacturing method, display device, and display unit employing same
CN104078324A (en) * 2013-03-29 2014-10-01 中国科学院微电子研究所 Stacked nanowire fabrication method
CN106531762A (en) * 2015-09-10 2017-03-22 株式会社日本显示器 Display device and method of manufacturing the same
CN106856163A (en) * 2016-11-22 2017-06-16 上海华力微电子有限公司 A kind of forming method of high aspect ratio figure structure
CN107623014A (en) * 2016-07-14 2018-01-23 上海磁宇信息科技有限公司 A kind of preparation method of magnetic RAM
CN111092054A (en) * 2018-10-24 2020-05-01 三星显示有限公司 Method of manufacturing display device
CN112366040A (en) * 2020-11-10 2021-02-12 安徽熙泰智能科技有限公司 Method for preparing high-precision silver electrode by side wall protection process

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102223681B1 (en) * 2018-05-30 2021-03-08 삼성디스플레이 주식회사 Etching solution composition for thin-film layer and manufacturing method of an array substrate for display device using the same
CN110739398A (en) * 2019-10-12 2020-01-31 安徽熙泰智能科技有限公司 Micro-display device anode silver reflecting layer and etching method of anode structure

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1575063A (en) * 2003-05-28 2005-02-02 索尼株式会社 Laminated structure, and manufacturing method, display device, and display unit employing same
CN104078324A (en) * 2013-03-29 2014-10-01 中国科学院微电子研究所 Stacked nanowire fabrication method
CN106531762A (en) * 2015-09-10 2017-03-22 株式会社日本显示器 Display device and method of manufacturing the same
CN107623014A (en) * 2016-07-14 2018-01-23 上海磁宇信息科技有限公司 A kind of preparation method of magnetic RAM
CN106856163A (en) * 2016-11-22 2017-06-16 上海华力微电子有限公司 A kind of forming method of high aspect ratio figure structure
CN111092054A (en) * 2018-10-24 2020-05-01 三星显示有限公司 Method of manufacturing display device
CN112366040A (en) * 2020-11-10 2021-02-12 安徽熙泰智能科技有限公司 Method for preparing high-precision silver electrode by side wall protection process

Also Published As

Publication number Publication date
CN112420970A (en) 2021-02-26

Similar Documents

Publication Publication Date Title
CN101566799B (en) Method for preparing hollowed-out polyimide evaporation mask stencil
CN114755761B (en) Preparation method of lithium niobate thin film submicron line width ridge type optical waveguide based on chromium mask
CN111009496B (en) A kind of semiconductor substrate with high thermal conductivity and preparation method thereof
CN102867890B (en) A kind of preparation method of sapphire pattern substrate
CN111627811A (en) Lithium tantalate micro-patterning method based on reactive ion etching
CN105668546B (en) A kind of method for preparing nanoscale graphene structure
EP3866210B1 (en) Method for removing excess film from front surface of crystalline silicon solar cell
CN108231992B (en) A kind of Superconducting Quantum chips in etching method of the film containing niobium
CN102956759B (en) Method for preparing ITO (indium tin oxide) patterns by stripping
CN112420970B (en) Method for protecting and etching anode side wall of silicon-based Micro OLED Micro-display device
CN105133038B (en) The preparation method and applications of polysilicon with efficient nano suede structure
CN110444642B (en) Preparation method of high-brightness patterned composite substrate
CN106935689A (en) Flip-chip and preparation method thereof and lighting apparatus
CN113921662B (en) Patterned composite substrate, preparation method and LED epitaxial wafer
CN106356415A (en) Production method of back metal grids
CN109103301B (en) A kind of preparation method of polycrystalline silicon surface micro-nano composite structure
CN112151642B (en) A cutting method for reducing cutting loss of LED chips
CN101101874A (en) Method for etching aluminum nitride film micropattern
CN114171641B (en) Etching method of vanadium oxide film and manufacturing method of semiconductor device
CN114664648A (en) Silicon etching method
CN100365780C (en) Mask layer and preparation method for reactive ion etching mercury cadmium telluride micro-mesas array
CN110571129B (en) Processing method of conductive metal oxide
CN112735946A (en) Semiconductor device preparation method
CN115896756B (en) A method for improving the shedding of SiO2 deposited on the surface of InGaAs
CN101969104B (en) OLED manufacturing process with submicrometer structure

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant