CN112367056A - Logarithmic amplifier - Google Patents
Logarithmic amplifier Download PDFInfo
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- CN112367056A CN112367056A CN202011344489.6A CN202011344489A CN112367056A CN 112367056 A CN112367056 A CN 112367056A CN 202011344489 A CN202011344489 A CN 202011344489A CN 112367056 A CN112367056 A CN 112367056A
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- 238000003199 nucleic acid amplification method Methods 0.000 abstract description 12
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/68—Combinations of amplifiers, e.g. multi-channel amplifiers for stereophonics
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F1/00—Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
- H03F1/30—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters
- H03F1/302—Modifications of amplifiers to reduce influence of variations of temperature or supply voltage or other physical parameters in bipolar transistor amplifiers
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Abstract
The invention discloses a logarithmic amplifier, comprising: the first sub-logarithmic amplifying circuit, the second sub-logarithmic amplifying circuit and the third sub-logarithmic amplifying circuit; the second sub-logarithmic amplifying circuit comprises a second triode and a second operational amplifier; the third sub-logarithmic amplifying circuit comprises a third triode, a fourth triode and a third operational amplifier, wherein an emitting electrode of the third triode is connected with an emitting electrode of the second triode, a base electrode and a collector electrode of the third triode are connected with an emitting electrode of the fourth triode, a base electrode of the fourth triode is grounded, a collector electrode of the fourth triode is connected to one input end of the third operational amplifier, the other input end of the third operational amplifier is grounded, and an output end of the third operational amplifier serves as an output end of the logarithmic amplifying circuit. The problem that the logarithmic amplification circuit is poor in performance due to the fact that the logarithmic amplification circuit is greatly influenced by temperature in the prior art is solved, and the stability of the logarithmic amplification circuit is improved.
Description
Technical Field
The invention relates to the technical field of circuit structures, in particular to a logarithmic amplifier.
Background
A logarithmic amplifier is an amplifying circuit in which the amplitude of an output signal and the amplitude of an input signal are in a logarithmic function relationship. Mainly converting a signal into its equivalent logarithmic value involves a non-linear operational amplifier.
In the conventional flame ionization detector (FID for short) detection, the span of signal values collected by a detection end is very large, the minimum is pA level, the maximum can reach mA level, a common current-voltage conversion circuit must adjust the measurement range by switching gain, and disturbance occurs when the gain is switched. Based on this, a circuit of a logarithmic amplifier is proposed. At low frequencies, the logarithmic amplifier has a wide dynamic range and high dc accuracy. When a small signal is input, the logarithmic amplifier presents the characteristic of linear amplification, and the gain is large; when a large signal is input, it exhibits a logarithmic characteristic, and the larger the signal, the lower the gain.
Because the signal to be detected is very small and reaches the field of ultramicro current detection, the selected operational amplifier must have the following characteristics: low input bias current, low offset current, high input impedance, low noise, low temperature drift. The selected triodes must have good consistency and small temperature drift. As shown in FIG. 1, according to the logarithmic amplifying circuit in the prior art, the output voltage
Because of the fact that
Therefore, it is not only easy to use
Wherein, VTIs the voltage equivalent of the temperature, ISIs a reverse saturation current, VTAnd ISIs a constant. Ic represents the triode collector current.
From this equation, the main factor affecting the performance is temperature, and the effect of temperature changes on this circuit is very large.
Aiming at the problem that the logarithmic amplification circuit is poor in performance due to the fact that the logarithmic amplification circuit is greatly influenced by temperature in the prior art, an effective solution is not provided.
Disclosure of Invention
In view of this, embodiments of the present invention provide a logarithmic amplifier to solve the problem in the prior art that a logarithmic amplifier circuit is affected by temperature greatly, resulting in poor performance of the logarithmic amplifier circuit.
Therefore, the embodiment of the invention provides the following technical scheme:
the present invention provides a logarithmic amplifier comprising:
the first sub-logarithmic amplifying circuit, the second sub-logarithmic amplifying circuit and the third sub-logarithmic amplifying circuit;
the first sub-logarithmic amplifying circuit comprises a first triode and a first operational amplifier, wherein one input end of the first operational amplifier is input with reference voltage, the other input end of the first operational amplifier is grounded, a collector electrode of the first triode is connected with one input end of the first operational amplifier, an emitter electrode of the first triode is connected with the output end of the first operational amplifier, and a base electrode of the first triode is grounded;
the second sub-logarithmic amplifying circuit comprises a second triode and a second operational amplifier, wherein an emitting electrode of the first triode is connected with a base electrode of the second triode, one input end of the second operational amplifier is connected with a detected unit and used as a current input of the circuit, the other input end of the second operational amplifier is connected with the base electrode of the second triode, and a collector electrode of the second triode is connected with an output end of the second operational amplifier;
the third sub-logarithmic amplifying circuit comprises a third triode, a fourth triode and a third operational amplifier, wherein an emitting electrode of the third triode is connected with an emitting electrode of the second triode, a base electrode and a collector electrode of the third triode are connected with an emitting electrode of the fourth triode, a base electrode of the fourth triode is grounded, a collector electrode of the fourth triode is connected to one input end of the third operational amplifier, the other input end of the third operational amplifier is grounded, and an output end of the third operational amplifier is used as an output end of the logarithmic amplifying circuit.
Optionally, the first sub-logarithmic amplifying circuit further includes a first resistor and a second resistor, and the first resistor and the second resistor are connected between the input reference voltage and one input end of the first operational amplifier.
Optionally, the first sub-logarithmic amplifying circuit further includes a first capacitor and a third resistor, one end of the first capacitor is connected to one input end of the first operational amplifier, and the other end of the first capacitor is connected to the output end of the first operational amplifier; the third resistor is connected between the output end of the first operational amplifier and the base electrode of the second triode.
Optionally, the second sub-logarithmic amplifying circuit further includes a second capacitor, one end of the second capacitor is connected to the collector of the second triode, and the other end of the second capacitor is connected to the output end of the second operational amplifier.
Optionally, the second sub-logarithmic amplifier circuit further comprises a fourth resistor connected between the current input and one input terminal of the second operational amplifier.
Optionally, the second sub-logarithmic amplifying circuit further includes a diode and a third capacitor connected in parallel, and a cathode of the diode is grounded.
Optionally, the second sub-logarithmic amplifier circuit further includes a fifth resistor, and the fifth resistor is connected between the output end of the second operational amplifier and the anode of the diode.
Optionally, the third sub logarithmic amplifying circuit further includes a fourth capacitor and a sixth resistor connected in parallel, one end of the sixth resistor is connected to the collector of the fourth triode, and the other end of the sixth resistor is connected to the output end of the third sub logarithmic amplifying circuit.
Optionally, the third sub-logarithmic amplifying circuit further includes a fifth capacitor and a seventh resistor connected in parallel, one end of the fifth capacitor and one end of the seventh resistor are grounded, and the other end of the fifth capacitor and the other end of the seventh resistor are connected to the output end of the third sub-logarithmic amplifying circuit.
Optionally, the third sub-logarithmic amplifying circuit further includes an eighth resistor, one end of the eighth resistor is connected to the output end of the third operational amplifier, and the other end of the eighth resistor is connected to the seventh resistor.
The technical scheme of the embodiment of the invention has the following advantages:
an embodiment of the present invention provides a logarithmic amplifier, including: the first sub-logarithmic amplifying circuit, the second sub-logarithmic amplifying circuit and the third sub-logarithmic amplifying circuit; the first sub-logarithmic amplifying circuit comprises a first triode and a first operational amplifier, one input end of the first operational amplifier inputs reference voltage, the other input end of the first operational amplifier is grounded, a collector electrode of the first triode is connected with one input end of the first operational amplifier, an emitter electrode of the first triode is connected with the output end of the first operational amplifier, and a base electrode of the first triode is grounded; the second sub-logarithmic amplifying circuit comprises a second triode and a second operational amplifier, wherein an emitting electrode of the first triode is connected with a base electrode of the second triode, one input end of the second operational amplifier is connected with the detected unit and used as current input of the circuit, the other input end of the second operational amplifier is connected to the base electrode of the second triode, and a collector electrode of the second triode is connected to the output end of the second operational amplifier; the third sub-logarithmic amplifying circuit comprises a third triode, a fourth triode and a third operational amplifier, wherein an emitting electrode of the third triode is connected with an emitting electrode of the second triode, a base electrode and a collector electrode of the third triode are connected with an emitting electrode of the fourth triode, a base electrode of the fourth triode is grounded, a collector electrode of the fourth triode is connected to one input end of the third operational amplifier, the other input end of the third operational amplifier is grounded, and an output end of the third operational amplifier serves as an output end of the logarithmic amplifying circuit. The problem of among the prior art logarithmic amplification circuit receive the temperature influence great, lead to logarithmic amplification circuit relatively poor performance is solved, logarithmic amplification circuit's stability has been promoted.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a schematic diagram of a prior art logarithmic amplifier circuit configuration;
FIG. 2 is a schematic diagram of a logarithmic amplifier circuit according to an embodiment of the present invention;
fig. 3 is a schematic diagram of another logarithmic amplifier circuit configuration according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are only a part of the embodiments of the present application, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the description of the present application, it is to be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", and the like indicate orientations or positional relationships based on those shown in the drawings, and are used merely for convenience of description and for simplicity of description, and do not indicate or imply that the referenced device or element must have a particular orientation, be constructed in a particular orientation, and be operated, and thus should not be considered as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.
In this application, the word "exemplary" is used to mean "serving as an example, instance, or illustration. Any embodiment described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other embodiments. The following description is presented to enable any person skilled in the art to make and use the application. In the following description, details are set forth for the purpose of explanation. It will be apparent to one of ordinary skill in the art that the present application may be practiced without these specific details. In other instances, well-known structures and processes are not set forth in detail in order to avoid obscuring the description of the present application with unnecessary detail. Thus, the present application is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.
The invention provides a logarithmic amplifier, and fig. 2 is a schematic diagram of a circuit structure of a logarithmic amplifier according to an embodiment of the invention, which includes: the first sub-logarithmic amplifying circuit, the second sub-logarithmic amplifying circuit and the third sub-logarithmic amplifying circuit.
The first sub-logarithmic amplifying circuit comprises a first triode Q1 and a first operational amplifier A1, wherein one input end of the first operational amplifier A1 is input with a reference voltage VrefThe other input end is grounded, and the collector of the first triode Q1 is connected with one input of the first operational amplifier A1And the emitter of the first triode Q1 is connected with the output end of the first operational amplifier A1, and the base of the first triode Q1 is grounded.
The second sub-logarithmic amplifying circuit comprises a second triode Q2 and a second operational amplifier A2, wherein the emitter of the first triode Q1 is connected with the base of the second triode Q2, one input end of the second operational amplifier A2 is connected with the detected unit and serves as the current input of the circuit, the other input end of the second operational amplifier A2 is connected with the base of the second triode Q2, and the collector of the second triode Q2 is connected with the output end of the second operational amplifier A2.
The third sub-logarithmic amplifying circuit comprises a third triode Q3, a fourth triode Q4 and a third operational amplifier A3, wherein an emitting electrode of the third triode Q3 is connected with an emitting electrode of the second triode Q2, a base electrode and a collecting electrode of the third triode Q3 are connected with an emitting electrode of the fourth triode Q4, a base electrode of the fourth triode Q4 is grounded, a collecting electrode of the fourth triode Q4 is connected to one input end of the third operational amplifier A3, the other input end of the third operational amplifier A3 is grounded, and an output end of the third operational amplifier A3 serves as an output end of the logarithmic amplifying circuit.
By the above circuit, VrefIs a reference voltage input, IinConnected to the unit to be tested as current input to the circuit, VoutThe voltage is output, the Q1 has the function of providing a reference voltage with a temperature coefficient for a base of Q2, the Q3 and the Q4 have the function of offsetting the temperature coefficients brought by Q1 and Q2, the combination of the four triodes and the three operational amplifiers has the functions of signal amplification and current-voltage conversion, the problem that the logarithmic amplification circuit is poor in performance due to the fact that the logarithmic amplification circuit is greatly influenced by temperature in the prior art is solved, and the stability of the logarithmic amplifier is improved.
FIG. 3 is a schematic diagram of another logarithmic amplifier circuit according to an embodiment of the present invention, and as shown in FIG. 3, the first sub-logarithmic amplifier circuit further includes a first resistor R1 and a second resistor R2, and the first resistor R1 and the second resistor R2 are connected to the input reference voltage VrefAnd an input terminal of the first operational amplifier a 1.
The first sub-logarithmic amplifying circuit further comprises a first capacitor C1 and a third resistor R3, one end of the first capacitor C1 is connected to one input end of the first operational amplifier A1, the other end of the first capacitor C1 is connected to the output end of the first operational amplifier A1, and the third resistor R3 is connected between the output end of the first operational amplifier A1 and the base of the second triode Q2.
The second sub-pair amplifying circuit further comprises a second capacitor C2, one end of the second capacitor C2 is connected to the collector of the second transistor Q2, and the other end of the second capacitor C2 is connected to the output end of the second operational amplifier a 1.
The second sub-logarithmic amplifying circuit further comprises a fourth resistor R4, and the fourth resistor R4 is connected to the current input IinAnd an input terminal of the second operational amplifier a 2.
The second sub-logarithmic amplifying circuit further comprises a diode D1 and a third capacitor C3 which are connected in parallel, and the cathode of the diode D1 is grounded.
The second sub logarithmic amplifying circuit further includes a fifth resistor R5, and the fifth resistor R5 is connected between the output terminal of the second operational amplifier a2 and the anode of the diode D1.
The third sub logarithmic amplifying circuit further comprises a fourth capacitor C4 and a sixth resistor R6 which are connected in parallel, one end of the sixth resistor R6 is connected to the collector of the fourth triode Q4, and the other end of the sixth resistor R6 is connected to the output end of the third sub logarithmic amplifying circuit.
The third sub-logarithmic amplifying circuit further comprises a fifth capacitor C5 and a seventh resistor R7 which are connected in parallel, one end of the fifth capacitor C5 and one end of the seventh resistor R7 are grounded, and the other end of the fifth capacitor C5 and the other end of the seventh resistor R7 are connected to the output end of the third sub-logarithmic amplifying circuit.
The third sub-logarithmic amplifying circuit further includes an eighth resistor R8, one end of the eighth resistor R8 is connected to the output terminal of the third operational amplifier, and the other end is connected to the seventh resistor R7.
Reference voltage VrefActing on the resistor R1+ R2 to form a constant current source with the current magnitude of
Collector current equivalent to transistor Q1
According to the logarithm formula of the triode, the emitter voltage of the triode Q1 can be obtained
Since the emitter of Q1 and the base of Q2 are connected together, the base voltage V of Q2B2＝VE1Then obtaining the emitter voltage of the Q2 triode as
Since the emitter E2 of Q2 and the emitter E3 of Q3 are connected together, VE2＝VE3In the same way, the conditions of Q3 and Q4 can be analyzed to obtain
And, Ic4Converted into output voltage V after current-voltage conversionoutThe conversion relation is
By combining the above equations, the formula of the output voltage can be obtained
Therefore, in the prior art in the embodiment, the logarithmic amplifier circuit is not affected by temperature, and the stability of the logarithmic amplifier is high.
In order to further improve the stability of the logarithmic amplifier, specifically, the input voltage/current signal must be positive, a shielding box is required to be added during debugging, and important signal lines are protected by equal potential.
Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the invention, and such modifications and variations fall within the scope defined by the appended claims.
Claims (10)
1. A logarithmic amplifier, comprising:
the first sub-logarithmic amplifying circuit, the second sub-logarithmic amplifying circuit and the third sub-logarithmic amplifying circuit;
the first sub-logarithmic amplifying circuit comprises a first triode and a first operational amplifier, wherein one input end of the first operational amplifier is input with reference voltage, the other input end of the first operational amplifier is grounded, a collector electrode of the first triode is connected with one input end of the first operational amplifier, an emitter electrode of the first triode is connected with the output end of the first operational amplifier, and a base electrode of the first triode is grounded;
the second sub-logarithmic amplifying circuit comprises a second triode and a second operational amplifier, wherein an emitting electrode of the first triode is connected with a base electrode of the second triode, one input end of the second operational amplifier is connected with a detected unit and used as a current input of the circuit, the other input end of the second operational amplifier is connected with the base electrode of the second triode, and a collector electrode of the second triode is connected with an output end of the second operational amplifier;
the third sub-logarithmic amplifying circuit comprises a third triode, a fourth triode and a third operational amplifier, wherein an emitting electrode of the third triode is connected with an emitting electrode of the second triode, a base electrode and a collector electrode of the third triode are connected with an emitting electrode of the fourth triode, a base electrode of the fourth triode is grounded, a collector electrode of the fourth triode is connected to one input end of the third operational amplifier, the other input end of the third operational amplifier is grounded, and an output end of the third operational amplifier is used as an output end of the logarithmic amplifying circuit.
2. The logarithmic amplifier of claim 1, wherein the first sub-logarithmic amplifier circuit further comprises a first resistor and a second resistor, the first resistor and the second resistor being connected between the input reference voltage and an input of the first operational amplifier.
3. The logarithmic amplifier of claim 2, wherein the first sub-logarithmic amplifier circuit further comprises a first capacitor and a third resistor, one end of the first capacitor is connected to one input terminal of the first operational amplifier, and the other end of the first capacitor is connected to the output terminal of the first operational amplifier; the third resistor is connected between the output end of the first operational amplifier and the base electrode of the second triode.
4. The logarithmic amplifier of claim 1, wherein the second sub-logarithmic amplifier circuit further comprises a second capacitor, one end of the second capacitor is connected to the collector of the second transistor, and the other end of the second capacitor is connected to the output of the second operational amplifier.
5. The logarithmic amplifier of claim 4, wherein the second sub-logarithmic amplifier circuit further comprises a fourth resistor connected between the current input and one input of the second operational amplifier.
6. The logarithmic amplifier of claim 5, wherein the second sub-logarithmic amplifier circuit further comprises a diode and a third capacitor connected in parallel, the cathode of the diode being connected to ground.
7. The logarithmic amplifier of claim 6, wherein the second sub-logarithmic amplifier circuit further comprises a fifth resistor connected between the output of the second operational amplifier and the anode of the diode.
8. The logarithmic amplifier of claim 1, wherein the third sub-logarithmic amplifier circuit further comprises a fourth capacitor and a sixth resistor connected in parallel, one end of the sixth resistor is connected to the collector of the fourth transistor, and the other end of the sixth resistor is connected to the output of the third sub-logarithmic amplifier circuit.
9. The logarithmic amplifier of claim 8, wherein the third sub-logarithmic amplifier circuit further comprises a fifth capacitor and a seventh resistor connected in parallel, one end of the fifth capacitor and one end of the seventh resistor are connected to ground, and the other end of the fifth capacitor and the other end of the seventh resistor are connected to the output end of the third sub-logarithmic amplifier circuit.
10. The logarithmic amplifier of claim 9, wherein the third sub-logarithmic amplifier circuit further comprises an eighth resistor, one end of the eighth resistor is connected to the output terminal of the third operational amplifier, and the other end of the eighth resistor is connected to the seventh resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011344489.6A CN112367056A (en) | 2020-11-26 | 2020-11-26 | Logarithmic amplifier |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202011344489.6A CN112367056A (en) | 2020-11-26 | 2020-11-26 | Logarithmic amplifier |
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| CN112367056A true CN112367056A (en) | 2021-02-12 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1028023A (en) * | 1996-07-11 | 1998-01-27 | Fujitsu Ten Ltd | Variable gain amplifier |
| CN1254980A (en) * | 1998-11-25 | 2000-05-31 | 中国科学院空间科学与应用研究中心 | Logarithmic amplifier circuit |
| CN103095232A (en) * | 2013-01-08 | 2013-05-08 | 上海创远仪器技术股份有限公司 | Dual slope logarithmic amplifier circuit structure |
-
2020
- 2020-11-26 CN CN202011344489.6A patent/CN112367056A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH1028023A (en) * | 1996-07-11 | 1998-01-27 | Fujitsu Ten Ltd | Variable gain amplifier |
| CN1254980A (en) * | 1998-11-25 | 2000-05-31 | 中国科学院空间科学与应用研究中心 | Logarithmic amplifier circuit |
| CN103095232A (en) * | 2013-01-08 | 2013-05-08 | 上海创远仪器技术股份有限公司 | Dual slope logarithmic amplifier circuit structure |
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