CN111628052A - Preparation method of passivated contact battery - Google Patents
Preparation method of passivated contact battery Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title claims abstract description 24
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 122
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 122
- 239000010703 silicon Substances 0.000 claims abstract description 122
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 71
- 238000000151 deposition Methods 0.000 claims abstract description 47
- 238000002161 passivation Methods 0.000 claims abstract description 45
- 238000000034 method Methods 0.000 claims abstract description 39
- 230000003647 oxidation Effects 0.000 claims abstract description 36
- 238000007254 oxidation reaction Methods 0.000 claims abstract description 36
- 238000004140 cleaning Methods 0.000 claims abstract description 22
- 230000008021 deposition Effects 0.000 claims abstract description 13
- 238000001465 metallisation Methods 0.000 claims abstract description 4
- 238000010276 construction Methods 0.000 claims abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 39
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 39
- 229920005591 polysilicon Polymers 0.000 claims description 33
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 claims description 27
- 239000000758 substrate Substances 0.000 claims description 25
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 18
- 239000007789 gas Substances 0.000 claims description 13
- 230000003667 anti-reflective effect Effects 0.000 claims description 12
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 12
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims description 9
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 claims description 9
- 229910052757 nitrogen Inorganic materials 0.000 claims description 9
- 239000001301 oxygen Substances 0.000 claims description 9
- 229910052760 oxygen Inorganic materials 0.000 claims description 9
- 238000000231 atomic layer deposition Methods 0.000 claims description 6
- 229910000449 hafnium oxide Inorganic materials 0.000 claims description 6
- WIHZLLGSGQNAGK-UHFFFAOYSA-N hafnium(4+);oxygen(2-) Chemical compound [O-2].[O-2].[Hf+4] WIHZLLGSGQNAGK-UHFFFAOYSA-N 0.000 claims description 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical group [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims description 4
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052796 boron Inorganic materials 0.000 claims description 4
- 229910052733 gallium Inorganic materials 0.000 claims description 4
- 229910052738 indium Inorganic materials 0.000 claims description 4
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 4
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- 238000010438 heat treatment Methods 0.000 claims description 3
- 238000004519 manufacturing process Methods 0.000 claims description 3
- 229910052698 phosphorus Inorganic materials 0.000 claims description 3
- 239000011574 phosphorus Substances 0.000 claims description 3
- 238000007747 plating Methods 0.000 claims description 3
- 238000007650 screen-printing Methods 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- BHEPBYXIRTUNPN-UHFFFAOYSA-N hydridophosphorus(.) (triplet) Chemical group [PH] BHEPBYXIRTUNPN-UHFFFAOYSA-N 0.000 claims 1
- 229910052716 thallium Inorganic materials 0.000 claims 1
- BKVIYDNLLOSFOA-UHFFFAOYSA-N thallium Chemical compound [Tl] BKVIYDNLLOSFOA-UHFFFAOYSA-N 0.000 claims 1
- 238000005498 polishing Methods 0.000 abstract description 7
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- 229910000073 phosphorus hydride Inorganic materials 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 229910021417 amorphous silicon Inorganic materials 0.000 description 3
- 229910000085 borane Inorganic materials 0.000 description 3
- 238000005137 deposition process Methods 0.000 description 3
- 239000001257 hydrogen Substances 0.000 description 3
- 229910052739 hydrogen Inorganic materials 0.000 description 3
- 229910000077 silane Inorganic materials 0.000 description 3
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 2
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 2
- 229910017604 nitric acid Inorganic materials 0.000 description 2
- 238000007517 polishing process Methods 0.000 description 2
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 description 1
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- 230000005540 biological transmission Effects 0.000 description 1
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- 238000010586 diagram Methods 0.000 description 1
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- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000013082 photovoltaic technology Methods 0.000 description 1
- 239000011148 porous material Substances 0.000 description 1
- 238000002310 reflectometry Methods 0.000 description 1
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- H01L31/1804—
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- H01L31/02167—
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- H01L31/02168—
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- H01L31/022425—
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- H01L31/0684—
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- H01L31/1868—
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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Abstract
The invention discloses a preparation method of a passivated contact battery, which comprises the following construction steps: the method comprises the following steps of S1 silicon-based layer double-sided texturing, S2 silicon-based layer double-sided thermal oxidation, S3 front-side doped polycrystalline silicon layer deposition, S4 silicon-based layer back cleaning, S5 secondary thermal oxidation, S6 back-side doped polycrystalline silicon layer deposition, S7 tertiary thermal oxidation, S8 cleaning, S9 front-side passivation layer and front-side antireflection layer deposition, S10 secondary cleaning, S11 back-side passivation layer and back-side antireflection layer deposition, and S12 metallization; the preparation process is simple, and the back polishing treatment is not required to be carried out by using an acid solution or an alkali solution, so that the conversion efficiency of the battery is improved.
Description
Technical Field
The invention relates to the technical field of crystalline silicon solar cells, in particular to a preparation method of a passivated contact cell.
Background
With the development of photovoltaic technology, the passivation contact technology can obtain good passivation effect on both p-type and n-type surfaces, and meanwhile, due to carrier transmission mechanisms such as tunneling, a passivation contact layer can have the characteristic of low contact resistance with the surface of a silicon wafer, and the passivation contact layer serves as a surface passivation layer and a carrier leading-out connection layer. At present, the preparation process of the passivation contact layer generally comprises the steps of firstly generating a 1-3nm silicon oxide layer on the surface of silicon through oxidation, then depositing an intrinsic polycrystalline silicon/amorphous silicon layer, and finally doping the polycrystalline silicon/amorphous silicon layer. The silicon oxide layer can be prepared by nitric acid oxidation, ozone oxidation, ultraviolet light oxidation, thermal oxidation and other methods; the intrinsic polysilicon/amorphous silicon layer can be generally prepared by a Low Pressure Chemical Vapor Deposition (LPCVD), a Plasma Enhanced Chemical Vapor Deposition (PECVD), or the like; doping is usually achieved by using a diffusion furnace and ion implantation.
The back surface of the existing Topcon double-sided battery structure is a polished plane or is similar to the polished plane, so that on one hand, the specific surface area of the back surface is reduced, and further, the dark saturation current of the back surface is reduced; on the other hand, the reflectivity after polishing is improved, so that the short-circuit current and the efficiency of the battery are improved. Meanwhile, unpolished planes have been considered to have problems in the process of depositing silicon oxide, and uneven deposition is liable to form pores.
However, the technology mainly has the following two problems in process implementation:
firstly, a special back acid polishing or alkali polishing process is required, the process difficulty is increased, and the battery cost is increased;
secondly, it is considered that the difficulty of passivation without polishing is caused by the fact that the nano-scale flatness of the silicon wafer surface is changed during the polishing process, particularly the acid process, which makes passivation difficult and tends to form voids.
Disclosure of Invention
In order to solve the technical problems, the invention provides a preparation method of a passivated contact battery, which is simple in preparation process, does not need to use acid solution or alkali solution for back polishing treatment, and improves the conversion efficiency of the battery.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a preparation method of a passivated contact battery comprises the following construction steps:
s1 silicon-based layer double-sided texturing: texturing the silicon base layer by using a KOH solution, and forming a plurality of textured surfaces with pyramid structures on two sides of the silicon base layer;
s2 double-sided thermal oxidation of silicon substrate: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace to carry out double-sided thermal oxidation to prepare a front silicon oxide layer and a back oxide layer;
s3 depositing a front doped polysilicon layer: depositing a front-side doped polycrystalline silicon layer on one side of the front-side silicon oxide layer, which is far away from the silicon substrate, wherein the front-side doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s4 silicon base layer back cleaning: cleaning and removing the back oxide layer and the silicon-wrapped layer in the step S2 by using an HF solution;
s5 secondary thermal oxidation: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace to carry out thermal oxidation on the back of the silicon substrate to prepare a back silicon oxide layer;
s6 depositing a back-doped polysilicon layer: depositing a back-doped polycrystalline silicon layer on one side of the back silicon oxide layer, which is far away from the silicon substrate, wherein the back-doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s7 three thermal oxidations: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace for thermal oxidation to obtain an oxide layer;
s8 cleaning: removing the oxide layer in the step S7 by cleaning with HF solution;
s9 front passivation layer and front anti-reflective layer deposition: depositing a front passivation layer on one side of the front doped polycrystalline silicon layer, which is far away from the silicon substrate, by an atomic layer deposition method, and depositing a front antireflection layer on one side of the front passivation layer, which is far away from the front doped polycrystalline silicon layer, by a plasma enhanced chemical vapor deposition method;
s10 secondary cleaning: removing the wraparound plating layer and the surface oxide layer generated in the step S9 by cleaning with an HF solution;
s11 back passivation layer and back anti-reflective layer deposition: depositing a back passivation layer on one side of the back doped polycrystalline silicon layer away from the silicon substrate by an atomic layer deposition method or a plasma enhanced chemical vapor deposition method, and depositing a back antireflection layer on one side of the back passivation layer away from the back doped polycrystalline silicon layer by the plasma enhanced chemical vapor deposition method;
s12 metallization: and forming electric connection by adopting screen printing of double-sided electrodes and performing heat treatment.
The preparation method of the passivated contact battery provided by the invention has the advantages that the preparation process is simple, the back polishing treatment by using acid solution or alkali solution is not needed, and the conversion efficiency of the battery is improved.
On the basis of the technical scheme, the following improvements can be made:
preferably, the p-type silicon layer is prepared by the following steps:
introduction of SiH4、H2And B2H6And the mixed gas is used for depositing a p-type silicon layer on the side, away from the silicon substrate, of the front silicon oxide layer or the back silicon oxide layer by a plasma enhanced chemical vapor deposition method.
As a preferred scheme, the n-type silicon layer is prepared by the following preparation steps:
introduction of SiH4、H2And pH3And the mixed gas is used for depositing an n-type silicon layer on the side, away from the silicon substrate, of the front silicon oxide layer or the back silicon oxide layer by a plasma enhanced chemical vapor deposition method.
Preferably, the P-type doping of the P-type silicon layer is boron-doped silicon (Si: B), gallium-doped silicon (Si: Ga), indium-doped silicon (Si: In), aluminum-doped silicon (SiN: A1) or thallium-doped silicon (Si: T1), and the n-type doping of the n-type silicon layer is phosphorus-doped silicon (Si: P).
Preferably, when the front-side doped polysilicon layer is a p-type silicon layer, the back-side doped polysilicon layer is an n-type silicon layer, and the front-side passivation layer is one or two of an aluminum oxide layer and a silicon oxide layer.
Preferably, when the front-side doped polysilicon layer is an n-type silicon layer, the back-side doped polysilicon layer is a P-type silicon layer, and the front-side passivation layer is a stack of one or two of aluminum oxide and hafnium oxide.
Preferably, when the back-doped polysilicon layer is an n-type silicon layer, the front-doped polysilicon layer is a P-type silicon layer, and the back passivation layer is a stack of one or two of aluminum oxide and hafnium oxide.
Preferably, when the back-doped polysilicon layer is a p-type silicon layer, the front-doped polysilicon layer is an n-type silicon layer, and the back passivation layer is one or a stack of two of aluminum oxide and silicon oxide layers.
Preferably, the front antireflection layer and the back antireflection layer are both silicon nitride antireflection film layers.
Preferably, the silicon-based layer is doped n-type or p-type, and when the silicon-based layer is doped n-type, the silicon-based layer is doped with phosphorus, and when the silicon-based layer is doped p-type, the silicon-based layer is doped with boron, aluminum, gallium or indium.
Drawings
Fig. 1 is a block diagram of a passivated contact battery provided by an embodiment of the invention;
wherein: 1. the structure comprises a front electrode, 2 a front antireflection layer, 3 a front passivation layer, 4 a front doped polysilicon layer, 5 a front silicon oxide layer, 6 a silicon substrate, 7 a back silicon oxide layer, 8 a back doped polysilicon layer, 9 a back passivation layer, 10 a back antireflection layer and 11 a back electrode.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
To achieve the object of the present invention, as shown in fig. 1, the method for manufacturing a passivated contact cell in this embodiment comprises the following steps:
s1 silicon-based layer double-sided texturing: texturing the silicon base layer by using a KOH solution, and forming a plurality of textured surfaces with pyramid structures on two sides of the silicon base layer;
s2 double-sided thermal oxidation of silicon substrate: when the temperature in the tubular thermal oxidation furnace is 500-800 ℃, introducing dry oxygen and nitrogen to carry out double-sided thermal oxidation to prepare a front-side silicon oxide layer and a back-side oxide layer, wherein the thicknesses of the front-side silicon oxide layer and the back-side oxide layer are both 1-30 nm;
s3 depositing a front doped polysilicon layer: depositing a front-side doped polycrystalline silicon layer on one side of the front-side silicon oxide layer, which is far away from the silicon substrate, wherein the front-side doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s4 silicon base layer back cleaning: cleaning and removing the back oxide layer and the silicon-wrapped layer in the step S2 by using an HF solution;
s5 secondary thermal oxidation: when the temperature in the tubular thermal oxidation furnace is 500-800 ℃, introducing dry oxygen and nitrogen to carry out thermal oxidation on the back of the silicon substrate to prepare a back silicon oxide layer, wherein the thickness of the back silicon oxide layer is 1-30 nm;
s6 depositing a back-doped polysilicon layer: depositing a back-doped polycrystalline silicon layer on one side of the back silicon oxide layer, which is far away from the silicon substrate, wherein the back-doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s7 three thermal oxidations: when the temperature in the tubular thermal oxidation furnace is 500-800 ℃, dry oxygen and nitrogen are introduced for thermal oxidation to obtain an oxide layer, so that the doped elements are fully activated;
s8 cleaning: removing the oxide layer in the step S7 by cleaning with HF solution;
s9 front passivation layer and front anti-reflective layer deposition: depositing a front passivation layer on one side of the front doped polycrystalline silicon layer, which is far away from the silicon substrate, by an atomic layer deposition method, and depositing a front antireflection layer on one side of the front passivation layer, which is far away from the front doped polycrystalline silicon layer, by a plasma enhanced chemical vapor deposition method;
s10 secondary cleaning: removing the wraparound plating layer and the surface oxide layer generated in the step S9 by cleaning with an HF solution;
s11 back passivation layer and back anti-reflective layer deposition: depositing a back passivation layer on one side of the back doped polycrystalline silicon layer away from the silicon substrate by an atomic layer deposition method or a plasma enhanced chemical vapor deposition method, and depositing a back antireflection layer on one side of the back passivation layer away from the back doped polycrystalline silicon layer by the plasma enhanced chemical vapor deposition method;
s12 metallization: and forming electric connection by adopting screen printing of double-sided electrodes and performing heat treatment.
The preparation method of the passivated contact battery provided by the invention has the advantages that the preparation process is simple, the back polishing treatment by using acid solution or alkali solution is not needed, and the conversion efficiency of the battery is improved.
In some embodiments, the p-type silicon layer is prepared by:
introduction of SiH4、H2And B2H6And the mixed gas is used for depositing a p-type silicon layer on the side, away from the silicon substrate, of the front silicon oxide layer or the back silicon oxide layer by a plasma enhanced chemical vapor deposition method.
Using the above example, the frequency was 13.56MHz, SiH in Plasma Enhanced Chemical Vapor Deposition (PECVD)4And H2At a flow rate of 2-100sccm, introducing B2H6Then, in B2H6And H2Depositing a p-type silicon layer with the deposition thickness of 30-230nm under the flow rate of the mixed gas of 1-30sccm, and introducing B2H6Is in the volume percentage of B2H6And H21-4% of the mixed gas;
the front side doped polycrystalline silicon layer and the back side doped polycrystalline silicon layer are deposited by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and corresponding doping gases, such as borane or phosphine, are simultaneously blended in addition to silane and hydrogen in the deposition process during doping, so that the diffusion caused by a diffusion mode is avoided.
In some embodiments, the n-type silicon layer is prepared by the following preparation steps:
introduction of SiH4、H2And pH3MixingAnd gas, wherein an n-type silicon layer is deposited on the side of the front silicon oxide layer or the back silicon oxide layer far away from the silicon substrate by a plasma enhanced chemical vapor deposition method.
Using the above example, the frequency was 13.56MHz, SiH in Plasma Enhanced Chemical Vapor Deposition (PECVD)4And H2The flow rate of (2-100 sccm) respectively, and introducing PH3Then, at pH3And H2Depositing an n-type silicon layer with a deposition thickness of 30-230nm and a pH value under a mixed gas flow of 1-30sccm3Is in volume percent of PH3And H21-4% of the mixed gas;
the front side doped polycrystalline silicon layer and the back side doped polycrystalline silicon layer are deposited by a Plasma Enhanced Chemical Vapor Deposition (PECVD) method, and corresponding doping gases, such as borane or phosphine, are simultaneously blended in addition to silane and hydrogen in the deposition process during doping, so that the diffusion caused by a diffusion mode is avoided.
In some embodiments, the P-type doping of the P-type silicon layer is boron-doped silicon (Si: B), gallium-doped silicon (Si: Ga), indium-doped silicon (Si: In), aluminum-doped silicon (SiN: A1), or thallium-doped silicon (Si: T1), and the n-type doping of the n-type silicon layer is phosphorus-doped silicon (Si: P).
In some embodiments, when the front-side doped polysilicon layer is a p-type silicon layer, the back-side doped polysilicon layer is an n-type silicon layer, and the front-side passivation layer is either an aluminum oxide layer or a silicon oxide layer or a stack of both.
In some embodiments, when the front-side doped polysilicon layer is an n-type silicon layer, the back-side doped polysilicon layer is a P-type silicon layer, and the front-side passivation layer is a stack of any one or both of aluminum oxide and hafnium oxide.
In some embodiments, when the back-side doped polysilicon layer is an n-type silicon layer, the front-side doped polysilicon layer is a P-type silicon layer, and the back-side passivation layer is a stack of any one or both of aluminum oxide and hafnium oxide.
In some embodiments, when the back-doped polysilicon layer is a p-type silicon layer, the front-doped polysilicon layer is an n-type silicon layer and the back passivation layer is a stack of either or both of aluminum oxide and silicon oxide layers.
In some embodiments, both the front anti-reflective layer and the back anti-reflective layer are silicon nitride anti-reflective film layers.
In some embodiments, the silicon-based layer is n-doped or p-doped, and is doped with phosphorus when the silicon-based layer is n-doped and boron, aluminum, gallium, or indium when the silicon-based layer is p-doped.
A passivated contact cell structure comprising: the electrode comprises a front electrode 1 and a back electrode 11, the front electrode 1 penetrates through the front antireflection layer 2 and the front passivation layer 3 and is in contact with the front doped polycrystalline silicon layer 4, the back electrode 11 penetrates through the back antireflection layer 10 and the back passivation layer 9 and is in contact with the front doped polycrystalline silicon layer 4, and the back electrode 11 penetrates through the back antireflection layer 10 and the back passivation layer 9 and is in contact with the back doped polycrystalline silicon layer 8.
The battery with the passivated contact prepared by the invention has the advantages that the battery conversion efficiency is improved by 1% compared with the battery with the passivated contact on the front surface and the rear surface, so that the battery conversion efficiency of the battery with the passivated contact prepared by the invention is improved.
The preparation method of the passivated contact battery provided by the invention has the following technical effects:
1) according to the preparation method of the passivated contact cell, the deposition method of the front-side doped polycrystalline silicon layer and the back-side doped polycrystalline silicon layer adopts a Plasma Enhanced Chemical Vapor Deposition (PECVD), and corresponding doping gases, such as borane or phosphorane and the like, are simultaneously blended in the deposition process except introducing silane and hydrogen during doping, so that the diffusion caused by adopting a diffusion mode is avoided;
2) according to the preparation method of the passivated contact battery, provided by the invention, after the front-side silicon oxide and the front-side doped polycrystalline silicon layer are deposited, HF single-side cleaning is carried out to remove the oxide layer on the back side and the edge silicon-coated layer, oxidation is carried out again, and the back-side silicon oxide layer is deposited, and the back side of the battery is not polished in the process, namely, the back side is not polished by adopting a nitric acid and hydrofluoric acid mixed liquid or an alkaline solution, so that the preparation efficiency of the passivated contact battery is improved;
3) the preparation method of the passivated contact battery provided by the invention has the advantages that the process steps are simple, the thermal diffusion process is not carried out, and the preparation efficiency of the passivated contact battery is improved.
The above is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, many variations and modifications can be made without departing from the inventive concept of the present invention, which falls into the protection scope of the present invention.
Claims (10)
1. A preparation method of a passivated contact battery is characterized by comprising the following construction steps:
s1 silicon-based layer double-sided texturing: texturing the silicon base layer by using a KOH solution, and forming a plurality of textured surfaces with pyramid structures on two sides of the silicon base layer;
s2 double-sided thermal oxidation of silicon substrate: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace to carry out double-sided thermal oxidation to prepare a front silicon oxide layer and a back oxide layer;
s3 depositing a front doped polysilicon layer: depositing a front-side doped polycrystalline silicon layer on one side of the front-side silicon oxide layer, which is far away from the silicon substrate, wherein the front-side doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s4 silicon base layer back cleaning: cleaning and removing the back oxide layer and the silicon-wrapped layer in the step S2 by using an HF solution;
s5 secondary thermal oxidation: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace to carry out thermal oxidation on the back of the silicon substrate to prepare a back silicon oxide layer;
s6 depositing a back-doped polysilicon layer: depositing a back-doped polycrystalline silicon layer on one side of the back silicon oxide layer, which is far away from the silicon substrate, wherein the back-doped polycrystalline silicon layer is a p-type silicon layer or an n-type silicon layer;
s7 three thermal oxidations: introducing dry oxygen and nitrogen into a tubular thermal oxidation furnace for thermal oxidation to obtain an oxide layer;
s8 cleaning: removing the oxide layer in the step S7 by cleaning with HF solution;
s9 front passivation layer and front anti-reflective layer deposition: depositing a front passivation layer on one side of the front doped polycrystalline silicon layer, which is far away from the silicon substrate, by an atomic layer deposition method, and depositing a front antireflection layer on one side of the front passivation layer, which is far away from the front doped polycrystalline silicon layer, by a plasma enhanced chemical vapor deposition method;
s10 secondary cleaning: removing the wraparound plating layer and the surface oxide layer generated in the step S9 by cleaning with an HF solution;
s11 back passivation layer and back anti-reflective layer deposition: depositing a back passivation layer on one side of the back doped polycrystalline silicon layer away from the silicon substrate by an atomic layer deposition method or a plasma enhanced chemical vapor deposition method, and depositing a back antireflection layer on one side of the back passivation layer away from the back doped polycrystalline silicon layer by the plasma enhanced chemical vapor deposition method;
s12 metallization: and forming electric connection by adopting screen printing of double-sided electrodes and performing heat treatment.
2. A method of manufacturing a passivated contact cell according to claim 1 wherein the p-type silicon layer is prepared by the steps of:
introduction of SiH4、H2And B2H6And the mixed gas is used for depositing a p-type silicon layer on the side, away from the silicon substrate, of the front silicon oxide layer or the back silicon oxide layer by a plasma enhanced chemical vapor deposition method.
3. Method for the preparation of a passivated contact cell according to claim 1 wherein the n-type silicon layer is prepared by the following preparation steps:
introduction of SiH4、H2And pH3And the mixed gas is used for depositing an n-type silicon layer on the side, away from the silicon substrate, of the front silicon oxide layer or the back silicon oxide layer by a plasma enhanced chemical vapor deposition method.
4. A method of manufacturing a passivated contact cell according to any of claims 1-3 wherein the p-type doping of the p-type silicon layer is boron, gallium, indium, aluminum or thallium doping and the n-type doping of the n-type silicon layer is phosphorous doping.
5. The method of claim 1, wherein when the front doped polysilicon layer is a p-type silicon layer, the back doped polysilicon layer is an n-type silicon layer, and the front passivation layer is one or a combination of aluminum oxide and silicon oxide.
6. The method of claim 1, wherein when the front doped polysilicon layer is an n-type silicon layer, the back doped polysilicon layer is a P-type silicon layer, and the front passivation layer is a stack of one or both of aluminum oxide and hafnium oxide.
7. The method of claim 1, wherein when the back doped polysilicon layer is an n-type silicon layer, the front doped polysilicon layer is a P-type silicon layer, and the back passivation layer is a stack of one or both of aluminum oxide and hafnium oxide.
8. The method of claim 1, wherein when the back doped polysilicon layer is a p-type silicon layer, the front doped polysilicon layer is an n-type silicon layer and the back passivation layer is a stack of either or both of aluminum oxide and silicon oxide layers.
9. The method of claim 1, wherein both the front side anti-reflective layer and the back side anti-reflective layer are silicon nitride anti-reflective film layers.
10. The method of claim 1, wherein the silicon-based layer is n-doped or p-doped, and wherein the silicon-based layer is doped with phosphorus when n-doped and boron, aluminum, gallium, or indium when p-doped.
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