CN210926046U - Solar cell - Google Patents
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- CN210926046U CN210926046U CN201921837809.4U CN201921837809U CN210926046U CN 210926046 U CN210926046 U CN 210926046U CN 201921837809 U CN201921837809 U CN 201921837809U CN 210926046 U CN210926046 U CN 210926046U
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- 239000010703 silicon Substances 0.000 claims description 15
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- 229910052593 corundum Inorganic materials 0.000 claims description 7
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Photovoltaic Devices (AREA)
Abstract
The application provides a solar cell, include semiconductor substrate, metal electrode and stack gradually the setting and be in the tunneling layer and the doping polycrystalline silicon layer of semiconductor substrate side surface, the doping polycrystalline silicon layer has the setting and is in first portion between metal electrode and the tunneling layer, be located the second part of first portion side, the doping concentration of first portion is greater than the doping concentration of second part. The preparation of the doped polycrystalline silicon layer is simpler, and the first part with higher doping concentration is obtained through local doping, so that the interface recombination and the contact resistance of the metal electrode position are effectively reduced; the second part reduces the absorption of light while passivating the non-electrode area due to the lower doping concentration.
Description
Technical Field
The application relates to the technical field of solar power generation, in particular to a solar cell.
Background
With the rapid development of photovoltaic technology, the market demand for efficient cells and components is also increasing. For a crystalline silicon battery, a passivated antireflection layer is additionally arranged on the front surface of the crystalline silicon battery, and a front surface electrode penetrates through the passivated antireflection layer to be in contact with a silicon substrate; a local contact back-passivated cell has also been disclosed in the art, i.e., the recombination of surface carriers is reduced by the back passivation film, improving the cell conversion efficiency.
In the industry, a passivation structure combining a tunneling oxide layer and a polysilicon film layer is also disclosed, which can reduce recombination loss caused by direct contact between a metal electrode and a silicon substrate and reduce contact resistance, and has attracted much attention recently. However, the polysilicon film layer in the passivation structure has a strong light absorption coefficient, so that the short-circuit current of the battery can be reduced, and the improvement of the battery efficiency is limited. At present, the thickness of a polysilicon film layer is reduced as much as possible to reduce the current loss on the premise of ensuring that metal electrode slurry does not burn through a tunneling oxide layer and the metal electrode and polysilicon film layer form good ohmic contact; or only the metal electrode area of the battery adopts the passivation structure, so that the light absorption and passivation effects of the battery are difficult to be considered. The industry also discloses that the polycrystalline silicon doped layer on the tunneling layer is arranged to be a first area and a second area with different thicknesses, the metal electrode is positioned on the first area with larger thickness, but the preparation process of the polycrystalline silicon doped layer with different thicknesses is more complicated; and along with the reduction of the whole thickness of the film layer, the thickness of different areas of the polycrystalline silicon doped layer is more difficult to set in a differentiation mode.
In view of the above, there is a need for a new solar cell.
SUMMERY OF THE UTILITY MODEL
The application aims to provide a solar cell, which can improve the surface passivation performance and the conversion efficiency and has a simpler process.
In order to achieve the above object, an embodiment of the present application provides a solar cell, including a semiconductor substrate, a metal electrode, and a tunneling layer and a doped polysilicon layer sequentially stacked on a surface of one side of the semiconductor substrate, where the doped polysilicon layer has a first portion disposed between the metal electrode and the tunneling layer, and a second portion located beside the first portion, and a doping concentration of the first portion is greater than a doping concentration of the second portion.
As a further improvement of the embodiment of the application, the doping concentration of the first part is 1E 20-2E 20cm-3(ii) a The doping concentration of the second part is 2E 19-8E 19cm-3。
As a further improvement of the embodiment of the application, the thickness of the doped polycrystalline silicon layer is set to be 40-300 nm.
As a further improvement of the embodiment of the application, the tunneling layer is a silicon oxide film or a silicon oxynitride film or a composite film formed by mutually laminating the silicon oxide film and the silicon oxynitride film, and the thickness of the tunneling layer is set to be 0.5-3 nm.
As a further improvement of the embodiment of the application, the thickness of the tunneling layer is set to be 1-2 nm.
As a further improvement of the embodiment of the present application, the solar cell further includes an antireflection layer disposed on a surface of the doped polysilicon layer on a side facing away from the semiconductor substrate, and the metal electrode penetrates through the antireflection layer and is in contact with the first portion.
As a further improvement of the embodiment of the present application, the antireflection layer includes a first antireflection film layer, is stacked and arranged to deviate from the first antireflection film layer at a second antireflection film layer on the surface of one side of the semiconductor substrate, the thickness of the first antireflection film layer is smaller than that of the second antireflection film layer, and the refractive index of the first antireflection film layer is greater than that of the second antireflection film layer.
As a further improvement of the embodiment of the present application, the solar cell is configured as a bifacial cell; the tunneling layer and the doped polycrystalline silicon layer are sequentially stacked on the back of the semiconductor substrate.
As a further improvement of the embodiment of the present application, a diffusion layer is formed on the front surface of the semiconductor substrate, and the solar cell further includes a front passivation layer and a front antireflection layer stacked on the surface of the diffusion layer, and a front electrode penetrating through the front passivation layer and the front antireflection layer and contacting with the diffusion layer.
As a further improvement of the embodiment of the application, the diffusion layer comprises a heavy expansion region located under the front electrode and a light expansion region located beside the heavy expansion region, the sheet resistance of the heavy expansion region is set to be 30-90 ohm/squ, and the sheet resistance of the light expansion region is set to be 110-150 ohm/squ.
As a further improvement of the embodiment of the application, the front passivation layer is arranged to be Al2O3Film layer of said Al2O3The thickness of the film layer is set to be 3-10 nm.
As a further improvement of the embodiment of the application, the semiconductor substrate is an N-type silicon wafer, and the resistivity of the semiconductor substrate is set to be 0.5-6 omega-cm.
The beneficial effect of this application is: by adopting the solar cell, the preparation of the doped polycrystalline silicon layer is simpler, the first part with higher doping concentration is obtained by local doping, and the interface recombination and the contact resistance of the metal electrode position are effectively reduced; the second part has a smaller absorption coefficient to light due to lower doping concentration, so that the absorption to light is reduced on the basis of not changing the doped polycrystalline silicon layer, and the conversion efficiency of the solar cell is improved.
Drawings
FIG. 1 is a schematic structural diagram of a first embodiment of a solar cell of the present application;
FIG. 2 is a schematic structural diagram of a second embodiment of a solar cell of the present application;
fig. 3 is a schematic main flow chart of a method for manufacturing a solar cell according to the present application.
10-a semiconductor substrate; 11-a diffusion layer; 111-a re-expansion region; 112-a light expansion region; 20-a tunneling layer; 30-doping a polysilicon layer; 31-a first part; 32-a second portion; 40-an anti-reflection layer; 50-a metal electrode; 60-front passivation layer; 70-front antireflection layer, 80-front electrode.
Detailed Description
The present application will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the above embodiments, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the present embodiments are included in the scope of the present invention.
Referring to fig. 1, a solar cell 100 provided in the present application includes a semiconductor substrate 10, a tunneling layer 20, a doped polysilicon layer 30, an anti-reflective layer 40, and a metal electrode 50 penetrating the anti-reflective layer 40 and contacting the doped polysilicon layer 30, which are sequentially stacked on a surface of one side of the semiconductor substrate 10.
The tunneling layer 20 can isolate the metal electrode 50 from contacting the semiconductor substrate 10 without affecting current transfer, and in combination with the doped polysilicon layer 30, improves the surface passivation effect of the semiconductor substrate 10 and reduces the reverse saturation current J0. The doped polysilicon layer 30 has a first portion 31 and a second portion 32 beside the first portion 31, the doping concentration of the first portion 31 is greater than that of the second portion 32, so that the absorption coefficient of the second portion 32 for incident light is smaller than that of the first portion 31, and the metal electrode 50 is disposed on the first portion 31. That is, the first portion 31 is correspondingly disposed on the electrode region of the semiconductor substrate 10, which is located between the metal electrode 50 and the tunneling layer 20; the second portion 32 is disposed in a non-electrode region of the semiconductor substrate 10, and the doped polysilicon layer 30 has a different doping concentration with respect to the electrode region and the non-electrode region, so that the recombination loss and the contact resistance at the position of the metal electrode 50 can be reduced, and the light absorption effect of the doped polysilicon layer 30 on the non-electrode region can be reduced. The thicknesses of the first part 31 and the second part 32 are consistent, and the electrode region and the non-electrode region with different light absorption properties can be prepared without locally etching the partially doped polysilicon layer 30 of the non-electrode region.
The tunneling layer 20 is configured to oxidizeThe light-emitting diode comprises a silicon film or a silicon oxynitride film or a composite film obtained by mutually laminating the silicon oxide film and the silicon oxynitride film, wherein the thickness of the tunneling layer 20 is set to be 0.5-3 nm. More preferably, the thickness of the tunneling layer 20 is set to be 1 to 2 nm. The thickness of the doped polysilicon layer 30 is set to 40-300 nm, preferably 60-200 nm. Wherein the doping concentration of the first portion 31 is 1E 20-2E 20cm-3The sheet resistance is 20-70 ohm/squ; the doping concentration of the second part 32 is 2E 19-8E 19cm-3The sheet resistance is between 80-150 ohm/squ.
For improving the film performance and the antireflection effect of the antireflection layer 40, the burnthrough performance of the antireflection layer 40 is considered at the same time, and the antireflection layer 40 can be arranged to be a laminated or gradually-changed film structure through the adjustment of technological parameters such as gas flow, reaction time and temperature. Here, the antireflection layer 40 has a first antireflection film layer, a second antireflection film layer stacked and disposed on a surface of the first antireflection film layer facing away from the semiconductor substrate 10, a thickness of the first antireflection film layer is smaller than a thickness of the second antireflection film layer, and a refractive index of the first antireflection film layer is larger than a refractive index of the second antireflection film layer. The antireflection layer 40 is composed of a plurality of silicon nitride film layers with different refractive indexes and thicknesses, and the thickness is preferably 70-85 nm. Certainly, the antireflective layer 40 may also be provided with a silicon oxide film and a silicon oxynitride film with relatively small refractive index, and at this time, the thickness of the antireflective layer 40 needs to be increased appropriately, preferably 80-100 nm.
The solar cell 100 is a double-sided cell, the tunneling layer 20, the doped polysilicon layer 30, and the anti-reflection layer 40 are sequentially disposed on the back surface of the semiconductor substrate 10, and the metal electrode 50 is a back electrode of the solar cell 100. The front surface of the semiconductor substrate 10 is provided with a diffusion layer 11, the solar cell further comprises a front passivation layer 60, a front antireflection layer 70 and a front electrode 80 which are arranged on the front surface of the semiconductor substrate 10, the front passivation layer 60 and the front antireflection layer 70 are sequentially stacked on the surface of the diffusion layer 11, and the front electrode 80 penetrates through the front passivation layer 60 and the front antireflection layer 70 and is in ohmic contact with the diffusion layer 11. The metal electrode 50 and the front electrode 80 can be obtained by screen printing and high-temperature sintering corresponding slurry.
Here, the semiconductor substrate 10 is an N-type silicon wafer, and the resistivity of the semiconductor substrate 10 is set to 0.5 to 6 Ω · cm. The doped polysilicon layer 30 adopts N-type doped elements; the diffusion layer 11 is doped with a P-type doping element. The metal electrode 50 is preferably a silver electrode, that is, the conductive phase in the paste used for the back surface of the solar cell 100 is mainly metal silver; the front surface of the solar cell 100 may be printed with silver paste, silver aluminum paste or aluminum paste to obtain the front electrode 80.
The front passivation layer 60 may be provided as Al2O3Film layer of Al2O3The film layer is suitable for passivating the surface of the P-type diffusion layer 11 to avoid forming a reverse layer, and the Al2O3The thickness of the film layer is set to be 3-10 nm; the front anti-reflective layer 70 may be a SiNx film layer. When the semiconductor substrate 10 is set as a P-type silicon wafer and the front surface of the P-type silicon wafer is subjected to N-type diffusion, the front surface can be passivated and anti-reflection by directly adopting the SiNx film layer. The front anti-reflection layer 70 may also be provided with a laminated or gradually changed film structure, which is not described herein again.
Referring to fig. 2, this embodiment is distinguished from the previous embodiment by the following features: the diffusion layer 11 comprises a heavy diffusion region 111 located below the front electrode 80 and a light diffusion region 112 located beside the heavy diffusion region 111, the sheet resistance of the heavy diffusion region 111 is set to be 30-90 ohm/squ, and the sheet resistance of the light diffusion region is set to be 110-150 ohm/squ.
As shown in fig. 3, the actual manufacturing process of the solar cell 100 includes:
providing a semiconductor substrate 10, wherein the semiconductor substrate 10 is an N-type monocrystalline silicon wafer;
etching the surface of the semiconductor substrate 10 by using an alkaline solution to form a regular pyramid textured structure;
forming a diffusion layer 11 on the front surface of the semiconductor substrate 10 by diffusion;
by using HF/HNO3The mixed liquid is used for etching the edge of the semiconductor substrate 10Then, texturing is carried out on the back surface of the semiconductor substrate 10;
the tunneling layer 20 is prepared by a wet chemical method (HNO)3/O3/H2SO4+H2O2) Or growing a tunneling layer 20 with the thickness of 1-2 nm on the back surface of the semiconductor substrate 10 by a thermal oxidation method (LPCVD);
depositing a polycrystalline silicon (poly-Si) film layer on the surface of the tunneling layer 20, and then performing local doping on the polycrystalline silicon film layer to obtain a doped polycrystalline silicon layer 30, wherein the doped polycrystalline silicon layer 30 is provided with a first part 31 and a second part 32 which are adjacently arranged;
cleaning by using HF (hydrogen fluoride) to remove borosilicate glass and phosphosilicate glass (BSG and PSG), and depositing on the front surface of the semiconductor substrate 10 by using an ALD (atomic layer deposition) process to obtain a front passivation layer 60, wherein the deposition temperature is 180-280 ℃;
respectively manufacturing a front antireflection layer 70 and an antireflection layer 40 by using a PECVD (plasma enhanced chemical vapor deposition) process, wherein the thicknesses of the front antireflection layer 70 and the back antireflection layer 40 are 60-130 nm;
and screen printing and sintering to obtain the metal electrode 50 and the front electrode 80, wherein the peak temperature of sintering is set to be 750-800 ℃.
Wherein the polysilicon film layer is prepared by chemical vapor deposition process, and the reaction gas comprises SiH4、PH3And H2Wherein H is2Mainly for SiH4Diluting; SiH4And H2Is set to 1: 10-1: 250 of (a); SiH4With pH3Is set to 1: 0.1-1: 0.001; the reaction temperature is set to be 500-700 ℃. Preferably, SiH4And H2Is set to 1: 50-1: 150; SiH4With pH3Is set to 1: 0.1-1: 0.01; the reaction temperature is set to be 500-600 ℃, and the doping concentration of P element in the polycrystalline silicon film layer obtained by deposition is 2E 19-8E 19cm-3。
The step of "locally doping the polysilicon film layer" specifically includes: arranging Al (PO) on the local surface of the polycrystalline silicon film layer3)3A solid source, and heating and diffusing to obtain a doped polysilicon layer 30 with a diffusion temperature of800-950 ℃. The first portion 31 of the doped polysilicon layer 30 corresponds to Al (PO)3)3A diffusion region of a solid source, the doping concentration of P element in the first portion 31 is increased to 1E 20-2E 20cm-3. The heating diffusion process is also an annealing process, and the doped polysilicon layer 30 forms a more stable film structure through the annealing process. Of course, after the sintering of the metal electrode 50 and the front electrode 80 is completed, the solar cell 100 may be annealed again to improve the film performance and the conversion efficiency.
The step of "texturing the back surface of the semiconductor substrate 10" means etching the back surface of the diffused semiconductor substrate 10 with an alkali solution or an acid solution to obtain a corresponding textured structure, and for the single crystal silicon wafer, it is preferable to perform texturing with an alkali solution to obtain a regular pyramid structure. Compared with the existing back polishing process, although the back composition is slightly increased, the textured structure of the back can reduce the back reflectivity, increase the double-sided rate and improve the deposition and bonding performance of the film layer. Here, the improvement of the fill factor and the conversion efficiency of the solar cell 100 is facilitated by performing the secondary texturing of the back surface of the semiconductor substrate 10.
The diffusion layers 11 can be manufactured by different diffusion processes, and the electrical parameters of the solar cells 100 are different. See the following table:
| Group | Voc(mV) | Isc(A) | FF(％) | EFF(％) |
| example 1 | 706.4 | 9.764 | 82.34 | 23.25％ |
| Example 2 | 705.3 | 9.824 | 82.86 | 23.50％ |
| Comparative example | 684.3 | 9.773 | 80.62 | 22.07％ |
Wherein example 1 employs BBr3Diffusing the gaseous source on the front surface of the semiconductor substrate 10 to form a P-type doping layer, wherein the diffusion temperature is 950-1100 ℃; and then, obtaining the diffusion layer 11 by laser doping on a part of the region, wherein the diffusion layer 11 comprises a heavy diffusion region 111 corresponding to the laser doped region and a light diffusion region 112 located beside the heavy diffusion region 111. In the embodiment 2, another P-type doped layer is obtained by silk-screening a layer of boron paste on the front surface of the semiconductor substrate 10 and diffusing at high temperature; then, after the partial area is covered by a thin line mask corresponding to the metal electrode 50 pattern, the width of the thin line mask is 50-300 mu m, and HF/HNO is utilized3And etching and thinning the area without the shielding of the fine line mask in a solution back etching mode to obtain the diffusion layer 11, wherein the light expansion area 112 corresponds to the area subjected to etching and thinning. Here, the comparative example is a PERT cell prepared using the same N-type single crystal silicon wafer. Obviously, the solar cell 100 of the present application improves the open-circuit voltage and the fill factor through the structural optimization design, and compared with the conventional PERT cell, the conversion efficiency is significantly improved.
In summary, the solar cell 100 of the present application forms effective passivation on the surface of the semiconductor substrate 10 through the tunneling layer 20 and the doped polysilicon layer 30, so as to reduce the surface resistance; the preparation of the doped polysilicon layer 30 is simpler, and the first part 31 with higher doping concentration is obtained by local doping, so that the interface recombination and the contact resistance at the position of the metal electrode 50 are effectively reduced; the second portion 32 has a low absorption coefficient for light due to the low doping concentration, so that the absorption of incident light is reduced, which is beneficial to the improvement of the current and the conversion efficiency of the solar cell 100.
It should be understood that although the present description refers to embodiments, not every embodiment contains only a single technical solution, and such description is for clarity only, and those skilled in the art should make the description as a whole, and the technical solutions in the embodiments can also be combined appropriately to form other embodiments understood by those skilled in the art.
The above list of details is only for the concrete description of the feasible embodiments of the present application, they are not intended to limit the scope of the present application, and all equivalent embodiments or modifications that do not depart from the technical spirit of the present application are intended to be included within the scope of the present application.
Claims (11)
1. A solar cell, comprising a semiconductor substrate and a metal electrode, characterized in that: the solar cell further comprises a tunneling layer and a doped polycrystalline silicon layer which are sequentially stacked on the surface of one side of the semiconductor substrate, the doped polycrystalline silicon layer is provided with a first part and a second part, the first part is arranged between the metal electrode and the tunneling layer, the second part is located beside the first part, and the doping concentration of the first part is greater than that of the second part.
2. The solar cell of claim 1, wherein: the thickness of the doped polycrystalline silicon layer is set to be 40-300 nm.
3. The solar cell of claim 1, wherein: the tunneling layer is a silicon oxide film or a silicon oxynitride film or a composite film formed by mutually laminating the silicon oxide film and the silicon oxynitride film, and the thickness of the tunneling layer is set to be 0.5-3 nm.
4. The solar cell of claim 3, wherein: the thickness of the tunneling layer is set to be 1-2 nm.
5. The solar cell of claim 1, wherein: the solar cell further comprises an antireflection layer arranged on the surface of the doped polycrystalline silicon layer on the side away from the semiconductor substrate, and the metal electrode penetrates through the antireflection layer and is in contact with the first part.
6. The solar cell of claim 5, wherein: the antireflection layer comprises a first antireflection film layer, a second antireflection film layer stacked on the first antireflection film layer and deviating from the first antireflection film layer on the surface of one side of the semiconductor substrate, the thickness of the first antireflection film layer is smaller than that of the second antireflection film layer, and the refractive index of the first antireflection film layer is larger than that of the second antireflection film layer.
7. The solar cell of claim 1, wherein: the solar cell is arranged as a bifacial cell; the tunneling layer and the doped polycrystalline silicon layer are sequentially stacked on the back of the semiconductor substrate.
8. The solar cell of claim 7, wherein: the solar cell comprises a semiconductor substrate, a front surface passivation layer, a front surface antireflection layer and a front surface electrode, wherein the front surface passivation layer and the front surface antireflection layer are arranged on the surface of the diffusion layer in a laminated mode, and the front surface electrode penetrates through the front surface passivation layer and the front surface antireflection layer and is in contact with the diffusion layer.
9. The solar cell of claim 8, wherein: the diffusion layer comprises a heavy diffusion area located below the front electrode and a light diffusion area located beside the heavy diffusion area, the sheet resistance of the heavy diffusion area is set to be 30-90 ohm/squ, and the sheet resistance of the light diffusion area is set to be 110-150 ohm/squ.
10. The solar cell of claim 8, wherein: the front passivation layer is Al2O3Film layer of said Al2O3The thickness of the film layer is set to be 3-10 nm.
11. The solar cell of claim 1, wherein: the semiconductor substrate is an N-type silicon wafer, and the resistivity of the semiconductor substrate is set to be 0.5-6 omega cm.
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