CN110191597A - A kind of manufacture craft of multilayer circuit board - Google Patents
A kind of manufacture craft of multilayer circuit board Download PDFInfo
- Publication number
- CN110191597A CN110191597A CN201910358460.4A CN201910358460A CN110191597A CN 110191597 A CN110191597 A CN 110191597A CN 201910358460 A CN201910358460 A CN 201910358460A CN 110191597 A CN110191597 A CN 110191597A
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- Prior art keywords
- copper
- circuit board
- resin
- forms
- layer circuit
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The present invention provides a kind of manufacture crafts of multilayer circuit board, comprising the following steps: stock, primary drilling, primary plating, filling holes with resin, belt-sanding, a dry film, primary etching, printing resin, second time electroplating, secondary dry film, second etch, pressing, secondary drilling, second time electroplating, secondary dry film, second etch, anti-welding, fishing type.The manufacture craft of multilayer circuit board provided by the invention is able to solve since etching is formed by burr in lamination type, leads to the problem of being easily broken when fiberglass machinery squeezes in prepreg.
Description
Technical field
The present invention relates to circuit board processing technique fields, and in particular to a kind of manufacture craft of multilayer circuit board.
Background technique
Circuit board, also known as printed circuit board are the suppliers of electronic component electrical connection.Its development existing more than 100
The history in year, design are mainly layout design, and the major advantage using circuit board is to greatly reduce the difference of wiring and assembly
Mistake improves the gentle productive labor rate of Automated water.Printed circuit board according to the wiring board number of plies can be divided into single sided board, dual platen,
Four laminates, six laminates and other multilayer circuit boards.
As design of electronic products becomes increasingly complex, therefore required copper foil is thicker, and route is more dense, and carrying electric current is increasingly
Greatly, proof voltage requires also higher and higher, therefore in multilayer circuit board manufacture craft, to consider that current-carrying, copper thickness were bigger
The electric current that can be carried is bigger, for example, 20Z (ounce ounces) is needed compared with 10Z thickness to the circuit board after plating and etching
Component is laminated, general to be filled out using conventional PP (Prepreg, that is, resin sheet, prepreg) process for pressing and print resin
Technique is filled to be used in combination with PP process for pressing.
But conventional PP process for pressing is suitable only for the lesser product of copper thickness, with the increase of copper thickness, uses
Double-sided etching process does line pattern, and after being etched due to first time, line pattern etch depth reaches, can online shoulder at draping over one's shoulders
Cutting edge of a knife or a sword, thus in lamination, the glue of PP can flow into etched recesses bottom in line pattern, make the glass in PP that can touch line shoulder
Position causes burr mechanical presses glass cracked, reduces product lamination rear stability and yields.
To solve this problem, part of the manufacturer devises a kind of production method, and such as application No. is 201410446671.0 public affairs
" a kind of printed circuit board process for pressing " opened is covered the second face of copper foil surface with resistance film;First face is carried out micro-
Then etching process goes to corrosion stability film so that copper thickness reduces;It is printed on microetch treated the first face copper foil circuit
Brush resin;Under preset time and preset temperature, segmentation precuring is carried out to the copper foil after printing resin;The first half are consolidated
Change piece and the bonding of the first face, first facing towards the first prepreg;The will be executed after first substrate and the bonding of the first prepreg
Laminating operation solves in the prior art since etching is formed by burr in lamination, when fiberglass machinery being caused to squeeze
The problem of being easily broken.Although the technology can improve the problem of burr, since chemical corrosion process is difficult to manage, carry out
Microetch process is very difficult to operate, and be easy to cause corrosion depth excessive or too small, or local hollow phenomenon occurs, it is difficult to control
Corrode precision.Therefore there are biggish defects.
Summary of the invention
In view of the above problems, the present invention provides a kind of manufacture craft of multilayer circuit board, it is able to solve by etching institute's shape
At burr in lamination type, the problem of causing in prepreg fiberglass machinery to be easily broken when squeezing.
To achieve the above object, the present invention solves by the following technical programs:
A kind of manufacture craft of multilayer circuit board, comprising the following steps:
S1 stock: prepare top plate, the first prepreg, inner plating, the second prepreg, lower plywood;
S2 once drills: drilling to inner plating, forms first through hole;
S3 is once electroplated: inner plating being electroplated, internal layer plate surface forms the first face layers of copper, and first through hole surface forms first
Hole layers of copper, the first face layers of copper with a thickness of 1.50~1.58mil;
S4 filling holes with resin: filling holes with resin is carried out to first through hole, forms buried via hole;
S5 belt-sanding: buried via hole both ends of the surface are ground with abrasive band;
Dry film of S6: pad pasting, development, exposure are carried out in the upper and lower end faces of inner plating, forms the first internal layer circuit pattern;
S7 is once etched: non-line section on the first internal layer circuit pattern being etched away, the first internal layer circuit, established standards are formed
Etched width coefficient be 100%, the etched width coefficient that this step uses be 101.5%~105.5%;
S8 printing resin: in one layer of resin of dry film surface printing, being sufficient filling with resin between etching lines, translation dry film,
Dry film is torn, makes resin solidification after baking;
S9 second time electroplating: being electroplated inner plating, and the first internal layer circuit surface forms the second face layers of copper, the thickness of the second face layers of copper
Degree is 0.12~0.2mil;
Bis- dry films of S10: pad pasting, development, exposure are carried out on the second face layers of copper surface, forms the second internal layer circuit pattern;
S11 second etch: non-line section on the second internal layer circuit pattern is etched away, and is formed the second internal layer circuit, is then gone
Falling dry film, the etched width coefficient of established standards is 100%, the etched width coefficient that this step uses is 99.95%~
100.05%;
S12 pressing: top plate, the first prepreg, inner plating, the second prepreg, lower plywood are pressed into multilayer circuit board;
S13 secondary drilling: drilling to multilayer circuit board, forms blind buried via hole and blind hole;
S14 second time electroplating: being electroplated multilayer circuit board, and multilayer line plate surface forms third face layers of copper, blind buried via hole and blind
Hole surface is respectively formed the second hole layers of copper, third hole layers of copper;
Bis- dry films of S15: pad pasting, development, exposure are carried out in the upper and lower end faces of multilayer circuit board, forms outer-layer circuit pattern;
S16 second etch: non-line section on outer-layer circuit pattern is etched away, and forms outer-layer circuit;
S17 is anti-welding: printing one layer of uniform anti-solder ink layer in the outer-layer circuit of multilayer circuit board upper and lower end faces, prevents from welding
Short circuit caused by when connecing;
S18 fishing type: go out shape according to the structure gong of finished product, cut, complete the production.
Specifically, the step S3 be once electroplated in the first face layers of copper with a thickness of 1.55mil, bis- electricity of the step S9
Second face layers of copper with a thickness of 0.15mil in plating.
Specifically, the step S7 once etch in etched width coefficient be 104%, the step S11 second etch
In etched width coefficient be 100.02%.
Specifically, resin used in the step S8 printing resin be waterborne polyurethane resin, baking temperature be 75~
90 DEG C, baking time is 15~22min.
Specifically, in the step S14 second time electroplating the second face layers of copper with a thickness of 1.5mil.
The beneficial effects of the present invention are: the invention discloses a kind of manufacture craft of multilayer circuit board, using being electroplated twice
Mode make internal layer circuit, primary plating makes the first thicker internal layer circuit in interior lamina surface, then in the first internal layer
Potting resin in etching lines between route, then second time electroplating makes the second relatively thin internal layer on the first internal layer circuit surface
Route is covered burr thicker on the line shoulder of the first internal layer circuit in the way of potting resin, and the second internal layer circuit loses
When quarter, due to its thinner thickness, the line shoulder burr generated is very thin, almost negligible to disregard, therefore in subsequent lamination, energy
It is enough to solve to be formed by burr in lamination type due to etching, lead to crackly when fiberglass machinery squeezes in prepreg ask
Topic.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of step S2~S8 in the present invention.
Fig. 2 is the structural schematic diagram of step S9~S11 of the present invention.
Appended drawing reference are as follows: inner plating 1, the first face layers of copper 2, the first internal layer circuit 3, the second face layers of copper 4, the second internal layer circuit
5。
Specific embodiment
Below with reference to embodiment and attached drawing, the present invention is described in further detail, but embodiments of the present invention are unlimited
In this.
Referring to Fig.1 shown in -2:
A kind of manufacture craft of multilayer circuit board, comprising the following steps:
S1 stock: prepare top plate, the first prepreg, inner plating 1, the second prepreg, lower plywood;
S2 once drills: drilling to inner plating 1, forms first through hole;
S3 is once electroplated: inner plating 1 being electroplated, 1 surface of inner plating forms the first face layers of copper 2, and first through hole surface is formed
First hole layers of copper, the first face layers of copper 2 with a thickness of 1.50~1.58mil;
S4 filling holes with resin: filling holes with resin is carried out to first through hole, forms buried via hole;
S5 belt-sanding: buried via hole both ends of the surface are ground with abrasive band;
Dry film of S6: pad pasting, development, exposure are carried out in the upper and lower end faces of inner plating 1, forms the first internal layer circuit pattern;
S7 is once etched: non-line section on the first internal layer circuit pattern being etched away, the first internal layer circuit 3, setting mark are formed
Quasi- etched width coefficient is 100%, and the etched width coefficient that this step uses is 101.5%~105.5%;
S8 printing resin: in one layer of resin of dry film surface printing, being sufficient filling with resin between etching lines, translation dry film,
Dry film is torn, makes resin solidification after baking;
S9 second time electroplating: being electroplated inner plating 1, and 3 surface of the first internal layer circuit forms the second face layers of copper 4, the second face layers of copper 4
With a thickness of 0.12~0.2mil;
Bis- dry films of S10: pad pasting, development, exposure are carried out on 4 surface of the second face layers of copper, forms the second internal layer circuit pattern;
S11 second etch: non-line section on the second internal layer circuit pattern is etched away, and is formed the second internal layer circuit 5, is then gone
Falling dry film, the etched width coefficient of established standards is 100%, the etched width coefficient that this step uses is 99.95%~
100.05%;
S12 pressing: top plate, the first prepreg, inner plating 1, the second prepreg, lower plywood are pressed into multilayer line
Plate;
S13 secondary drilling: drilling to multilayer circuit board, forms blind buried via hole and blind hole;
S14 second time electroplating: being electroplated multilayer circuit board, and multilayer line plate surface forms third face layers of copper, blind buried via hole and blind
Hole surface is respectively formed the second hole layers of copper, third hole layers of copper;
Bis- dry films of S15: pad pasting, development, exposure are carried out in the upper and lower end faces of multilayer circuit board, forms outer-layer circuit pattern;
S16 second etch: non-line section on outer-layer circuit pattern is etched away, and forms outer-layer circuit;
S17 is anti-welding: printing one layer of uniform anti-solder ink layer in the outer-layer circuit of multilayer circuit board upper and lower end faces, prevents from welding
Short circuit caused by when connecing;
S18 fishing type: go out shape according to the structure gong of finished product, cut, complete the production.
Preferably, step S3 be once electroplated in the first face layers of copper 2 with a thickness of 1.55mil, in step S9 second time electroplating
Two face layers of copper 4 with a thickness of 0.15mil.
Preferably, step S7 once etch in etched width coefficient be 104%, the etching in step S11 second etch
Spread factor is 100.02%, since the etched width in once etching is greater than the etched width in 1 second etch, so that second
Face layers of copper 4 completely cladding the first face layers of copper 2, avoid lamination when the first prepreg, the second prepreg directly with the first face copper
Layer 2 contacts, thus avoid the burr of 2 line shoulder of the first face layers of copper lead to the first prepreg, fiberglass machinery in the second prepreg
The problem of being easily broken when extruding.
Preferably, resin used in step S8 printing resin is waterborne polyurethane resin, and baking temperature is 75~90 DEG C,
Baking time is 15~22min.
Preferably, in step S14 second time electroplating the second face layers of copper 4 with a thickness of 1.5mil.
Above embodiments only express one embodiment of the present invention, and the description thereof is more specific and detailed, but can not
Therefore limitations on the scope of the patent of the present invention are interpreted as.It should be pointed out that for those of ordinary skill in the art,
Without departing from the inventive concept of the premise, various modifications and improvements can be made, these belong to protection model of the invention
It encloses.Therefore, the scope of protection of the patent of the invention shall be subject to the appended claims.
Claims (5)
1. a kind of manufacture craft of multilayer circuit board, which comprises the following steps:
S1 stock: prepare top plate, the first prepreg, inner plating (1), the second prepreg, lower plywood;
S2 once drills: drilling to inner plating (1), forms first through hole;
S3 is once electroplated: inner plating (1) being electroplated, inner plating (1) surface forms the first face layers of copper (2), first through hole table
Face formed the first hole layers of copper, the first face layers of copper (2) with a thickness of 1.50~1.58mil;
S4 filling holes with resin: filling holes with resin is carried out to first through hole, forms buried via hole;
S5 belt-sanding: buried via hole both ends of the surface are ground with abrasive band;
Dry film of S6: pad pasting, development, exposure are carried out in the upper and lower end faces of inner plating (1), forms the first internal layer circuit figure
Case;
S7 is once etched: non-line section on the first internal layer circuit pattern etched away, is formed the first internal layer circuit (3), setting
The etched width coefficient of standard is 100%, and the etched width coefficient that this step uses is 101.5%~105.5%;
S8 printing resin: in one layer of resin of dry film surface printing, being sufficient filling with resin between etching lines, translation dry film,
Dry film is torn, makes resin solidification after baking;
S9 second time electroplating: being electroplated inner plating (1), the second face layers of copper (4) of the first internal layer circuit (3) surface formation, and second
Face layers of copper (4) with a thickness of 0.12~0.2mil;
Bis- dry films of S10: pad pasting, development, exposure are carried out on the second face layers of copper (4) surface, forms the second internal layer circuit pattern;
S11 second etch: non-line section on the second internal layer circuit pattern is etched away, and is formed the second internal layer circuit (5), then
Removing dry film, the etched width coefficient of established standards is 100%, the etched width coefficient that this step uses is 99.95%~
100.05%;
S12 pressing: top plate, the first prepreg, inner plating (1), the second prepreg, lower plywood are pressed into multilayer line
Plate;
S13 secondary drilling: drilling to multilayer circuit board, forms blind buried via hole and blind hole;
S14 second time electroplating: being electroplated multilayer circuit board, and multilayer line plate surface forms third face layers of copper, blind buried via hole and blind
Hole surface is respectively formed the second hole layers of copper, third hole layers of copper;
Bis- dry films of S15: pad pasting, development, exposure are carried out in the upper and lower end faces of multilayer circuit board, forms outer-layer circuit pattern;
S16 second etch: non-line section on outer-layer circuit pattern is etched away, and forms outer-layer circuit;
S17 is anti-welding: printing one layer of uniform anti-solder ink layer in the outer-layer circuit of multilayer circuit board upper and lower end faces, prevents from welding
Short circuit caused by when connecing;
S18 fishing type: go out shape according to the structure gong of finished product, cut, complete the production.
2. a kind of manufacture craft of multilayer circuit board according to claim 1, which is characterized in that the step S3 is once electric
In plating the first face layers of copper (2) with a thickness of 1.55mil, in the step S9 second time electroplating the second face layers of copper (4) with a thickness of
0.15mil。
3. a kind of manufacture craft of multilayer circuit board according to claim 1, which is characterized in that the step S7 once loses
Etched width coefficient in quarter is 104%, and the etched width coefficient in the step S11 second etch is 100.02%.
4. a kind of manufacture craft of multilayer circuit board according to claim 1, which is characterized in that the step S8 printing tree
Resin used in rouge is waterborne polyurethane resin, and baking temperature is 75~90 DEG C, and baking time is 15~22min.
5. a kind of manufacture craft of multilayer circuit board according to claim 1, which is characterized in that the step S14 bis- times
Second face layers of copper (4) with a thickness of 1.5mil in plating.
Priority Applications (1)
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CN201910358460.4A CN110191597A (en) | 2019-04-30 | 2019-04-30 | A kind of manufacture craft of multilayer circuit board |
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CN201910358460.4A CN110191597A (en) | 2019-04-30 | 2019-04-30 | A kind of manufacture craft of multilayer circuit board |
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Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110798995B (en) * | 2020-01-03 | 2020-07-07 | 惠州市大亚湾科翔科技电路板有限公司 | Preparation method of high-reliability photovoltaic inverter printed circuit board |
CN112291951A (en) * | 2020-11-10 | 2021-01-29 | 深圳市昶东鑫线路板有限公司 | Blind buried hole circuit board processing technology |
CN114269071A (en) * | 2021-12-08 | 2022-04-01 | 江苏普诺威电子股份有限公司 | Through hole filling manufacturing process of multilayer board |
CN115379657A (en) * | 2022-08-19 | 2022-11-22 | 东莞联桥电子有限公司 | Manufacturing process suitable for circuit board with special-shaped holes or half holes |
-
2019
- 2019-04-30 CN CN201910358460.4A patent/CN110191597A/en active Pending
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN110798995B (en) * | 2020-01-03 | 2020-07-07 | 惠州市大亚湾科翔科技电路板有限公司 | Preparation method of high-reliability photovoltaic inverter printed circuit board |
CN112291951A (en) * | 2020-11-10 | 2021-01-29 | 深圳市昶东鑫线路板有限公司 | Blind buried hole circuit board processing technology |
CN114269071A (en) * | 2021-12-08 | 2022-04-01 | 江苏普诺威电子股份有限公司 | Through hole filling manufacturing process of multilayer board |
CN114269071B (en) * | 2021-12-08 | 2024-04-26 | 江苏普诺威电子股份有限公司 | Through hole filling manufacturing process of multilayer board |
CN115379657A (en) * | 2022-08-19 | 2022-11-22 | 东莞联桥电子有限公司 | Manufacturing process suitable for circuit board with special-shaped holes or half holes |
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Application publication date: 20190830 |