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CN117650700A - Switching power supply and control circuit thereof - Google Patents

Switching power supply and control circuit thereof Download PDF

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Publication number
CN117650700A
CN117650700A CN202311376775.4A CN202311376775A CN117650700A CN 117650700 A CN117650700 A CN 117650700A CN 202311376775 A CN202311376775 A CN 202311376775A CN 117650700 A CN117650700 A CN 117650700A
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CN
China
Prior art keywords
current
signal
switching
voltage
power supply
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN202311376775.4A
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Chinese (zh)
Inventor
马玲莉
刘阳
于翔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Junying Semiconductor Shanghai Co ltd
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Junying Semiconductor Shanghai Co ltd
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Priority to CN202311376775.4A priority Critical patent/CN117650700A/en
Publication of CN117650700A publication Critical patent/CN117650700A/en
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1566—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with means for compensating against rapid load changes, e.g. with auxiliary current source, with dual mode control or with inductance variation
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/04—Measuring peak values or amplitude or envelope of ac or of pulses
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/255—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with counting of pulses during a period of time proportional to voltage or current, delivered by a pulse generator with fixed frequency
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0009—Devices or circuits for detecting current in a converter
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/44—Circuits or arrangements for compensating for electromagnetic interference in converters or inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/1563—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators without using an external clock
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
    • H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
    • H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
    • H02M3/157—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators with digital control

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Dc-Dc Converters (AREA)

Abstract

The invention discloses a switching power supply and a control circuit thereof. Comprising the following steps: a clock generation circuit configured to generate a clock signal; a peak detection circuit configured to generate a current peak voltage signal when an inductance current of the inductor rises to a maximum peak value; and a logic control circuit configured to switch the first switching tube from the second state to the first state based on the clock signal and to switch the first switching tube from the first state to the second state based on the current peak voltage signal, wherein the peak detection circuit is further configured to adaptively adjust a maximum peak value based on an input voltage, an output voltage, and an output current of the switching power supply, so that transmission energy of the inductor in each switching period can be reduced in a light load state, thereby reducing efficiency while maintaining a switching frequency of the circuit above an audio range, avoiding input energy overload of the circuit, and compromising a balance between efficiency and switching frequency.

Description

Switching power supply and control circuit thereof
Technical Field
The invention relates to the field of power supply design, in particular to a switching power supply and a control circuit thereof.
Background
The switching power supply converter is a power supply for controlling the on-off time ratio of a switching tube and maintaining stable output voltage by using a modern power electronic technology, and generally consists of a pulse width modulation (Pulse Width Modulation, abbreviated as PWM) control circuit, an energy storage element (such as an inductor) and a switching tube. A large number of switching power converters are used in the mobile terminal to provide a stable power supply for each module inside the mobile terminal, such as a central processing unit (Central Processing Unit, abbreviated as CPU), a subscriber identity module (Subscriber Identification Module, abbreviated as SIM) card, a radio frequency power amplifier, and the like.
When the load current is relatively large, the switching power supply converter (hereinafter referred to as a switching power supply) generally operates in a continuous on mode (Continuous Conduction Mode, referred to as CCM), and at this time, the switching frequency of the switching power supply is relatively high, typically several hundred kHz to several MHz. However, when the load current is small or no, in order to reduce the loss and improve the efficiency, the switching power supply generally reduces the operating frequency and enters a discontinuous on mode (Discontinuous Conduction Mode, abbreviated as DCM). In DCM, the smaller the load current, the lower the operating frequency. When the operating frequency falls within the audio frequency range (20 Hz-20 kHz), audio noise is generated, which affects the customer experience and also interferes with the communication of the mobile terminal, which is unacceptable.
Disclosure of Invention
In view of the above, the present invention provides a switching power supply and a control circuit thereof, which adaptively adjusts the maximum peak value of the inductor current according to the output current of the switching power supply, so as to ensure that the switching frequency of the circuit is maintained above the audio frequency range in a light load state, and avoid the input energy overload of the circuit to reduce the efficiency, thereby balancing the efficiency and the switching frequency.
According to an aspect of the present invention, there is provided a control circuit of a switching power supply including a first switching transistor and an inductor connected to a switching node, the control circuit switching the first switching transistor between first and second states based on an input voltage and an output voltage of the switching power supply, the control circuit comprising: a clock generation circuit configured to generate a clock signal; a peak detection circuit configured to generate a current peak voltage signal when an inductance current of the inductor rises to a maximum peak value; and a logic control circuit configured to switch the first switching tube from a second state to a first state based on the clock signal and to switch the first switching tube from the first state to the second state based on the current peak voltage signal, wherein the peak detection circuit is further configured to adaptively adjust the maximum peak value based on an input voltage, an output voltage, and an output current of the switching power supply.
Optionally, the peak detection circuit includes: a first current multiplier configured to perform a power operation on a first sampling current representing the inductor current, and to divide the first sampling current by a first reference current to obtain a first current signal; a second current multiplier configured to multiply a second sampling current representative of the output current by a difference current associated with the input voltage and the output voltage, divided by a second reference current, to obtain a second current signal; and a first comparator, the positive input end of which is used for receiving the first current signal, the negative input end of which is used for receiving the second current signal, and the output end of which is used for outputting the current peak voltage signal.
Optionally, the maximum peak value is determined by the following formula:
wherein I is S1_max VIN and VOUT are input voltage and output voltage of the switching power supply for maximum peak value of inductance current, I OUT The output current of the switching power supply, eta is the transmission efficiency of the power circuit, L is the inductance of the inductor, and fsw is the switching frequency of the switching power supply.
Optionally, the clock generation circuit is further configured to adjust the frequency of the clock signal according to a difference between the error signal and the first reference voltage to achieve down-conversion when the error signal related to the output voltage is smaller than the first reference voltage.
Optionally, a lowest frequency of the switching power supply is set by adjusting the first reference voltage, and the frequency is above an audio range.
Optionally, the method further comprises: a pattern comparator configured to compare the error signal with a skip threshold voltage and to provide a skip signal to the clock generation circuit when the error signal is less than the skip threshold voltage, wherein the clock generation circuit masks an output of at least one pulse of the clock signal according to the skip signal.
Optionally, the clock generating circuit includes: a timer module configured to generate a gradually increasing ramp voltage to start timing when the first switching transistor is switched from the second state to the first state, and generate a timing signal when the ramp voltage increases to a second reference voltage; and a logic operation module configured to perform a logic operation on the timing signal and the skip signal to generate the clock signal.
Optionally, the timer module includes: a current source and a ramp capacitor connected in series between a supply voltage and ground, the current source configured to provide a charging current to the ramp capacitor to generate the ramp voltage at a first end of the ramp capacitor; a switching transistor connected in parallel between both ends of the ramp capacitor, wherein on and off of the switching transistor is controlled based on the clock signal; the positive input end of the second comparator is used for receiving the slope voltage, the negative input end of the second comparator is used for receiving the second reference voltage, and the output end of the second comparator is used for providing the timing signal; and a transconductance amplifier configured to provide a discharge current at a first end of the ramp capacitor based on an error between the error signal and the first reference voltage.
Optionally, the logic operation module includes: an inverter configured to obtain an inverted signal of the timing signal; a nor gate configured to nor the inverse of the timing signal with the skip signal; and a narrow pulse module configured to generate the clock signal based on an output of the nor gate.
According to another aspect of the present invention, there is provided a switching power supply comprising: an input for receiving an input voltage; an output terminal connected to the load for providing an output voltage; a power circuit coupled to the input and output terminals, the power circuit employing at least one inductor and at least a first switching tube to regulate current provided to the load; and the control circuit is connected to the first switching tube and is configured to switch the first switching tube between a first state and a second state based on the input voltage and the output voltage.
In summary, the switching power supply of the present invention can adaptively adjust the peak value of the inductor current according to the output current of the circuit, so that the peak value of the inductor current can be adaptively reduced according to the output current in a light load state, and then the transmission energy of the inductor in each switching period is reduced, thereby avoiding the overload of the input energy of the circuit and reducing the efficiency while maintaining the switching frequency of the circuit above the audio range, and balancing the efficiency and the switching frequency.
Drawings
The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic diagram of a switching power supply according to an embodiment of the present invention.
Fig. 2 is a schematic diagram of a clock generation circuit in a switching power supply according to an embodiment of the present invention.
Fig. 3A is a timing diagram of the operation of a switching power supply according to the prior art in a light load state.
Fig. 3B is a timing diagram illustrating the operation of the switching power supply in a light load state according to an embodiment of the present invention.
Fig. 4 is a schematic diagram of a computer system having a switching power supply including an embodiment of the present invention.
Detailed Description
Specific embodiments of the invention will be described in detail below, it being noted that the embodiments described herein are for illustration only and are not intended to limit the invention. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to one of ordinary skill in the art that: no such specific details are necessary to practice the invention. In other instances, well-known circuits, materials, or methods have not been described in detail in order not to obscure the invention.
Throughout the specification, references to "one embodiment," "an embodiment," "one example," or "an example" mean: a particular feature, structure, or characteristic described in connection with the embodiment or example is included within at least one embodiment of the invention. Thus, the appearances of the phrases "in one embodiment," "in an embodiment," "one example," or "an example" in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures, or characteristics may be combined in any suitable combination and/or sub-combination in one or more embodiments or examples. Moreover, those of ordinary skill in the art will appreciate that the drawings are provided herein for illustrative purposes and that the drawings are not necessarily drawn to scale. It will be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being "directly connected to" or "directly coupled to" another element, there are no intervening elements present. Like reference numerals designate like elements. The term "and/or" as used herein includes any and all combinations of one or more of the associated listed items.
Fig. 1 is a schematic diagram of a switching power supply 100 according to an embodiment of the present invention. As shown in fig. 1, the switching power supply 100 includes a power circuit and a control circuit 110. Wherein the power circuit is an output circuit of a boost-type switching regulator of a peak current mode synchronous rectification mode, comprising one or more switching elements and filter elements (e.g., inductors and/or capacitors, etc.) configured to regulate the transfer of electrical energy from the input to the output of the switching converter in response to a switching drive signal to convert the input voltage VIN to a stable continuous output voltage VOUT.
The invention is not limited in this regard and the various concepts disclosed herein may be used in connection with any type of DC-DC switching power supply architecture, including, for example, buck-Boost (Buck) switching power supplies, boost (Boost) switching power supplies, flyback (Flyback) switching power supplies, buck-Boost (Buck-Boost) switching power supplies, etc., depending on the topology classification of the power circuit.
Furthermore, while complementary PWM control of the high-side switching device and the low-side switching device is utilized in the illustration of the embodiments of the present invention, the concepts described herein can be implemented in switching power converters that use only a single switching device and/or in switching power converters that employ more than two pulse width modulations.
As shown in fig. 1, the power circuit includes a switching tube S1 (also referred to as a low-side switching tube), a switching tube S2 (also referred to as a high-side switching tube), and an inductor L1. The drains of the low-side switching tube S1 and the high-side switching tube S2 are connected to each other, a common end of the two forms a switching node LX, a source of the low-side switching tube S1 is connected to a ground terminal, and a source of the high-side switching tube S2 is connected to the output voltage VOUT. The inductor L1 has a first terminal connected to the input voltage VIN and a second terminal connected to the switching node LX. It should be appreciated that in this embodiment, the switching tube S1 is a main power tube, the switching tube S2 is a rectifying tube, and the switching tubes S1 and S2 may be any type of field effect transistor, such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), but may be any other type of field effect transistor and/or any other type of transistor within the scope of the teachings of the present invention as known to those skilled in the art.
The switching power supply 100 further includes an output capacitor Co that is disposed between an output terminal of the switching power supply 100 and a ground terminal to generate an output voltage VOUT across the output capacitor Co. The voltage divider network composed of resistors Ra and Rb is used for obtaining feedback voltage V of output voltage VOUT FB 。
The control circuit 110 is used for generating a driving signal applied to the gates of the switching transistors S1 and S2, and controlling the switching states of the switching transistors S1 and S2 to supply energy to the load. In the present embodiment, the control circuit 110 repeatedly turns on/off the switching transistors S1 and S2 alternately, and performs energy conversion by the inductor L1, thereby boosting the input voltage VIN, smoothing the boosted ground voltage by the inductor L1 and the output capacitor Co, and outputting the boosted ground voltage as the output voltage VOUT.
In which the control circuit 110 of the switching power supply 100 may be integrated as an LSI chip on a semiconductor substrate. In the present embodiment, the switching transistors S1 and S2 may be provided outside the control circuit 110, but may be provided inside the control circuit.
Further, the switching power supply 100 has a switching period including an on time Ton for charging the inductor L1 and an off time Toff for discharging an output terminal. When the load is large, the switching power supply 100 operates in a continuous on mode (Continuous Conduction Mode, CCM for short). During each of the switching periods, at least one of the switching tubes S1 and S2 is on for the entire portion of each switching period (ignoring dead time between switching to ensure that only one switch is on at any given time), the current IL flowing through the inductor L1 will never be zero, or the inductor L1 will never be "reset", meaning that during the switching period the magnetic flux of the inductor will never return to zero, and the current IL flowing through the inductor L1 remains greater than zero at all times when the switching tube S2 is off.
When the load is small, the switching power supply 100 operates in a discontinuous on mode (Discontinuous Conduction Mode, abbreviated as DCM). When the switching power supply 100 operates in DCM, the size of each of the switching periods is equal to t1+t2. Wherein T1 defines the procedure that the switching tube S1 is turned on and the switching tube S2 is turned off, the input voltage VIN forms a path to ground via the inductor L1, the inductor L1 stores energy, and the inductor current IL flowing therethrough rises. Then, while the switching tube S1 is controlled to be turned off and the switching tube S2 is controlled to be turned on, the inductor L1 transfers the stored power to the output terminal of the switching power supply 100 to charge the same, and the output voltage VOUT increases until the inductor current IL flowing through the inductor L1 drops to zero, which means that the inductor L is properly "reset", and when the switching tube S2 is turned off, the inductor current IL flowing through the inductor L1 is zero. The T2 defines the process of maintaining the inductor current IL through the inductor L1 at zero, discharging the output capacitor by the current through the load until the clock pulse of the next cycle comes, and the switching power supply 100 starts a new switching cycle under the control of the control circuit 110 and repeats.
In the present embodiment, the control circuit 110 of the switching power supply 100 further includes an error amplifier 121, a mode comparator 122, a peak detection circuit 123, a logic control circuit 124, a clock generation circuit 125, and current sampling circuits 131 and 132.
Wherein the positive input end of the error amplifier 121 is used for receiving the feedback voltage V FB The negative input of the error amplifier 121 is used for receiving a reference voltage V BG The error amplifier 121 is configured to output the feedback voltage V FB With the reference voltage V BG Comparing to generate an error signal V ERR Signal V ERR Representing the feedback voltage V FB With reference voltage V BG Difference between, signal V ERR Is provided to logic control circuit 124.
The peak detection circuit 123 is configured to detect an inductor current peak value of the inductor L1 and to detect a peak value of the inductor current at the peak valueWhen the inductance current of the inductor L1 reaches the maximum peak value, a current peak voltage signal V is generated IPEAK To switch the switching tube S1 from the on state to the off state. The peak detection circuit 123 is illustratively configured to be based on a first sampled current I characterizing the inductor current S1 And a first reference current I REF1 Obtaining a first current signal I O1 Second sampling current I based on an average value characterizing the output current S2 Differential current I related to input voltage VIN and output voltage VOUT K Second reference current I REF2 Obtaining a second current signal I O2 And based on the first current signal I O1 And a second current signal I O2 The comparison between the current peak voltage signals V IPEAK 。
Further, the peak detection circuit 123 includes current multipliers 1231 and 1232 and a comparator 1233. The current multiplier 1231 has a function for receiving the first sampling current I S1 For receiving said first reference current I REF1 And for outputting the first current signal I O1 Is provided. The current multiplier 1231 may implement a current value calculation relationship: i S1 *I S1 ＝I REF1 *I O1 . The current value calculation relation can be obtained according to the above:
the current multiplier 1232 has a function for receiving the second sampling current I S2 A first end for receiving the difference current I K For receiving said second reference current I REF2 And for outputting the second current signal I O2 Is provided. The current multiplier 1232 may implement a current value calculation relationship: i S2 *V1＝I REF2 *I O2 . The current value calculation relation can be obtained according to the above:
wherein the difference current I K In relation to the input voltage VIN and the output voltage VOUT of the power circuit, the differential current I is exemplified K = (VOUT-VIN)/R, R represents a resistance value in a voltage-to-current conversion circuit converting a voltage difference between an output voltage and an input voltage into a current, and a differential current I K Substitution into equation (2) yields:
the positive input of the comparator 1233 is used for receiving the first current signal I O1 The negative input of the comparator 1233 is used for receiving the second current signal I O2 The output end of the comparator 1233 is used for outputting the current peak voltage signal V IPEAK . Due to the fact that when the first current signal I O1 Greater than the second current signal I O2 When the comparator 1233 outputs a valid (e.g., high level) current peak voltage signal V IPEAK So that the switching tube S1 in the power circuit is switched from the on state to the off state, the current in the inductor L1 will drop, and the first current signal I will be caused O1 Falling, so during operation of the switching power supply of the present embodiment, the first current signal I O1 Less than or equal to the second current signal I O2 It can be obtained by combining the formulas (1) and (3) at the same time:
in the present embodiment, a second reference current I is set REF2 The method comprises the following steps:
wherein a is set to be proportional to the first reference current I REF1 Is used for the control of the dynamic range of,η is the transmission efficiency of the power circuit, L is the inductance of the inductor L1 between the input of the power circuit and the switching node LX, fsw is the switching frequency of the circuit.
As can be obtained from formulas (4) and (5),
therefore, the maximum value (or peak value) of the inductor current of the present embodiment is:
(7)
wherein I is OUT The output current or load current of the power circuit is represented by the formula (7), and the switching power supply of the embodiment can be based on the output current I in the light load state under the condition that eta x L is relatively constant OUT The peak value of the inductor current is adaptively adjusted so that the energy transfer of the inductor in each switching cycle can be reduced under light load conditions. Therefore, the switching power supply of the embodiment can adaptively adjust the peak value of the inductance current according to the output current under the light load state, so that the energy transmission of the inductor in each switching period is reduced, the overload of input energy is avoided, and the transmission efficiency of the switching power supply is improved.
In one embodiment, a first sampling current I S1 In proportion to the current flowing through the switching tube S1 and obtained by the current sampling circuit 131, for example, the current flowing through the inductor in the power circuit can be detected by the current sampling circuit 131 to obtain the first sampling current I S1 . In one embodiment, the second sampling current I S2 In proportion to the current flowing through the switching tube S2 and obtained by the current sampling circuit 132, for example, the average current flowing through the switching tube S2 may be detected by the current sampling circuit 132 to obtain the second sampling current I S2 . The sampling may be implemented by sampling resistors, current transformers, current mirrors, etc., and the current sampling circuits 131 and 132 may be implemented byOversensing a sense resistor (not shown) connected across the low side switching tube S1 and the high side switching tube S2 to obtain the first sampling current I S1 And a second sampling current I S2 。
The clock generation circuit 125 is configured to provide an internal clock of switching timing to control the duration of the switching period of the switching tube S1 in the power circuit and to generate a clock signal CLK to switch the switching tube S1 from the off state to the on state upon expiration of the switching period time. The clock generation circuit 125 is also illustratively configured to, based on the error signal V ERR With a first reference voltage V REF1 The difference between them dynamically adjusts the frequency of the clock signal CLK to achieve frequency conversion.
The negative input of the mode comparator 122 is used for receiving the error signal V ERR The positive input of the mode comparator 122 is used for receiving the skip threshold voltage V SKIP The mode comparator 122 is configured to compare the error signal V ERR With a jump threshold voltage V SKIP Compared to generate the SKIP signal SKIP. The SKIP signal SKIP is used to control whether the power circuit operates in a cycle-crossing interval, and when the power circuit enters the cycle-crossing interval, the switch driving signal output by the control circuit 110 SKIPs a few clock cycles, so as to reduce the switching frequency. The switching power supply working in the cross-period interval has the advantages of high response speed, high efficiency, strong anti-interference capability, good electromagnetic compatibility, strong robustness and the like under light load. For example, when signal V ERR Less than the jump threshold voltage V SKIP When the SKIP signal SKIP is in an active state (e.g., high level), the power circuit operates in a cross-cycle interval; when signal V ERR Greater than the jump threshold voltage V SKIP When the SKIP signal SKIP is inactive (e.g., low), the power circuit exits the SKIP cycle interval. In one exemplary embodiment, the mode comparator 122 may be implemented by a comparator having a hysteresis function (e.g., a hysteresis comparator). Illustratively, the SKIP signal SKIP is also provided to the clock generation circuit 125, the clock generation circuit 125 being configured to mask based on the SKIP signal SKIP being assertedThe output of the clock signal CLK can thus mask the output of the switching drive signal for some clock cycles, further reducing the switching frequency of the circuit.
Fig. 2 is a schematic diagram of a clock generation circuit in a switching power supply according to an embodiment of the present invention. As shown in fig. 2, the clock generation circuit 125 of the present embodiment includes a timer module 101 and a logic operation module 102. Wherein the timer module 101 is configured to generate a gradually increasing ramp voltage V by charging the ramp capacitor with a current when the switching tube S1 is switched from the off-state to the on-state SLOPE To start timing and at the ramp voltage V SLOPE To a set second reference voltage V REF2 A valid (e.g., high level pulse) timing signal ST is output.
The timer module 101 includes, for example, a current source 1251, a transconductance amplifier 1252, a ramp capacitor C1, a switching transistor M1, and a comparator 1253. Wherein, the current source 1251 and the ramp capacitor C1 are connected in series between the power voltage VCC and the ground, the switching transistor M1 is connected between the first terminal of the ramp capacitor C1 and the ground, and the control terminal of the switching transistor M1 is configured to receive the clock signal CLK. Wherein the current source 1251 is configured to supply the charging current I1 to the ramp capacitor C1 when the switching transistor M1 is off to generate a gradually rising ramp voltage V at one end of said ramp capacitor C1 SLOPE . The positive input of the comparator 1253 is configured to receive the ramp voltage V SLOPE The negative input of the comparator 1253 is for receiving the second reference voltage V REF2 Comparator 1253 is configured to generate a voltage at the ramp voltage V SLOPE Rising to the second reference voltage V REF2 The timing signal ST is asserted.
Further, the positive input of the transconductance amplifier 1252 is configured to receive the first reference voltage V REF1 The negative input of the transconductance amplifier 1252 is configured to receive the error signal V ERR The transconductance amplifier 1252 is configured to provide a signal in the error signal V ERR To the first reference voltage V REF1 Based on the first reference voltage V REF1 And the error signal V ERR The voltage difference between them provides a discharge current I2 at the first end of the ramp capacitor C1, the presence of which discharge current I2 reduces the ramp voltage V SLOPE Thereby achieving the purpose of adjusting the frequency of the clock signal CLK.
The logic operation module 102 is configured to perform a logic operation on the timing signal ST and the SKIP signal SKIP to generate the clock signal CLK. The logic operation module 102 includes an inverter IN1, a NOR gate NOR1, and a narrow pulse module 1254, for example. Wherein the inverter INV1 is used for generating an inverted signal of the timing signal ST, the NOR gate NOR1 is used for performing a NOR logic operation on the inverted signal of the timing signal ST and the SKIP signal SKIP, and the narrow pulse module 1254 is used for generating the clock signal CLK based on an output of the NOR gate NOR 1. Wherein the NOR gate NOR1 is configured to provide an active output signal when both the inverse of the timing signal ST and the SKIP signal SKIP are inactive (e.g., low), and finally an active pulse of the clock signal CLK is obtained at the output of the narrow pulse module 1254. Further, the active pulse of the clock signal CLK briefly turns on the switching transistor M1 to discharge the ramp capacitor C1, thereby causing the ramp voltage V SLOPE Reset and start the next round of charging, finally generating a periodic pulse signal CLK.
In the present embodiment, when the switching power supply 100 enters the light load state, the output current of the circuit decreases, which in turn causes the output V of the error amplifier 121 ERR Reduced when the error signal V ERR Reduced to a first reference voltage V REF1 The transconductance amplifier 1251 draws current from the ramp capacitor C1 and then ramps the voltage V SLOPE The decrease in slope of (a) results in a decrease in the frequency of the clock signal CLK until the current drawn by the transconductance amplifier 1251 reaches an upper limit, at which time the frequency of the clock signal CLK stops decreasing. Since the frequency of the clock signal CLK determines the switching frequency of the switching power supply 100, in order to avoid the switching power supply 100 of the present embodiment in the light load stateThe switching frequency is reduced to the audio frequency range (20 Hz-20 kHz) to generate audio noise, and the embodiment of the invention also comprises the step of setting the first reference voltage V REF1 To ensure that the switching frequency of the switching power supply 100 after the light load condition has been down-converted is still above the audio frequency range. In an exemplary embodiment, the first reference voltage V may be set REF1 The minimum frequency of the clock signal CLK is 50kHz, so that the operating frequency of the switching power supply can be ensured to be above the audio range on the basis of automatic frequency reduction, so as to avoid the generation of audio noise.
With continued reference to fig. 1, a logic control circuit 124 is used to implement the logic control function of the system, which is connected to the outputs of the error amplifier 121, the mode comparator 122, the peak detection circuit 123, and the clock generation circuit 125, the output of the logic control circuit 124 being connected to the gates of the low-side switching transistor S1 and the high-side switching transistor S2, and operating these transistors so that the power circuit outputs electrical energy to the load. For example, the logic control circuit 124 receives outputs from the error amplifier 121, the mode comparator 122, the peak detection circuit 123, and the clock generation circuit 125, and generates complementary high-side driver signals HSDR and low-side driver signals LSDR, and generates gate control signals to drive gates of the high-side switching transistor S2 and the low-side switching transistor S1 according to the two signals. In an exemplary embodiment, the control circuit 110 further includes a high side driver 126 and a low side driver 127 corresponding to the high side switching tube S2 and the low side switching tube S1, the high side driver signal HSDR and the low side driver signal LSDR being provided as inputs to the high side driver 126 and the low side driver 127.
In the present embodiment, when the switching power supply 100 is operated in the heavy load state, the clock generating circuit 125 generates the clock signal CLK (e.g., a high level pulse) at the expiration of each switching period, the logic control circuit 124 controls the high-side switching tube S2 to switch from the on state to the off state based on the clock signal CLK, and controls the low-side switching tube S1 to switch from the off state to the on state after a proper dead time, the input voltage VIN charges the inductor L1, and thus the current IL on the inductor L1 continuously rises and flows through the switching tube S1The current of (1) is sampled by the current sampling circuit 131 to obtain a first sampling current I S1 And is provided to a peak detection circuit 123, the peak detection circuit 123 will be based on said first sampling current I S1 Obtained first current signal I O1 And a second current signal I related to the output current of the switching power supply 100 O2 In comparison, as the inductor current IL increases, the first current signal I O1 Rising to obtain a second current signal I O2 The peak detection circuit 123 generates the current peak voltage signal V IPEAK The logic control circuit 124 controls the switching tube S1 to switch from the on state to the off state, and switches the switching tube S2 from the off state to the on state after a suitable dead time, the current stored in the inductor L1 flows to the load, and thus the current IL in the inductor L1 decreases.
When the switching power supply 100 is operated in the light load state, the error signal V is then caused due to the decrease of the output current ERR Reduced when the error signal V ERR Reduced to a first reference voltage V REF1 In the following, the clock generation circuit 125 generates the error signal V ERR With a first reference voltage V REF1 The difference between them reduces the frequency of the clock signal CLK, which in turn reduces the switching frequency in the power circuit. In order to avoid audio noise generated by the switching frequency in the power circuit decreasing to the audio range, the frequency of the clock signal CLK of the present embodiment is always greater than the minimum frequency (e.g., 50 kHz). Further, the switching power supply 100 of the present embodiment further includes adaptively reducing the peak value of the inductor current according to the output current in the light load state, and reducing the energy transmitted by the inductor in each switching period, so as to prevent the input energy of the circuit from being overloaded to reduce the efficiency in the light load state. Therefore, the switching power supply 100 of the present embodiment can reduce the efficiency loss of the circuit while ensuring that the switching frequency is above the audio range in a light load state, and balance between the efficiency and the switching frequency is considered.
Fig. 3A and 3B are timing diagrams of operation of a switching power supply according to the related art and a switching power supply according to an embodiment of the present invention in a light load state, respectively. In FIGS. 3A and 3B, respectivelyShows the SKIP signal SKIP, the clock signal CLK, the current peak voltage signal V IPEAK And a waveform diagram of the inductor current IL.
As shown in fig. 3A, the conventional switching power supply enters the DCM mode when the output current is small, and in the DCM mode, when the inductor current IL falls to 0, the switching power supply forcibly turns off the high-side switching transistor S2 so that the inductor current IL is maintained to 0, as shown by time t3-t4 in fig. 3A, until the next pulse of the clock signal CLK arrives, the low-side switching transistor S1 is turned on again so that the inductor current IL rises again. In order to reduce efficiency loss in the light load state, the conventional switching power supply combines an automatic frequency hopping manner to reduce the number of switching driving signals on the basis of frequency reduction, that is, the conventional switching power supply shields effective pulses of the clock signal CLK when the SKIP signal SKIP is turned to a high level, so that both the high side switching tube S2 and the low side switching tube S1 are turned off for some time periods to maintain the inductor current IL at 0, as shown by time t4-t5 in fig. 3A. After the SKIP signal SKIP turns to low level, the low-side switching transistor S1 is turned on according to the next pulse of the clock signal CLK so that the inductor current IL rises again as shown by time t5 in fig. 3A. Until the set current peak value of the inductor current IL rises, the current peak voltage signal V IPEAK An active pulse is output to turn off the low-side switching transistor S1 and turn on the high-side switching transistor S2 so that the inductor current IL decreases as shown by time t6 in fig. 3A. When the inductor current IL falls to 0 again, the switching power supply forcibly turns off the high-side switching transistor S2 so that the inductor current IL is maintained at 0, as shown by time t7 in fig. 3A.
In the conventional switching power supply, although efficiency loss of the circuit in a light load state can be reduced by reducing the number of switching driving signals, a mode of frequency-reducing in combination with automatic frequency hopping causes the switching frequency of the circuit to be reduced to an audio frequency range to generate audio noise when the output current is reduced to a certain extent.
As shown in fig. 3B, the switching power supply according to the embodiment of the present invention adaptively reduces the peak current of the inductor when the output current is small, and then reduces the transmission energy of the inductor in each switching period, as shown by the triangular wave shadows in fig. 3B. According to the input energy formula: w (W) IN ×η＝A IL ×VIN×n×η＝W OUT (wherein W is IN Representing the input energy of a switching power supply, A IL Represents the triangular wave shadow area in FIG. 3B, n represents the number of triangular waves in the energy transmission time T, W OUT Representing the output energy of the switching power supply) it is known that when the output current of the switching power supply is small, the output energy W of the circuit OUT Reducing the input energy W of the circuit IN The switching power supply of the embodiment of the present invention needs to be correspondingly reduced, and by reducing the transmission energy of the inductor in each switching period, more triangular waves can be transmitted within the energy transmission time T, that is, compared with the conventional switching power supply, the switching power supply of the embodiment of the present invention can obtain higher switching frequency, even if the SKIP signal SKIP is generated due to the small output current, as shown by time T10-T11 in fig. 3B, the switching frequency of the switching power supply can be maintained above the audio range, so as to avoid the generation of audio noise.
Fig. 4 is a schematic diagram of a computer system 200 having a switching power supply including an embodiment of the invention. As shown in fig. 4, a power supply 201 generates one or more supply voltages that supply power to other system devices of the computer system 200 via a connection network 205, wherein a regulator 203 is implemented, for example, by the switching power supply of the above-described embodiments, for regulating and stabilizing the supply voltages. The connection network 205 may be a bus system or a switching system or a set of conductors, etc. In the illustrated embodiment, computer system 200 includes a processor 207 and a peripheral system 209, both coupled to a connection network 205 to receive a supply voltage from a power supply 201. In the illustrated embodiment, the peripheral system 209 may include any combination of a system memory 211 (e.g., including any combination of RAM and ROM type devices and memory controllers, etc.) and an input/output (I/O) system 213, which input/output system 213 may include a system controller, etc., such as a graphics controller, interrupt controller, keyboard and mouse controller, a system storage device controller (e.g., a controller for a hard disk drive, etc.), and so forth. The illustrated system is exemplary only, as those skilled in the art will appreciate that many processor systems and support devices may be integrated onto a processor chip.
As described in the above embodiments, the regulator 203 has two modes, i.e., CCM and DCM, and the regulator 203 operates in CCM at higher load, and switches to DCM at reduced load while maintaining the switching frequency higher than the audio frequency range, so that not only can the higher efficiency be provided compared with CCM at lighter load, but also the generation of audio noise can be prevented, and the balance between the efficiency and the consumer use experience is considered.
The switching power supply of the embodiment of the invention can adaptively adjust the peak value of the inductance current according to the output current of the circuit, thereby adaptively reducing the peak value of the inductance current according to the output current under a light load state, and then reducing the transmission energy of the inductor in each switching period, thereby avoiding the efficiency reduction caused by overload of the input energy of the circuit while ensuring the switching frequency of the circuit to be above an audio range, and taking into account the balance between the efficiency and the switching frequency.
It should be noted that in this document relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
Embodiments in accordance with the present invention, as described above, are not intended to be exhaustive or to limit the invention to the precise embodiments disclosed. Obviously, many modifications and variations are possible in light of the above teaching. The embodiments were chosen and described in order to best explain the principles of the invention and the practical application, to thereby enable others skilled in the art to best utilize the invention and various modifications as are suited to the particular use contemplated. The invention is limited only by the claims and the full scope and equivalents thereof.

Claims (10)

1. A control circuit of a switching power supply comprising a first switching tube and an inductor connected to a switching node, the control circuit switching the first switching tube between a first and a second state based on an input voltage and an output voltage of the switching power supply, the control circuit comprising:
a clock generation circuit configured to generate a clock signal;
a peak detection circuit configured to generate a current peak voltage signal when an inductance current of the inductor rises to a maximum peak value; and
a logic control circuit configured to switch the first switching tube from a second state to a first state based on the clock signal, and to switch the first switching tube from the first state to the second state based on the current peak voltage signal,
wherein the peak detection circuit is further configured to adaptively adjust the maximum peak value based on an input voltage, an output voltage, and an output current of the switching power supply.
2. The control circuit of claim 1, wherein the peak detection circuit comprises:
a first current multiplier configured to perform a power operation on a first sampling current representing the inductor current, and to divide the first sampling current by a first reference current to obtain a first current signal;
a second current multiplier configured to multiply a second sampling current representative of the output current by a difference current associated with the input voltage and the output voltage, divided by a second reference current, to obtain a second current signal; and
and the positive input end of the first comparator is used for receiving the first current signal, the negative input end of the first comparator is used for receiving the second current signal, and the output end of the first comparator is used for outputting the current peak voltage signal.
3. The control circuit of claim 2, wherein the maximum peak value is determined by the following equation:
wherein I is S1_max VIN and VOUT are input voltage and output voltage of the switching power supply for maximum peak value of inductance current, I OUT The output current of the switching power supply, eta is the transmission efficiency of the power circuit, L is the inductance of the inductor, and fsw is the switching frequency of the switching power supply.
4. The control circuit of claim 1, wherein the clock generation circuit is further configured to adjust the frequency of the clock signal to achieve the down-conversion based on a difference between the error signal and a first reference voltage when the error signal associated with the output voltage is less than the first reference voltage.
5. The control circuit of claim 4, wherein a lowest frequency of the switching power supply is set by adjusting the first reference voltage and the frequency is above an audio range.
6. The control circuit of claim 4, further comprising:
a pattern comparator configured to compare the error signal with a skip threshold voltage and provide a skip signal to the clock generation circuit when the error signal is less than the skip threshold voltage,
wherein the clock generation circuit masks an output of at least one pulse of the clock signal according to the skip signal.
7. The control circuit of claim 6, wherein the clock generation circuit comprises:
a timer module configured to generate a gradually increasing ramp voltage to start timing when the first switching transistor is switched from the second state to the first state, and generate a timing signal when the ramp voltage increases to a second reference voltage; and
a logic operation module configured to perform a logic operation on the timing signal and the skip signal to generate the clock signal.
8. The control circuit of claim 7, wherein the timer module comprises:
a current source and a ramp capacitor connected in series between a supply voltage and ground, the current source configured to provide a charging current to the ramp capacitor to generate the ramp voltage at a first end of the ramp capacitor;
a switching transistor connected in parallel between both ends of the ramp capacitor, wherein on and off of the switching transistor is controlled based on the clock signal;
the positive input end of the second comparator is used for receiving the slope voltage, the negative input end of the second comparator is used for receiving the second reference voltage, and the output end of the second comparator is used for providing the timing signal; and
a transconductance amplifier is configured to provide a discharge current at a first end of the ramp capacitor based on an error between the error signal and the first reference voltage.
9. The control circuit of claim 7, wherein the logic operation module comprises:
an inverter configured to obtain an inverted signal of the timing signal;
a nor gate configured to nor the inverse of the timing signal with the skip signal; and
a narrow pulse module configured to generate the clock signal based on an output of the nor gate.
10. A switching power supply, comprising:
an input for receiving an input voltage;
an output terminal connected to the load for providing an output voltage;
a power circuit coupled to the input and output terminals, the power circuit employing at least one inductor and at least a first switching tube to regulate current provided to the load; and
the control circuit of any of claims 1-9, connected to the first switching tube and configured to switch the first switching tube between first and second states based on the input voltage and the output voltage.
CN202311376775.4A 2023-10-23 2023-10-23 Switching power supply and control circuit thereof Pending CN117650700A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311376775.4A CN117650700A (en) 2023-10-23 2023-10-23 Switching power supply and control circuit thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311376775.4A CN117650700A (en) 2023-10-23 2023-10-23 Switching power supply and control circuit thereof

Publications (1)

Publication Number Publication Date
CN117650700A true CN117650700A (en) 2024-03-05

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