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CN116319475A - Signal analysis method, device, equipment and storage medium - Google Patents

Signal analysis method, device, equipment and storage medium Download PDF

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Publication number
CN116319475A
CN116319475A CN202310260887.7A CN202310260887A CN116319475A CN 116319475 A CN116319475 A CN 116319475A CN 202310260887 A CN202310260887 A CN 202310260887A CN 116319475 A CN116319475 A CN 116319475A
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China
Prior art keywords
pcie
signal
tested
channel
server
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CN202310260887.7A
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Chinese (zh)
Inventor
陈晨
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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Priority to CN202310260887.7A priority Critical patent/CN116319475A/en
Publication of CN116319475A publication Critical patent/CN116319475A/en
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00—Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06—Management of faults, events, alarms or notifications
    • H04L41/0631—Management of faults, events, alarms or notifications using root cause analysis; using analysis of correlation between notifications, alarms or events based on decision criteria, e.g. hierarchy, tree or time analysis
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0876—Network utilisation, e.g. volume of load or congestion level
    • H04L43/0894—Packet rate
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/50—Testing arrangements
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Environmental & Geological Engineering (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

The embodiment of the application relates to the technical field of signal testing, in particular to a signal analysis method, a device, equipment and a storage medium, aiming at improving the speed of PCIE signal consistency analysis. The method comprises the following steps: loading a signal acquisition script into a server to be tested; when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is obtained through a signal acquisition script; determining PCIE channels to be tested from all PCIE channels according to the channel information; when a rate switching instruction aiming at the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through a signal acquisition script; acquiring a signal waveform diagram of a PCIE channel to be tested at a target signal transmission rate; and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.

Description

Signal analysis method, device, equipment and storage medium
Technical Field
The embodiment of the application relates to the technical field of signal testing, in particular to a signal analysis method, a device, equipment and a storage medium.
Background
PCIE (Peripheral Component Interconnect Express, high-speed serial computer extended standard) is a data transmission mode widely used at present, a CPU of a computer transmits data to corresponding equipment through PCIE, signal consistency analysis of PCIE is helpful for guaranteeing safety and stability of PCIE data transmission, and is an important task, and when PCIE signals are subjected to signal consistency analysis, signal waveform diagrams at various rates need to be acquired for corresponding analysis. In the prior art, when the PCIE is subjected to signal consistency analysis, a multichannel high-speed oscilloscope with a triggering function is required to be connected to detected equipment, the oscilloscope sends pulse signals with a certain frequency to the detected equipment, so that switching of signal sending rates in the PCIE channel is realized, further, signal waveform diagrams of the PCIE channel under all the signal sending rates are collected, and the signal consistency analysis of the PCIE is completed.
When performing PCIE signal consistency analysis, if the connected oscilloscope has no trigger function, PCIE signal consistency analysis cannot be performed, and efficiency of signal analysis is further affected.
Disclosure of Invention
The embodiment of the application provides a signal analysis method, a device, equipment and a storage medium, aiming at improving the speed of PCIE signal consistency analysis.
A first aspect of an embodiment of the present application provides a signal analysis method, including:
loading a pre-written signal acquisition script into a server to be tested, wherein the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to a received instruction;
when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is acquired through the signal acquisition script;
determining PCIE channels to be tested from all PCIE channels according to the channel information;
when a rate switching instruction for the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script;
acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;
and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.
Optionally, before the channel information of all PCIE channels corresponding to the CPU in the server to be tested is obtained through the signal acquisition script, the method further includes:
Connecting PC equipment to the server to be tested;
and controlling the server to be tested to run the signal acquisition script through the PC equipment.
Optionally, when receiving a channel information checking instruction for a server to be tested, acquiring, by the signal acquisition script, channel information of all PCIE channels corresponding to a CPU in the server to be tested, including:
when the channel information checking instruction is received, executing the information checking instruction through the signal acquisition script, and carrying out channel scanning on the PCIE channel;
and generating channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.
Optionally, the determining, according to the channel information, a PCIE channel to be tested from the PCIE channels includes:
determining the connection state of each PCIE channel in all PCIE channels according to the channel information;
and taking the PCIE channel with the connection state of being connection-valid as the PCIE channel to be tested.
Optionally, when the rate switching instruction for the PCIE channel to be tested is received, switching, by the signal acquisition script, a signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction, including:
Determining a target signal transmission rate of the PCIE channel according to the rate switching instruction;
and calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script, and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.
Optionally, the obtaining a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate includes:
transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate;
and generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested by the oscilloscope.
Optionally, the performing signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result includes:
comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;
and according to a preset signal analysis rule, combining the waveform diagram comparison result to obtain the signal analysis result.
A second aspect of embodiments of the present application provides a signal analysis apparatus, the apparatus comprising:
The file loading module is used for loading a pre-written signal acquisition script into a server to be tested, and the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to the received instruction;
the channel information acquisition module is used for acquiring the channel information of all PCIE channels corresponding to the CPU in the server to be tested through the signal acquisition script when a channel information checking instruction aiming at the server to be tested is received;
the channel to be tested determining module is used for determining PCIE channels to be tested from all PCIE channels according to the channel information;
the rate switching module is used for switching the signal transmission rate of the PCIE channel to be tested to the target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script when the rate switching instruction for the PCIE channel to be tested is received;
the signal waveform diagram acquisition module is used for acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;
and the signal analysis result acquisition module is used for carrying out signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result.
Optionally, the apparatus further comprises:
the device connection module is used for connecting the PC device to the server to be tested;
and the program running module is used for controlling the server to be tested to run the signal acquisition script through the PC equipment.
Optionally, the channel information obtaining module includes:
the channel scanning sub-module is used for executing the information checking instruction through the signal acquisition script when receiving the channel information checking instruction, and carrying out channel scanning on the PCIE channel;
and the channel information generation sub-module is used for generating the channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.
Optionally, the channel determination module to be tested includes:
a connection state determining submodule, configured to determine a connection state of each PCIE channel in the PCIE channels according to the channel information;
and the channel to be tested determining submodule is used for taking the PCIE channel with the connection state of being effectively connected as the PCIE channel to be tested.
Optionally, the rate switching module includes:
a target signal transmission rate determining submodule, configured to determine a target signal transmission rate of the PCIE channel according to the rate switching instruction;
And the rate switching sub-module is used for calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.
Optionally, the signal waveform diagram obtaining module includes:
the signal transmission sub-module is used for transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate;
and the signal waveform diagram generation sub-module is used for generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested through the oscilloscope.
Optionally, the signal analysis result acquisition module includes:
the waveform comparison result acquisition sub-module is used for comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;
and the signal analysis result acquisition sub-module is used for combining the waveform diagram comparison result according to a preset signal analysis rule to obtain the signal analysis result.
A third aspect of the embodiments of the present application provides a readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the method as described in the first aspect of the present application.
A fourth aspect of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor implements the steps of the method described in the first aspect of the present application when the processor executes the computer program.
By adopting the signal analysis method provided by the application, a pre-written signal acquisition script is loaded into a server to be tested, and the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to the received instruction; when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is acquired through the signal acquisition script; determining PCIE channels to be tested from all PCIE channels according to the channel information; when a rate switching instruction for the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script; acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate; and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result. In the method, a signal acquisition script for executing PCIE signal acquisition is compiled in advance, the signal acquisition script is loaded into a server to be tested, when PCIE signals of the server to be tested are analyzed, the signal acquisition script is operated, channel information of all PCIE channels corresponding to a CPU in the server to be tested is obtained, the PCIE channels to be tested are determined according to the channel information, the signal transmission rate of the PCIE channels to be tested is switched to a target signal transmission rate corresponding to a rate switching instruction through the signal acquisition script, then the PCIE channels are subjected to signal acquisition, a signal waveform diagram of the PCIE channels under the target signal transmission rate is obtained, the signal waveform diagram is analyzed, an analysis result of PCIE signal consistency is obtained, switching of the signal rate is not needed by sending pulse signals through an oscilloscope with a triggering function, the signal transmission rate of the PCIE channels can be switched to any signal transmission rate only through sending instructions to the server to be tested, the time for signal acquisition during signal analysis is saved, and the speed of PCIE signal consistency analysis is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are needed in the description of the embodiments of the present application will be briefly described below, it being obvious that the drawings in the following description are only some embodiments of the present application, and that other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a flow chart of a signal analysis method according to an embodiment of the present application;
fig. 2 is a PCIE channel scan result diagram according to an embodiment of the present application;
FIG. 3 is a PCIE signal test wiring diagram requiring a trigger channel;
FIG. 4 is a PCIE script instruction diagram according to an embodiment of the present application;
FIG. 5 is a schematic illustration of an embodiment of the present application Signal analysis Schematic of the device.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all, of the embodiments of the present application. All other embodiments, which can be made by one of ordinary skill in the art based on the embodiments herein without undue burden, are within the scope of the present application.
Referring to fig. 1, fig. 1 is a flowchart of a signal analysis method according to an embodiment of the present application. As shown in fig. 1, the method comprises the steps of:
s11: and loading a pre-written signal acquisition script into the server to be tested, wherein the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to the received instruction.
In this embodiment, the signal acquisition script is a set of program instructions written for an acquisition task of PCIE (Peripheral Component Interconnect Express, high-speed serial computer extended standard) signals, the script is run, and a corresponding instruction is input to call a corresponding module in the computer to execute the instruction through the script. The PCIE signal is a signal sent by a PCIE channel on a CPU (central processing unit ) of a server to be tested, where the server to be tested is a target device to be tested, and the CPU in the device includes a plurality of PCIE channels.
In this embodiment, for related tasks of PCIE signal acquisition to be executed, a signal acquisition script is written through a program language, a written script file is stored in a server to be tested, and the corresponding signal acquisition task can be executed by running the script.
The signal test script file is copied from the developer's device to the mobile storage device, and then the mobile storage device is connected to the interface of the server to be tested, and the script file is loaded into the server to be tested.
S12: and when a channel information checking instruction aiming at the server to be tested is received, acquiring the channel information of all PCIE channels corresponding to the CPU in the server to be tested through the signal acquisition script.
In this embodiment, the channel information checking instruction is used to trigger the signal acquisition script, perform PCIE channel scanning on the server to be tested, and obtain channel information of all PCIE channels hung under the CPU in the current server to be tested. The channel information includes the name, number, connection state, address of the channel, signal transmission rate of the current channel and other relevant information of the PCIE channel.
In this embodiment, when performing signal consistency analysis of PCIE channels, a signal checking instruction is sent to a server to be tested through a PC end, and when the server to be tested receives the signal checking instruction, a signal test script is run, and the signal test script performs channel scanning on all PCIE channels in a CPU to obtain channel information of all PCIE channels corresponding to the CPU in the server to be tested.
Referring to fig. 2, fig. 2 is a view of PCIE channel scan results proposed in an embodiment of the present application, for example, in 0001:00:01.0-1 def:102-Bridge Device-PCI/PCI Bridge [ x0, GEN 1] (Link down) (s 0 RC 1.0), 0001:00:00.0 is domain of PCIE channel b: d.f address, i.e. address of PCIE channel in the server to be tested, 1def:e102 represents channel number of PCIE channel, bridge Device-PCI/PCI Bridge identifier channel is PCIE channel, [ x0, GEN 1] represents speed of x0 channel is GEN1, GEN1 is speed class, and each speed class corresponds to different signal transmission rate. (Link Down) indicates that the connection status is unconnected), (S0 RC 1.0) indicates the physical channel RC1.0 on CPU number 0. By performing channel scanning on the server to be tested, channel information of all PCIE channels corresponding to the CPU in the server to be tested can be obtained, and the channel information is tidied and displayed in an operation window to form a display result as shown in FIG. 2.
In this embodiment, the information checking instruction is an instruction preset when the signal detection script is written, and the channel information can be checked by the signal detection script by inputting the information checking instruction.
S13: and determining PCIE channels to be tested from all PCIE channels according to the channel information.
In this embodiment, the PCIE channel to be tested is a PCIE channel that needs to perform signal consistency analysis, and the PCIE channel is already connected to the oscilloscope.
In this embodiment, the connection state of each PCIE channel may be checked in PCIE channel information, and according to the connection state of the PCIE channels, whether the PCIE channel has been connected to the oscilloscope may be determined, so as to determine PCIE channels to be tested from all PCIE channels.
For example, looking up PCIE channel information, when the connection state of the display channel (S0 RC 1.0) in PCIE channel information is (link on, connection is normal), determining the (S0 RC 1.0) channel as the channel to be tested.
S14: when a rate switching instruction for the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script.
In this embodiment, the rate switching instruction is configured to switch the signal transmission rate of the PCIE channel. The target signaling rate is the signaling rate that needs to be achieved by the PCIE lanes.
In this embodiment, a rate switching instruction for a PCIE channel to be tested is sent to a server to be tested through a PC end, and the server runs a signal acquisition script when to be tested, and the signal acquisition script invokes a signal rate control module in a CPU to switch a signal sending rate of the PCIE channel to be tested. And switching the signal sending rate of the PCIE channel to be tested from the original signal sending rate to the target signal sending rate.
For example, the rate switching instruction is Preset when the signal acquisition script is written, for example, the format of the instruction is pci comp < domain: b: d.f > < GEN >, and specifically, the instruction pci comp0008: 00:07.0.3 represents that the signal transmission rate of the PCIE channel with address 0008:00:07.0 is switched to GEN3 Preset (Preset value) 7.
S15: and acquiring a signal waveform diagram of the PCIE channel to be tested under the target signal transmission rate.
In this embodiment, the signal waveform diagram is a waveform diagram corresponding to the signal generated according to the PCIE signal, and shows the change of the amplitude during signal transmission.
In this embodiment, a PCIE channel to be tested on a server to be tested is connected to an oscilloscope in advance, and when a control CPU sends a signal at a target signal rate, the oscilloscope collects a PCIE signal, and generates a signal waveform diagram according to the signal. When testing a PCIE channel, signal waveform diagrams at different signal sending rates need to be collected, so as to analyze signal consistency of the PCIE channel.
In general, when performing PCIE signal consistency analysis, one data path (Lane) of a physical link of a PCIE bus is composed of two sets of differential signals, and 4 signal lines in total, where a component of a transmitting end (TX) and a component of a receiving end (RX) are connected by using one set of differential signals, the link is also called a transmitting end link, and a receiving end receiving link, and a RX component of the transmitting end and a TX component of the receiving end are connected by using another set of differential signals, and the link is also called a transmitting end receiving link, and is also called a transmitting link of the receiving end. One PCIE link may consist of multiple lanes.
The PCIE link uses differential signals to carry out data transmission, one differential signal consists of two signals of D+ and D-, a signal receiving end judges whether a logic '1' or a logic '0' is sent by a sending end by comparing the difference values of the two signals, and compared with a single-ended signal, the anti-interference capability of the differential signal is stronger because the differential signals are required to be equal in length, equal in width, close to and on the same layer during wiring. The external interference noise is thus "on" and "simultaneous" for the two differential signals. The difference value is 0 in the rational case, and has less influence on the logic value of the signal, so that the differential signal can use a higher bus frequency.
In order to ensure stable execution of transmission and reception of high-speed transmission data, PCIE is subjected to signal acquisition by an oscilloscope, so that signal waveform diagrams of PCIE signals under different signal transmission rates are acquired, and further signal consistency analysis is performed.
Referring to fig. 3, fig. 3 is a PCIE signal test connection diagram of a required trigger channel, fig. 3 shows a conventional connection method during PCIE test, a multi-channel high-speed oscilloscope with a trigger function is used to connect an always signal CLK and a TX end signal of a PCIE slot of a server to be tested, and connect a trigger channel of the oscilloscope and an RX end of the PCIE channel to be tested, and during the test, channels 1 and 3 of the oscilloscope collect PCIE TX signal waveforms sent by a CPU, channels 2 and 4 collect clock signal waveforms sent by the CLK, and the trigger channel is connected to PCIE RX. The oscilloscope sends out a 200mv pulse signal, the signal is sent to the RX end of the PCIE channel, the rate switching of the signal of the TX end is realized, and then the signal waveform is acquired.
In this embodiment, unlike the connection method in fig. 3, the oscilloscope with the function of sending the trigger signal is not required, and only the channel of the oscilloscope needs to be connected to the TX end of the PCIE slot, so that the PCIE signal can be received, and the sending rate of the signal is automatically adjusted by the signal collection script control CPU, so that the signal collection is more convenient, the requirement on the oscilloscope is greatly reduced, the cost of signal analysis is saved, and the rate of signal analysis is improved.
S16: and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.
In this embodiment, after the signal waveform diagram is obtained, signal consistency analysis is performed on the PCIE channels to be tested according to a preset PCIE signal analysis rule, so as to obtain a signal analysis result.
In this embodiment, after the signal waveform diagram is acquired, the signal waveform diagram is acquired through the server to be detected, and the signal waveform diagram is compared with the pre-stored standard signal waveform diagram, so that whether the waveform in the acquired signal waveform diagram is abnormal or not can be determined, and then the problem of the existence of the PCIE channel is judged according to the preset PCIE signal analysis rule.
In this embodiment, related tasks of signal acquisition of PCIE channels in the server to be tested are executed through a pre-written signal acquisition script, and signal transmission rates of PCIE channels do not need to be adjusted by transmitting pulses, and only the signal transmission rates of PCIE channels need to be adjusted to required rates by inputting instructions, so that cost of signal consistency analysis is saved, and rate of signal consistency analysis is improved.
In another embodiment of the present application, before step S12, the method further includes:
s21: and connecting the PC equipment to the server to be tested.
In this embodiment, the PC (personal computer) device is a computer end of a tester, and the PC device is connected to a system serial port of the server to be tested through a serial port line, so that the PC device can control the server to be tested.
In this embodiment, when performing PCIE signal consistency analysis on a server to be tested, the PC device is connected to the server to be tested.
The PC device may be a desktop or tablet computer, for example.
S22: and controlling the server to be tested to run the signal acquisition script through the PC equipment.
In this embodiment, after the PC device is connected to the server to be tested, the server to be tested is controlled to run the signal acquisition script.
In this embodiment, terminal simulation software is installed on the PC device, the terminal simulation software is used to run a signal acquisition script, the terminal simulation software provides a port, and a tester can interact with a server to be tested through the terminal simulation software, send an instruction to the server to be tested, and receive data returned by the server to be tested.
The terminal simulation software is not limited herein, and for example, putty (serial interface connection software) or xSHELL (secure terminal simulation software) may be used.
In this embodiment, referring to fig. 4, fig. 4 is a PCIE script instruction diagram provided in an embodiment of the present application, and each instruction in fig. 4 is input to control a script to execute a corresponding function. After a tester starts a signal acquisition script, after a command 'pci hellp' is input in a window of terminal simulation software, PCIE related commands preset in the signal acquisition script are displayed, and the tester can realize corresponding functions according to the commands.
In the embodiment, the PC equipment is connected with the server to be tested, and the script in the server to be tested is operated by using the PC equipment, so that the PCIE signal can be conveniently and rapidly acquired and analyzed by a tester.
In another embodiment of the present application, when receiving a channel information checking instruction for a server to be tested, obtaining, by the signal acquisition script, channel information of all PCIE channels corresponding to a CPU in the server to be tested includes:
S31: and when the channel information checking instruction is received, executing the information checking instruction through the signal acquisition script, and carrying out channel scanning on the PCIE channel.
In this embodiment, when the server to be tested receives the channel information checking instruction, the signal acquisition script is run, the information checking instruction is executed, and channel scanning is performed on all PCIE channels corresponding to the CPU in the server to be tested. By performing channel scanning on the CPU, the connection state of the PCIE channel can be known, and the information such as the signal sending rate of the PCIE channel can be obtained.
S32: and generating channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.
In this embodiment, after the connection state and the current signal sending rate of each PCIE channel are obtained by scanning, channel information of PCIE channels is generated, as shown in fig. 2, the channel information of PCIE is displayed in a centralized manner in a window interface of terminal simulation software of the PC device, and a tester can view the channel information of any PCIE channel.
In this embodiment, when performing signal consistency analysis of PCIE channels, a corresponding instruction is input, and channel information of all PCIE channels can be directly checked, so that speed of performing PCIE signal consistency analysis is improved.
In another embodiment of the present application, determining, according to the channel information, a PCIE channel to be tested from among the PCIE channels includes:
s41: and determining the connection state of each PCIE channel in all PCIE channels according to the channel information.
In this embodiment, the channel information of the PCIE channels includes a connection state of each PCIE channel, and the connection state of the PCIE channels can be determined by looking at the channel information of the PCIE channels, where the connection state is divided into a connection valid state and a non-connection state.
Illustratively, the connection valid state is denoted as link on and the unconnected state is identified as link down.
S42: and taking the PCIE channel with the connection state of being connection-valid as the PCIE channel to be tested.
In this embodiment, a PCIE channel with a connection state of being connection-valid is used as a PCIE channel to be tested.
In this embodiment, when the connection state of the PCIE channel is that connection is valid, it is indicated that the PCIE channel is already connected to the oscilloscope, and signals of the PCIE channel may be sent to the oscilloscope, so that signal acquisition of the PCIE channel is completed. When the PCIE signal of another channel needs to be acquired, the oscilloscope can be reconnected to the other PCIE channel, or all channels can be connected to the oscilloscope in advance, and when the channel signal of a certain PCIE channel needs to be acquired, the PCIE channel signal needing to be acquired is designated through an instruction.
In this embodiment, the PCIE channel to be tested is determined according to the channel information of the PCIE channel, so that it is ensured that the signals of the PCIE channel to be tested can be accurately collected.
In another embodiment of the present application, when a rate switching instruction for the PCIE channel to be tested is received, switching, by the signal acquisition script, a signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction includes:
s51: and determining the target signal transmission rate of the PCIE channel according to the rate switching instruction.
In this embodiment, the rate switching instruction includes a channel address of a PCIE channel and a target signal transmission rate to which the PCIE channel needs to be switched.
In this embodiment, when the server to be tested receives the rate switching instruction, the target signal transmission rate included in the rate switching instruction is read, and the specific signal transmission rate to which the PCIE channel to be tested needs to be switched is determined.
Illustratively, when the instruction is "pcicomp 0008:00:07.0.3 7", the target signaling rate contained therein is GEN3, and the specific value of the signaling rate of GEN3 is 8Gb/s.
S52: and calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script, and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.
In this embodiment, the channel rate adjustment module is a module integrated in the CPU and is dedicated to adjusting the sending rate of PCIE channel signals.
In this embodiment, after determining the target signal sending rate, the server to be tested invokes a PCIE channel rate adjustment module in a CPU of the server to be tested through a signal acquisition script, and switches the signal sending rate of the PCIE channel to be tested from the original sending rate to the target signal sending rate.
In this embodiment, the script control CPU adjusts the signaling rate of the PCIE channel, so that the signaling rate of the PCIE channel may implement skip switching, and effectively improve the rate of signal consistency analysis.
In another embodiment of the present application, the obtaining a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate includes:
s61: and transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate.
In this embodiment, after adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate, the server to be tested transmits the signal of the PCIE channel to the oscilloscope at the target signal transmission rate.
S62: and generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested by the oscilloscope.
In this embodiment, when the oscilloscope receives a signal sent by the PCIE channel, the oscilloscope generates a waveform chart corresponding to the signal according to the signal of the PCIE channel to be tested.
In this embodiment, the oscilloscope displays a corresponding signal waveform diagram on a display screen of the oscilloscope according to the amplitude of the signal during the signal receiving period, and after the waveform diagram is displayed, the oscilloscope may also store the waveform diagram and send the waveform diagram to the server to be tested.
In another embodiment of the present application, the performing signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result includes:
s71: and comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result.
In this embodiment, the standard signal waveform diagram is a waveform diagram of the PCIE channel signal under a normal condition, and the standard signal waveform diagram is stored in advance in the server to be tested.
In this embodiment, after obtaining a signal waveform diagram of a PCIE channel to be tested, a server to be tested obtains a pre-stored standard signal waveform diagram from a storage space of the server, a rate of a signal corresponding to the standard signal waveform diagram is a current rate of the PCIE channel to be tested, and the standard signal waveform diagram is compared with the signal waveform diagram of the PCIE channel to be tested to obtain a waveform diagram comparison result.
For example, when there is a difference between the two waveforms, a place different from the standard PCIE waveform may be marked in the PCIE waveform to be tested, and the marked PCIE waveform may be used as a waveform comparison result.
S72: and according to a preset signal analysis rule, combining the waveform diagram comparison result to obtain the signal analysis result.
In this embodiment, the signal analysis rule is a rule between the summarized image of the waveform chart and the corresponding problem according to the problem existing in the signal waveform chart in the historical signal consistency analysis process, and the preset signal analysis rule is stored in the server to be tested.
In this embodiment, after obtaining the waveform diagram comparison result, the server to be tested checks the waveform diagram comparison result according to a preset signal analysis rule, and when the problem of the signal waveform in the waveform diagram comparison result is the same as the problem in the signal analysis rule, a corresponding signal analysis result can be obtained.
In this embodiment, the signal analysis rules may be set and summarized by themselves, and the newly added signal analysis rules may be added to the storage space of the server to be tested at any time.
In this embodiment, after the signal waveform diagram of the PCIE channel to be tested is acquired, according to the abnormality occurring in the signal waveform diagram, a corresponding signal analysis result is obtained by combining with a preset signal analysis rule, so that the speed of PCIE signal consistency analysis is improved.
Based on the same inventive concept, an embodiment of the present application provides a signal analysis device. Referring to fig. 5, fig. 5 is a schematic diagram of a signal analysis device 500 according to an embodiment of the present application. As shown in fig. 5, the apparatus includes:
the file loading module 501 is configured to load a pre-written signal acquisition script into a server to be tested, where the signal acquisition script is configured to execute a task related to PCIE signal acquisition of the server to be tested according to a received instruction;
the channel information obtaining module 502 is configured to obtain, when a channel information viewing instruction for a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested through the signal acquisition script;
a channel to be tested determining module 503, configured to determine a PCIE channel to be tested from the PCIE channels according to the channel information;
the rate switching module 504 is configured to switch, when a rate switching instruction for the PCIE channel to be tested is received, a signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script;
a signal waveform diagram obtaining module 505, configured to obtain a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;
And the signal analysis result obtaining module 506 is configured to perform signal analysis on the PCIE channel to be tested according to the signal waveform diagram, so as to obtain a signal analysis result.
Optionally, the apparatus further comprises:
the device connection module is used for connecting the PC device to the server to be tested;
and the program running module is used for controlling the server to be tested to run the signal acquisition script through the PC equipment.
Optionally, the channel information obtaining module includes:
the channel scanning sub-module is used for executing the information checking instruction through the signal acquisition script when receiving the channel information checking instruction, and carrying out channel scanning on the PCIE channel;
and the channel information generation sub-module is used for generating the channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.
Optionally, the channel determination module to be tested includes:
a connection state determining submodule, configured to determine a connection state of each PCIE channel in the PCIE channels according to the channel information;
and the channel to be tested determining submodule is used for taking the PCIE channel with the connection state of being effectively connected as the PCIE channel to be tested.
Optionally, the rate switching module includes:
a target signal transmission rate determining submodule, configured to determine a target signal transmission rate of the PCIE channel according to the rate switching instruction;
and the rate switching sub-module is used for calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.
Optionally, the signal waveform diagram obtaining module includes:
the signal transmission sub-module is used for transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate;
and the signal waveform diagram generation sub-module is used for generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested through the oscilloscope.
Optionally, the signal analysis result acquisition module includes:
the waveform comparison result acquisition sub-module is used for comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;
and the signal analysis result acquisition sub-module is used for combining the waveform diagram comparison result according to a preset signal analysis rule to obtain the signal analysis result.
Based on the same inventive concept, another embodiment of the present application provides a readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the signal analysis method according to any of the above embodiments of the present application.
Based on the same inventive concept, another embodiment of the present application provides an electronic device, including a memory, a processor, and a computer program stored on the memory and executable on the processor, where the processor executes the steps in the signal analysis method according to any one of the foregoing embodiments of the present application.
For the device embodiments, since they are substantially similar to the method embodiments, the description is relatively simple, and reference is made to the description of the method embodiments for relevant points.
In this specification, each embodiment is described in a progressive manner, and each embodiment is mainly described by differences from other embodiments, and identical and similar parts between the embodiments are all enough to be referred to each other.
It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus, or computer program product. Accordingly, the present embodiments may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, embodiments of the present application may take the form of a computer program product on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) having computer-usable program code embodied therein.
Embodiments of the present application are described with reference to flowchart illustrations and/or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
While preferred embodiments of the present embodiments have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the present application.
Finally, it is further noted that relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article or terminal device comprising the element.
The foregoing has described in detail the methods, apparatus, devices and storage medium for signal analysis provided by the present application, and specific examples have been applied herein to illustrate the principles and embodiments of the present application, and the above examples are only used to help understand the methods and core ideas of the present application; meanwhile, as those skilled in the art will have modifications in the specific embodiments and application scope in accordance with the ideas of the present application, the present description should not be construed as limiting the present application in view of the above.

Claims (10)

1. A method of signal analysis, the method comprising:
loading a pre-written signal acquisition script into a server to be tested, wherein the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to a received instruction;
when a channel information checking instruction aiming at a server to be tested is received, channel information of all PCIE channels corresponding to a CPU in the server to be tested is acquired through the signal acquisition script;
determining PCIE channels to be tested from all PCIE channels according to the channel information;
when a rate switching instruction for the PCIE channel to be tested is received, switching the signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script;
Acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;
and according to the signal waveform diagram, carrying out signal analysis on the PCIE channel to be tested to obtain a signal analysis result.
2. The method of claim 1, wherein before obtaining channel information of all PCIE channels corresponding to CPUs in the server to be tested through the signal acquisition script, the method further comprises:
connecting PC equipment to the server to be tested;
and controlling the server to be tested to run the signal acquisition script through the PC equipment.
3. The method of claim 1, wherein when the channel information viewing instruction for the server to be tested is received, obtaining, by the signal acquisition script, channel information of all PCIE channels corresponding to the CPU in the server to be tested, includes:
when the channel information checking instruction is received, executing the information checking instruction through the signal acquisition script, and carrying out channel scanning on the PCIE channel;
and generating channel information of the PCIE channel according to the connection state of the PCIE channel obtained by scanning and the current signal sending rate.
4. The method of claim 1, wherein the determining PCIE lanes to be tested from the PCIE lanes according to the lane information includes:
determining the connection state of each PCIE channel in all PCIE channels according to the channel information;
and taking the PCIE channel with the connection state of being connection-valid as the PCIE channel to be tested.
5. The method of claim 1, wherein when the rate switching instruction for the PCIE channel to be tested is received, switching, by the signal acquisition script, a signal transmission rate of the PCIE channel to be tested to a target signal transmission rate corresponding to the rate switching instruction, includes:
determining a target signal transmission rate of the PCIE channel according to the rate switching instruction;
and calling a PCIE channel rate adjusting module of the CPU through the signal acquisition script, and adjusting the signal transmission rate of the PCIE channel to the target signal transmission rate.
6. The method of claim 1, wherein the obtaining the signal waveform diagram of the PCIE lane to be tested at the target signal transmission rate comprises:
Transmitting the signals of the PCIE channels to be tested to an oscilloscope which is connected to the server to be tested in advance at the target signal transmission rate;
and generating a signal waveform diagram corresponding to the signal according to the signal of the PCIE channel to be tested by the oscilloscope.
7. The method of claim 1, wherein the performing signal analysis on the PCIE lane to be tested according to the signal waveform diagram to obtain a signal analysis result includes:
comparing the signal waveform diagram with a pre-stored standard signal waveform diagram to obtain a waveform comparison result;
and according to a preset signal analysis rule, combining the waveform diagram comparison result to obtain the signal analysis result.
8. A signal analysis device, the device comprising:
the file loading module is used for loading a pre-written signal acquisition script into a server to be tested, and the signal acquisition script is used for executing related tasks aiming at PCIE signal acquisition of the server to be tested according to the received instruction;
the channel information acquisition module is used for acquiring the channel information of all PCIE channels corresponding to the CPU in the server to be tested through the signal acquisition script when a channel information checking instruction aiming at the server to be tested is received;
The channel to be tested determining module is used for determining PCIE channels to be tested from all PCIE channels according to the channel information;
the rate switching module is used for switching the signal transmission rate of the PCIE channel to be tested to the target signal transmission rate corresponding to the rate switching instruction through the signal acquisition script when the rate switching instruction for the PCIE channel to be tested is received;
the signal waveform diagram acquisition module is used for acquiring a signal waveform diagram of the PCIE channel to be tested at the target signal transmission rate;
and the signal analysis result acquisition module is used for carrying out signal analysis on the PCIE channel to be tested according to the signal waveform diagram to obtain a signal analysis result.
9. A computer readable storage medium, on which a computer program is stored, characterized in that the computer program, when being executed by a processor, implements the steps of the method according to any one of claims 1 to 7.
10. An electronic device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the processor implements the steps of the method according to any of claims 1 to 7 when executing the computer program.
CN202310260887.7A 2023-03-17 2023-03-17 Signal analysis method, device, equipment and storage medium Pending CN116319475A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116522878A (en) * 2023-07-04 2023-08-01 成都领目科技有限公司 Method, device and medium for maintaining consistency import report of oscilloscope test data

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116522878A (en) * 2023-07-04 2023-08-01 成都领目科技有限公司 Method, device and medium for maintaining consistency import report of oscilloscope test data
CN116522878B (en) * 2023-07-04 2023-10-24 成都领目科技有限公司 Method, device and medium for maintaining consistency import report of oscilloscope test data

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