CN114238005B - GPIO anti-shake function test method, system, device and chip - Google Patents

Abstract

The invention discloses a GPIO anti-shake function testing method, system, device and chip. The method is applied to the chip. First, the GPIO to be detected and the auxiliary detected GPIO in the chip are determined. Internally generate an interference signal of any time width, and send the interference signal to the GPIO to be detected through the auxiliary detection GPIO, and then receive the interference signal received by the to-be-detected GPIO after anti-shake processing, by judging that the to-be-detected GPIO has undergone anti-shake processing Whether the number of all interference signals received after the function is equal to the first preset number is used to judge whether the anti-shake function of the GPIO to be detected is normal. It can be seen that this method does not need to add an external signal generator, and can also generate test requirements. interference signals of any length of time.

Description

A GPIO anti-shake function testing method, system, device and chip

technical field

The present invention relates to the technical field of chips, in particular to a method, system, device and chip for testing a GPIO anti-shake function.

Background technique

With the development of chip technology, the functions of the chip are also increasing. At present, the chip mostly uses GPIO (General-purpose input/output, general-purpose input and output pins). One GPIO can multiplex multiple signal pins, which is convenient for users to pass GPIO customizes the function of the chip. The anti-shake function of GPIO can remove the interference signal in the signal input to the GPIO, which directly affects the accuracy of the signal input to the chip through the GPIO. Therefore, it is particularly important to test the anti-shake function of the GPIO.

In the prior art, an external signal source is usually used to test the anti-shake function of the GPIO, and the analog interference signal generated by the external signal source is input into the chip through the GPIO, and then the chip is judged by observing whether the analog interference signal is received. Whether the GPIO has filtered out the interference signal, so as to judge whether the anti-shake function of the GPIO is in good condition. However, the interference signal generated by the external signal source may not meet the time width of the interference signal required for the anti-shake function test of GPIO, that is, the external signal source may not be able to generate the appropriate interference signal required for the test, which has certain limitations. In addition, The external signal source requires an additional signal generator, which increases the cost of testing.

SUMMARY OF THE INVENTION

The purpose of the present invention is to provide a GPIO anti-shake function testing method, system, device and chip, which does not need to add an additional signal generator, and can also generate interference signals of any length of time required for testing.

In order to solve the above technical problems, the present invention provides a GPIO anti-shake function test method, which is applied to a chip. The GPIO anti-shake function test method includes:

Determine the first GPIO to be detected and the second GPIO to assist in the detection of the chip;

generating M interference signals and sending the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

Receive N interference signals after the anti-shake processing of the first GPIO through the first GPIO, where N is an integer not less than 0, and N is not greater than M;

judging whether the total number of the N interference signals is equal to a first preset value;

If so, it is determined that the anti-shake function of the first GPIO is normal; otherwise, it is determined that the anti-shake function of the first GPIO is abnormal.

Preferably, M interference signals are generated and sent to the first GPIO through the second GPIO, where M is an integer not less than 1, including:

M interference signals with different time widths are generated, and the M interference signals are sent to the first GPIO through the second GPIO, where M is an integer not less than 1.

Preferably, M interference signals are generated and sent to the first GPIO through the second GPIO, where M is an integer not less than 1, including:

generating A interference signals with a time width less than the first time width threshold and B interference signals with a time width not less than the first time width threshold, where A and B are both integers not less than 0;

A number of interference signals with the time width less than the first time width threshold and B interference signals with the time width not less than the first time width threshold are sent to the first GPIO through the second GPIO ;

Determining whether the total number of the N interference signals is equal to the first preset value includes:

It is determined whether the total number of the N interference signals is B, and if so, it is determined that the anti-shake function of the first GPIO is normal; otherwise, it is determined that the anti-shake function of the first GPIO is abnormal.

Preferably, judging whether the total number of the N interference signals is equal to the first preset value includes:

Perform edge detection on the N interference signals, and obtain a total of J level transitions in the N interference signals;

Determine whether J/2 is equal to the first preset value; if yes, determine that the anti-shake function of the first GPIO is normal, otherwise, determine that the anti-shake function of the first GPIO is abnormal.

Preferably, after determining that the anti-shake function of the first GPIO is abnormal, the method further includes:

Record that the anti-shake function of the first GPIO is abnormal and save it.

Preferably, after determining that the anti-shake function of the first GPIO is normal or determining that the anti-shake function of the first GPIO is abnormal, the method further includes:

generating M interference signals and sending the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

Receive, through the second GPIO, one interference signal after the anti-shake processing of the second GPIO, where I is an integer not less than 0, and I is not greater than M;

Judging whether the total number of 1 described interference signals is equal to the second preset value;

If so, it is determined that the anti-shake function of the second GPIO is normal; otherwise, it is determined that the anti-shake function of the second GPIO is abnormal.

Preferably, after determining that the anti-shake function of the second GPIO is abnormal, the method further includes:

Record that the anti-shake function of the second GPIO is abnormal and save it.

In order to solve the above-mentioned technical problems, the present invention also provides a GPIO anti-shake function test system, including:

a GPIO determination unit, configured to determine the first GPIO to be detected and the second GPIO to assist in the detection;

an interference signal generating unit, configured to generate M interference signals and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

an interference signal receiving unit, configured to receive, through the first GPIO, N interference signals after the anti-shake processing of the first GPIO, where N is an integer not less than 0, and N is not greater than M;

An anti-shake function determination unit, configured to determine whether the total number of the N interference signals is equal to a first preset value, if so, determine that the anti-shake function of the first GPIO is normal, otherwise, determine that the anti-shake function of the first GPIO is The shaking function is abnormal.

In order to solve the above-mentioned technical problems, the present invention also provides a GPIO anti-shake function test device, including:

memory for storing computer programs;

The processor is configured to execute the computer program to realize the steps of the above-mentioned GPIO anti-shake function test method.

In order to solve the above technical problems, the present invention also provides a chip, including the above-mentioned GPIO anti-shake function test device.

The invention provides a GPIO anti-shake function testing method, system, device and chip. First, the GPIO to be detected and the auxiliary detected GPIO of the chip are determined, and then according to the internal clock of the chip itself, an arbitrary time width can be generated inside the chip. Interference signal, and send the interference signal to the GPIO to be detected through the auxiliary detection GPIO, and then receive the interference signal received by the GPIO to be detected after anti-shake processing, by judging all the received GPIO after the anti-shake function. Whether the number of interference signals is equal to the first preset number is used to judge whether the anti-shake function of the GPIO to be detected is normal. It can be seen that this method does not need to add an external signal generator, and can also generate interference for any length of time required for the test. Signal.

Description of drawings

In order to illustrate the technical solutions in the embodiments of the present invention more clearly, the following briefly introduces the prior art and the accompanying drawings required in the embodiments. Obviously, the drawings in the following description are only some of the present invention. In the embodiments, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

Fig. 1 is the flow chart of a kind of GPIO anti-shake function test method provided by the present invention;

2 is a schematic structural diagram of a GPIO anti-shake function test system provided by the present invention;

3 is a schematic structural diagram of a GPIO anti-shake function testing device provided by the present invention;

FIG. 4 is a schematic structural diagram of a chip provided by the present invention.

Detailed ways

The core of the present invention is to provide a GPIO anti-shake function testing method, system, device and chip, which does not need to add an additional signal generator, and can also generate interference signals of any length of time required for testing.

In order to make the purposes, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments These are some embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.

Please refer to FIG. 1. FIG. 1 is a flowchart of a method for testing a GPIO anti-shake function provided by the present invention, applied to a chip, including:

S11: Determine the first GPIO to be detected and the second GPIO to assist in the detection of the chip;

S12: Generate M interference signals and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

S13: Receive N interference signals after the first GPIO anti-shake processing through the first GPIO, where N is an integer not less than 0, and N is not greater than M;

S14: determine whether the total number of N interference signals is equal to the first preset value, if so, go to S15, otherwise, go to S16;

S15: determine that the anti-shake function of the first GPIO is normal;

S16: It is determined that the anti-shake function of the first GPIO is abnormal.

At present, in the prior art, an external signal source is usually used to test the anti-shake function of the GPIO, the signal generated by the external signal source is used to simulate the interference signal, and after the simulated interference signal is input to the chip through the GPIO to be detected, Observe whether the chip receives the simulated interference signal to judge whether the anti-shake function of the chip can filter out the interference signal, so as to judge whether the anti-shake function of the GPIO is normal. However, sometimes the interference signal generated by the external signal source may not meet the time width of the interference signal required by the anti-shake function test of GPIO, and the external signal source requires an additional signal generator, which increases the test cost.

In order to solve the above problem, in this embodiment, an anti-shake function test module is designed inside the chip, and through this module, the test of the anti-shake function of the GPIO of the chip can be completed. Specifically, when a GPIO receives a signal, there will be a time width threshold for enabling the anti-shake function. This time width threshold can be configured according to the actual use situation. The present invention does not make special restrictions here. For example, when the configured GPIO is activated When the time width threshold of the anti-shake function is 10us, the GPIO will consider that the received signals with a time width of less than 10us are all interference signals and perform filtering operations. In this scheme, the first GPIO to be detected and the auxiliary detection are determined. After the second GPIO is selected, M interference signals will be generated inside the chip, and the M interference signals will be sent to the first GPIO through the second GPIO, and then the remaining N interferences received by the first GPIO after anti-shake processing will be received. Signal, it should be noted that the time width of the M interference signals here can be configured according to the needs of the tester. The tester can know the normal time width of the M interference signals according to the time width threshold of the GPIO to start the anti-shake function and the time width of the M interference signals sent. Under normal circumstances, the number of remaining interference signals after the first GPIO anti-shake processing, and finally by judging whether the number of the remaining N interference signals actually received is equal to the remaining interference after the first GPIO anti-shake processing under normal circumstances. The number of signals is used to judge whether the anti-shake function of the first GPIO is normal. For example, when the time width threshold of the configured GPIO to activate the anti-shake function is 10us, the tester can generate 11 interference signals of 1us, 2us, . One GPIO. If the anti-shake function of the first GPIO is normal at this time, the interference signals with a time width of less than 10us should be filtered out, that is, the final received interference signal should only have two interference signals with a time width of 10us and 11us. , when the tester detects and finds that the number of interference signals finally received is two, it can prove that the anti-shake function of the first GPIO is normal; otherwise, it proves that the anti-shake function of the first GPIO is abnormal.

It should be noted that the module inside the chip used to generate the interference signal adopts the clock with the fastest frequency inside the chip. For example, the fastest clock inside the chip is k, then the clock period Tm=1/k, so the module can generate The time width of the interference signal with the smallest time width is Tm, and then the interference signal with the time width of N*Tm can be generated by configuring the internal registers of the chip, where the size of N can be configured according to the actual demand, thereby generating any time. Width of the interference signal, in order to more comprehensively verify whether the anti-shake function of the chip's GPIO is normal.

To sum up, the present invention provides a GPIO anti-shake function test method, which firstly determines the GPIO to be detected and the GPIO for auxiliary detection of the chip, and then according to the internal clock of the chip itself, an interference signal of any time width can be generated inside the chip, Send the interference signal to the GPIO to be detected through the auxiliary detection GPIO, and then receive the interference signal received by the to-be-detected GPIO after anti-shake processing, by judging the total interference signal received by the to-be-detected GPIO after the anti-shake function. Whether the number is equal to the first preset number is used to determine whether the anti-shake function of the GPIO to be detected is normal. It can be seen that this method does not need to add an external signal generator, and can also generate interference signals of any length of time required for the test.

On the basis of the above-mentioned embodiment:

As a preferred embodiment, M interference signals are generated and sent to the first GPIO through the second GPIO, where M is an integer not less than 1, including:

Generate M interference signals with different time widths and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1.

In this embodiment, considering the actual use situation, the tester may need multiple interference signals with different time widths. Therefore, in this embodiment, the M interference signals generated may be M interference signals with different time widths, so as to Make the test more general.

As a preferred embodiment, M interference signals are generated and sent to the first GPIO through the second GPIO, where M is an integer not less than 1, including:

generating A interference signals with a time width less than the first time width threshold and B interference signals with a time width not less than the first time width threshold, where A and B are both integers not less than 0;

A number of interference signals with a time width less than the first time width threshold and B interference signals with a time width not less than the first time width threshold are sent to the first GPIO through the second GPIO;

Determine whether the total number of N interference signals is equal to the first preset value, including:

It is determined whether the total number of N interference signals is B, and if so, it is determined that the anti-shake function of the first GPIO is normal; otherwise, it is determined that the anti-shake function of the first GPIO is abnormal.

In this embodiment, considering that the time width threshold for enabling the anti-shake function of the GPIO can be configured by the tester, in this embodiment, the tester can also generate several time widths smaller than the first time threshold according to the configured first time threshold. The interference signal with the time width threshold and several interference signals with the time width not less than the first time width threshold, and finally determine whether the number of interference signals received after the first GPIO anti-shake processing is equal to the number of generated time widths not less than the first time width. Whether the anti-shake function of the first GPIO is normal can be judged by the number of interference signals with a time width threshold, which improves the feasibility of the solution.

As a preferred embodiment, judging whether the total number of N interference signals is equal to the first preset value includes:

Perform edge detection on N interference signals, and obtain a total of J level transitions in the N interference signals;

It is determined whether J/2 is equal to the first preset value; if so, it is determined that the anti-shake function of the first GPIO is normal, otherwise, it is determined that the anti-shake function of the first GPIO is abnormal.

In this embodiment, the chip determines the number of received interference signals by performing edge detection on the received interference signals. Specifically, interference signals of different time widths have rising edges and falling edges, that is, an interference signal should correspond to Two edge transitions, by detecting the total number of edge transitions in all received interference signals and dividing the total number of edge transitions by two, the result should be the number of received interference signals. Judge in this way Whether the number of interference signals is equal to the first preset value is implemented in a simple manner.

As a preferred embodiment, after determining that the anti-shake function of the first GPIO is abnormal, the method further includes:

Record that the anti-shake function of the first GPIO is abnormal and save it.

In this embodiment, considering that when there is a problem with the anti-shake function of the GPIO, the user may need to check the faulty GPIO later. Therefore, in this solution, after it is determined that the anti-shake function of the first GPIO is abnormal, it will also record, so as to User follow-up troubleshooting.

As a preferred embodiment, after determining that the anti-shake function of the first GPIO is normal or determining that the anti-shake function of the first GPIO is abnormal, the method further includes:

Generate M interference signals and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

Receive I interference signals after the second GPIO anti-shake processing through the second GPIO, where I is an integer not less than 0, and I is not greater than M;

Determine whether the total number of 1 interference signals is equal to the second preset value;

If so, it is determined that the anti-shake function of the second GPIO is normal; otherwise, it is determined that the anti-shake function of the second GPIO is abnormal.

In this embodiment, considering that the anti-shake function of GPIO is only reflected in the process of GPIO receiving data, whether the anti-shake function of GPIO is normal does not affect the function of sending data of GPIO. Therefore, in this solution, after judging the anti-shake function of the first GPIO After the function is normal, the functions of the first GPIO and the second GPIO will be exchanged, that is, the first GPIO sends an interference signal to the second GPIO, so as to complete the test of the anti-shake function of the second GPIO. This method can realize the mutual testing of two GPIOs, which increases the testing efficiency.

As a preferred embodiment, after determining that the anti-shake function of the second GPIO is abnormal, the method further includes:

Record that the anti-shake function of the second GPIO is abnormal and save it.

In this embodiment, considering that when there is a problem with the anti-shake function of the GPIO, the user may need to check the faulty GPIO later. Therefore, in this solution, after it is determined that the anti-shake function of the second GPIO is abnormal, it will also record, so that the User follow-up troubleshooting.

The present invention also provides a GPIO anti-shake function test system, please refer to FIG. 2, FIG. 2 is a schematic structural diagram of a GPIO anti-shake function test system provided by the present invention, including:

GPIO determination unit 21, for determining the first GPIO to be detected and the second GPIO to assist in the detection;

The interference signal generating unit 22 is used to generate M interference signals and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1;

The interference signal receiving unit 23 is configured to receive N interference signals after the anti-shake processing of the first GPIO through the first GPIO, where N is an integer not less than 0, and N is not greater than M;

The anti-shake function judging unit 24 is configured to determine whether the total number of N interference signals is equal to the first preset value, if so, determine that the anti-shake function of the first GPIO is normal, otherwise, determine that the anti-shake function of the first GPIO is abnormal.

For the introduction of a GPIO anti-shake function test system provided by the present invention, please refer to the above method embodiments, which will not be repeated in the present invention.

The present invention also provides a GPIO anti-shake function test device, please refer to FIG. 3, FIG. 3 is a schematic structural diagram of a GPIO anti-shake function test device provided by the present invention, including:

memory 31 for storing computer programs;

The processor 32 is configured to execute a computer program to implement the steps of the above-mentioned GPIO anti-shake function testing method.

For the introduction of a GPIO anti-shake function testing device provided by the present invention, please refer to the above method embodiments, which will not be repeated in the present invention.

The present invention also provides a chip, including the above-mentioned GPIO anti-shake function testing device, please refer to FIG. 4 , which is a schematic structural diagram of a chip provided by the present invention.

In addition to being connected to other modules of the chip, each GPIO port in the chip is also connected to the GPIO anti-shake function test device provided by the present invention. The GPIO anti-shake function test device can generate interference signals of different time lengths and send them to the GPIO that assists the detection. The GPIO to be detected, and the interference signal after the anti-shake processing of the GPIO to be detected is accepted, so as to complete the test of the anti-shake function of the GPIO.

For other introductions of a chip provided by the present invention, please refer to the above method embodiments, which will not be repeated in the present invention.

It should also be noted that, in this specification, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply these entities or operations. There is no such actual relationship or sequence between operations. Moreover, the terms "comprising", "comprising" or any other variation thereof are intended to encompass a non-exclusive inclusion such that a process, method, article or device that includes a list of elements includes not only those elements, but also includes not explicitly listed or other elements inherent to such a process, method, article or apparatus. Without further limitation, an element qualified by the phrase "comprising a..." does not preclude the presence of additional identical elements in the process, method, article, or device that includes the element.

The above description of the disclosed embodiments enables any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (10)

1. a GPIO anti-shake function test method, is characterized in that, is applied to chip, and described GPIO anti-shake function test method comprises: Determine the first GPIO to be detected and the second GPIO to assist in the detection of the chip; Generate M interference signals based on the internal clock of the chip and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1; Receive N interference signals after the anti-shake processing of the first GPIO through the first GPIO, where N is an integer not less than 0, and N is not greater than M; judging whether the total number of the N interference signals is equal to a first preset value; If so, it is determined that the anti-shake function of the first GPIO is normal; otherwise, it is determined that the anti-shake function of the first GPIO is abnormal. 2. GPIO anti-shake function testing method as claimed in claim 1, is characterized in that, generates M interference signals and sends M described interference signals to described first GPIO through described second GPIO, and M is not. Integer less than 1, including: M interference signals with different time widths are generated, and the M interference signals are sent to the first GPIO through the second GPIO, where M is an integer not less than 1. 3. GPIO anti-shake function test method as claimed in claim 1, is characterized in that, generates M interference signals and sends M described interference signals to described first GPIO through described second GPIO, and M is not. Integer less than 1, including: generating A interference signals with a time width less than the first time width threshold and B interference signals with a time width not less than the first time width threshold, where A and B are both integers not less than 0; A number of interference signals with the time width less than the first time width threshold and B interference signals with the time width not less than the first time width threshold are sent to the first GPIO through the second GPIO ; Determining whether the total number of the N interference signals is equal to the first preset value includes: It is determined whether the total number of the N interference signals is B, and if so, it is determined that the anti-shake function of the first GPIO is normal; otherwise, it is determined that the anti-shake function of the first GPIO is abnormal. 4. GPIO anti-shake function testing method as claimed in claim 1, is characterized in that, judging whether the total quantity of N described interference signals is equal to the first preset value, comprising: Perform edge detection on the N interference signals, and obtain a total of J level transitions in the N interference signals; Determine whether J/2 is equal to the first preset value; if yes, determine that the anti-shake function of the first GPIO is normal, otherwise, determine that the anti-shake function of the first GPIO is abnormal. 5. GPIO anti-shake function testing method as claimed in claim 1, is characterized in that, after judging that the anti-shake function of described first GPIO is abnormal, also comprises: Record that the anti-shake function of the first GPIO is abnormal and save it. 6. The GPIO anti-shake function test method according to any one of claims 1 to 5, wherein after determining that the anti-shake function of the first GPIO is normal or determining that the anti-shake function of the first GPIO is abnormal ,Also includes: generating M interference signals and sending the M interference signals to the second GPIO through the first GPIO, where M is an integer not less than 1; Receive, through the second GPIO, one interference signal after the anti-shake processing of the second GPIO, where I is an integer not less than 0, and I is not greater than M; Judging whether the total number of 1 described interference signals is equal to the second preset value; If so, it is determined that the anti-shake function of the second GPIO is normal; otherwise, it is determined that the anti-shake function of the second GPIO is abnormal. 7. GPIO anti-shake function testing method as claimed in claim 6, is characterized in that, after judging that the anti-shake function of described second GPIO is abnormal, also comprises: Record that the anti-shake function of the second GPIO is abnormal and save it. 8. A GPIO anti-shake function test system, characterized in that, comprising: a GPIO determination unit, configured to determine the first GPIO to be detected and the second GPIO to assist in the detection; an interference signal generating unit, configured to generate M interference signals based on the internal clock of the chip and send the M interference signals to the first GPIO through the second GPIO, where M is an integer not less than 1; an interference signal receiving unit, configured to receive, through the first GPIO, N interference signals after the anti-shake processing of the first GPIO, where N is an integer not less than 0, and N is not greater than M; An anti-shake function determination unit, configured to determine whether the total number of the N interference signals is equal to a first preset value, and if so, determine that the anti-shake function of the first GPIO is normal, otherwise, determine that the anti-shake function of the first GPIO is The shaking function is abnormal. 9. A GPIO anti-shake function test device, characterized in that, comprising: memory for storing computer programs; The processor is configured to execute the computer program to implement the steps of the GPIO anti-shake function test method according to any one of claims 1 to 7. 10 . A chip, characterized in that it comprises the GPIO anti-shake function testing device according to claim 9 . 11 .

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