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CN114286162A - Display processing method and device, storage medium, processor and display equipment - Google Patents

Display processing method and device, storage medium, processor and display equipment Download PDF

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Publication number
CN114286162A
CN114286162A CN202111426131.2A CN202111426131A CN114286162A CN 114286162 A CN114286162 A CN 114286162A CN 202111426131 A CN202111426131 A CN 202111426131A CN 114286162 A CN114286162 A CN 114286162A
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signal
field
video
synchronization
video signal
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CN202111426131.2A
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CN114286162B (en
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雷伟林
卢长军
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Leyard Optoelectronic Co Ltd
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Leyard Optoelectronic Co Ltd
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Abstract

The invention discloses a display processing method, a display processing device, a storage medium, a processor and display equipment, wherein the display processing method comprises the following steps: determining whether the video signal is normal; under the condition that the video signals are normal, controlling to adopt two memories to perform ping-pong operation on the video signals so as to output video contents corresponding to the video signals frame by frame; and in the case of video signal abnormality, controlling the two memories to stop ping-pong operation, and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality. The display processing method solves the problem that in the prior art, when video playing is carried out, the display effect is influenced by the conditions of flickering, black screen or screen splash and the like easily caused by video signal abnormity.

Description

Display processing method and device, storage medium, processor and display equipment
Technical Field
The invention relates to the field of video playing, in particular to a display processing method, a display processing device, a storage medium, a processor and display equipment.
Background
When a screen plays a video, if a video signal is abnormal, for example, a video stream is interfered, the video signal is easily interrupted by a short gap and then quickly recovered, and a phenomenon of micro-flicker on the screen can be seen under a normal display condition; for example, when one path of signal is lost and is switched to another path of signal, the video signal is temporarily interrupted, so that the screen is blacked or blurred, and the video playing and displaying effect is influenced.
In view of the above problems, no effective solution has been proposed.
The above information disclosed in the background section is only for enhancement of understanding of the background of the technology described herein. The background art may therefore contain certain information that does not form the known prior art to those skilled in the art.
Disclosure of Invention
The embodiment of the invention provides a display processing method, a display processing device, a storage medium, a processor and display equipment, which are used for at least solving the problem that in the prior art, when video playing is carried out, the display effect is influenced by the conditions of flickering, black screen or flower screen and the like easily caused by abnormal video signals.
In order to achieve the above object, according to a first aspect of embodiments of the present invention, there is provided a display processing method including: determining whether the video signal is normal; under the condition that the video signals are normal, controlling to adopt two memories to perform ping-pong operation on the video signals so as to output video contents corresponding to the video signals frame by frame; and in the case of video signal abnormality, controlling the two memories to stop ping-pong operation, and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality.
Further, determining whether the video signal is normal includes: determining that the video signal is normal if all the detection conditions are satisfied, and determining that the video signal is abnormal if at least one of the detection conditions is not satisfied; the detection conditions include at least one of: the field frequency of the field synchronization is in a preset frequency range; the phase relation and/or the time sequence relation of the field signal, the line signal and the blanking signal meet the preset relation; the pixel clock signal is not interrupted.
Further, the display processing method further includes: under the condition that the video signal is normal, generating a reference synchronous signal according to the field synchronous signal; under the condition that the field synchronizing signal exists, carrying out field synchronization according to the field synchronizing signal; in the absence of the field sync signal, field synchronization is performed based on the reference sync signal.
Further, the synchronization period of the reference synchronization signal is greater than the synchronization period of the field synchronization signal; controlling field synchronization according to the field synchronization signal in the presence of the field synchronization signal, comprising: in case that the field sync signal indicates that the field sync operation is performed, the reference sync signal is controlled to be reset.
Further, the display processing method further includes: determining whether the field sync signal is recovered under the condition that the control is performed according to the reference sync signal; under the condition of field synchronization signal recovery, determining whether the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition; and under the condition that the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition, controlling to carry out field synchronization according to the field synchronization signal.
Further, the two memories are a first memory and a second memory, and the control adopts the two memories to perform ping-pong operation on the video signal, and the control method comprises the following steps: when the first memory is controlled to execute the writing operation of the target frame image, the second memory is controlled to execute the reading operation of the previous frame image of the target frame image; and when the first memory is controlled to execute the reading operation of the target frame image, the second memory is controlled to execute the writing operation of the frame image after the target frame image.
According to a second aspect of the embodiments of the present invention, there is provided a display processing apparatus including: a first determination unit for determining whether the video signal is normal; the first control unit is used for controlling the two memories to perform ping-pong operation on the video signals under the condition that the video signals are normal so as to output the video contents corresponding to the video signals frame by frame; and the second control unit is used for controlling the two memories to stop ping-pong operation and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality under the condition that the video signal abnormality occurs.
According to a third aspect of the embodiments of the present invention, there is provided a nonvolatile storage medium including a stored program, wherein an apparatus in which the nonvolatile storage medium is controlled to execute the above-described display processing method when the program is executed.
According to a fourth aspect of the embodiments of the present invention, there is provided a processor for executing a program, wherein the program executes the display processing method described above.
According to a fifth aspect of embodiments of the present invention, there is provided a display device including a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor implementing the display processing method described above when executing the computer program.
The display processing method applying the technical scheme of the invention comprises the following steps: determining whether the video signal is normal; under the condition that the video signals are normal, controlling to adopt two memories to perform ping-pong operation on the video signals so as to output video contents corresponding to the video signals frame by frame; and in the case of video signal abnormality, controlling the two memories to stop ping-pong operation, and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality. The two memories are adopted to carry out the ping-pong operation of reading and writing in turn, so that the continuous output of the video content can be realized, and the pre-storage of one frame of image can be realized. When the video signal is abnormal, the ping-pong operation of the two memories is controlled to stop, so that the memory in the two memories, which stores the image of the frame before the video signal is abnormal, continuously outputs the image of the frame before the video signal is abnormal, and when the video signal is normal, the two memories still perform the ping-pong operation of the video signal to ensure the continuous output of the video signal.
Drawings
The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this application, illustrate embodiment(s) of the invention and together with the description serve to explain the invention without limiting the invention. In the drawings:
FIG. 1 is a schematic flow chart diagram of an alternative embodiment of a display processing method in accordance with the present invention;
FIG. 2 is a diagram of field synchronization of a field sync signal and a reference sync signal according to an embodiment of the display processing method of the present invention;
fig. 3 is a schematic diagram of an alternative embodiment of a display processing apparatus according to the present invention.
Detailed Description
It should be noted that the embodiments and features of the embodiments in the present application may be combined with each other without conflict. The present application will be described in detail below with reference to the embodiments with reference to the attached drawings.
In order to make the technical solutions of the present invention better understood, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the terms "first," "second," and the like in the description and claims of the present invention and in the drawings described above are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the data so used is interchangeable under appropriate circumstances such that the embodiments of the invention described herein are capable of operation in sequences other than those illustrated or described herein. Furthermore, the terms "comprises," "comprising," and "having," and any variations thereof, are intended to cover a non-exclusive inclusion, such that a process, method, system, article, or apparatus that comprises a list of steps or elements is not necessarily limited to those steps or elements expressly listed, but may include other steps or elements not expressly listed or inherent to such process, method, article, or apparatus.
It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present. Also, in the specification and claims, when an element is described as being "connected" to another element, the element may be "directly connected" to the other element or "connected" to the other element through a third element.
Fig. 1 is a display processing method according to an embodiment of the present invention, as shown in fig. 1, the method including the steps of:
step S102, determining whether the video signal is normal;
step S104, under the condition that the video signals are normal, controlling to adopt two memories to perform ping-pong operation on the video signals so as to output the video contents corresponding to the video signals frame by frame;
and step S106, controlling the two memories to stop ping-pong operation under the condition of video signal abnormality, and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality.
It is easy to understand that the so-called ping-pong operation is that two memories alternately perform data read/write operation, when the first memory performs the write operation of a certain frame image, the second memory performs the read operation of the previous frame image, and when the first memory completes the write operation of the certain frame image, the two memories switch their operation, the first memory performs the read operation of the certain frame image, and the second memory performs the write operation of the next frame image.
The display processing method adopting the scheme comprises the following steps: determining whether the video signal is normal; under the condition that the video signals are normal, controlling to adopt two memories to perform ping-pong operation on the video signals so as to output video contents corresponding to the video signals frame by frame; and in the case of video signal abnormality, controlling the two memories to stop ping-pong operation, and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality. The two memories are adopted to carry out the ping-pong operation of reading and writing in turn, so that the continuous output of the video content can be realized, and the pre-storage of one frame of image can be realized. When the video signal is abnormal, the ping-pong operation of the two memories is controlled to stop, so that the memory in the two memories, which stores the image of the frame before the video signal is abnormal, continuously outputs the image of the frame before the video signal is abnormal, and when the video signal is normal, the two memories still perform the ping-pong operation of the video signal to ensure the continuous output of the video signal.
Specifically, determining whether the video signal is normal includes: determining that the video signal is normal if all the detection conditions are satisfied, and determining that the video signal is abnormal if at least one of the detection conditions is not satisfied; the detection conditions include at least one of: the field frequency of the field synchronization is in a preset frequency range; the phase relation and/or the time sequence relation of the field signal, the line signal and the blanking signal meet the preset relation; the pixel clock signal is not interrupted.
In the case where the video signal is normal, the above-mentioned detection conditions are all satisfied, and by selecting one or more of the above-mentioned detection conditions as a basis for judgment, it is determined that the video signal is normal when all the detection conditions are satisfied, and it is determined that the video signal is abnormal when there is a detection condition that is not satisfied, which can conveniently and accurately make a judgment as to whether the video signal is normal or not.
Specifically, the display processing method further includes: under the condition that the video signal is normal, generating a reference synchronous signal according to the field synchronous signal; under the condition that the field synchronizing signal exists, carrying out field synchronization according to the field synchronizing signal; in the absence of the field sync signal, field synchronization is performed based on the reference sync signal.
Under the condition that the video signal is normal, the reference synchronous signal is generated according to the field synchronous signal, so that when the field synchronous signal is lost, the field synchronization can be performed according to the reference synchronous signal, the problem that the video cannot be played normally due to the loss of the field synchronous signal caused by the abnormal video signal can be solved, and the fluency and the stability of video playing are further improved.
Specifically, the synchronization period of the reference synchronization signal is greater than the synchronization period of the field synchronization signal; controlling field synchronization according to the field synchronization signal in the presence of the field synchronization signal, comprising: in case that the field sync signal indicates that the field sync operation is performed, the reference sync signal is controlled to be reset.
That is, each time the reference synchronization signal generated according to the field synchronization signal indicates that field synchronization is performed, the reference synchronization signal is delayed from the field synchronization signal, and in the case that the field synchronization signal indicates that field synchronization is performed, the reference synchronization signal is reset, so that the reference synchronization signal is continuously reset as long as the field synchronization signal exists, and field synchronization is performed by the field synchronization signal all the time.
For example, as shown in fig. 2, in the present embodiment, a counter using a field sync signal as a reset mechanism is used to trigger the field sync pulse, the field sync signal triggers the sync pulse when counting to N, and the reference sync signal triggers the sync pulse when counting to P, where P > N, so that the reference sync signal is continuously reset as long as the field sync signal exists, and the field sync signal is always relied on for field synchronization, and the reference sync signal cannot be reset any more only when the field sync signal is lost, and the reference sync signal with hysteresis indicates that the field sync operation is performed.
Specifically, the display processing method further includes: determining whether the field sync signal is recovered under the condition that the control is performed according to the reference sync signal; under the condition of field synchronization signal recovery, determining whether the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition; and under the condition that the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition, controlling to carry out field synchronization according to the field synchronization signal.
The field synchronization is realized by adopting the reference synchronization signal under the condition that the field synchronization signal disappears, and when the field synchronization signal is recovered, the field synchronization is favorable for ensuring the video display effect according to the meeting place synchronization signal switched.
Specifically, the two memories are a first memory and a second memory, and the control adopts the two memories to perform ping-pong operation on the video signal, and the control method comprises the following steps: when the first memory is controlled to execute the writing operation of the target frame image, the second memory is controlled to execute the reading operation of the previous frame image of the target frame image; and when the first memory is controlled to execute the reading operation of the target frame image, the second memory is controlled to execute the writing operation of the frame image after the target frame image.
Namely, when one of the two memories is used for writing a certain frame of image, the other one is used for reading the previous frame of image, and when one is used for reading a certain frame of image, the other one is used for writing the next frame of image, thus, the cycle is repeated to form the so-called ping-pong operation, the continuous output of a plurality of frames of images is realized, and the smooth display of the video is ensured.
Next, as shown in fig. 3, an embodiment of the present invention further provides a display processing apparatus, including: a first determination unit for determining whether the video signal is normal; the first control unit is used for controlling the two memories to perform ping-pong operation on the video signals under the condition that the video signals are normal so as to output the video contents corresponding to the video signals frame by frame; and the second control unit is used for controlling the two memories to stop ping-pong operation and controlling one memory of the two memories to continuously output the image of the frame before the video signal abnormality under the condition that the video signal abnormality occurs.
Specifically, the first determination unit is configured to: determining that the video signal is normal if all the detection conditions are satisfied, and determining that the video signal is abnormal if at least one of the detection conditions is not satisfied; the detection conditions include at least one of: the field frequency of the field synchronization is in a preset frequency range; the phase relation and/or the time sequence relation of the field signal, the line signal and the blanking signal meet the preset relation; the pixel clock signal is not interrupted.
Specifically, the display processing apparatus further includes a generation unit and a synchronization unit: the generating unit is used for generating a reference synchronous signal according to the field synchronous signal under the condition that the video signal is normal; the synchronizing unit is used for carrying out field synchronization according to the field synchronization signal under the condition that the field synchronization signal exists; in the absence of the field sync signal, field synchronization is performed based on the reference sync signal.
Specifically, the synchronization period of the reference synchronization signal is greater than the synchronization period of the field synchronization signal; the synchronization unit is further configured to: in case that the field sync signal indicates that the field sync operation is performed, the reference sync signal is controlled to be reset.
Specifically, the display processing apparatus further includes a second determining unit, a third determining unit, and a third controlling unit: the second determining unit is used for determining whether the field synchronous signal is recovered under the condition of controlling the field synchronization according to the reference synchronous signal; the third determining unit is used for determining whether the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition or not under the condition that the field synchronization signal is recovered; the third control unit is used for controlling the field synchronization according to the field synchronization signal under the condition that the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets the preset condition.
Specifically, the first determination unit is configured to: when the first memory is controlled to execute the writing operation of the target frame image, the second memory is controlled to execute the reading operation of the previous frame image of the target frame image; and when the first memory is controlled to execute the reading operation of the target frame image, the second memory is controlled to execute the writing operation of the frame image after the target frame image.
In addition, the embodiment of the invention also provides a nonvolatile storage medium, the nonvolatile storage medium comprises a stored program, and when the program runs, the device where the nonvolatile storage medium is located is controlled to execute the display processing method.
The embodiment of the invention further provides a processor, wherein the processor is used for running the program, and the program executes the display processing method when running.
Finally, an embodiment of the present invention further provides a display device, which includes a memory, a processor, and a computer program stored in the memory and executable on the processor, and the processor implements the display processing method described above when executing the computer program.
The above-mentioned serial numbers of the embodiments of the present invention are merely for description and do not represent the merits of the embodiments. Moreover, the steps illustrated in the flowcharts of the figures may be performed in a computer system such as a set of computer-executable instructions, and while a logical order is illustrated in the flowcharts, in some cases, the steps illustrated or described may be performed in an order different than here.
In the above embodiments of the present invention, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.
In the embodiments provided in the present application, it should be understood that the disclosed technology can be implemented in other ways. The above-described embodiments of the apparatus are merely illustrative, and for example, the division of the units may be a logical division, and in actual implementation, there may be another division, for example, multiple units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, units or modules, and may be in an electrical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be embodied in the form of a software product, which is stored in a storage medium and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic or optical disk, and other various media capable of storing program codes.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.

Claims (10)

1. A display processing method, comprising:
determining whether the video signal is normal;
under the condition that the video signal is normal, controlling to adopt two memories to perform ping-pong operation on the video signal so as to output video contents corresponding to the video signal frame by frame;
and in the case of the video signal abnormality, controlling the two memories to stop the ping-pong operation, and controlling one of the two memories to continuously output the image of the frame before the video signal abnormality.
2. The display processing method of claim 1, wherein determining whether the video signal is normal comprises: determining that the video signal is normal if all of the detection conditions are satisfied, and determining that the video signal is not normal if at least one of the detection conditions is not satisfied;
the detection condition includes at least one of: the field frequency of the field synchronization is in a preset frequency range; the phase relation and/or the time sequence relation of the field signal, the line signal and the blanking signal meet the preset relation; the pixel clock signal is not interrupted.
3. The display processing method according to claim 1, further comprising:
under the condition that the video signal is normal, generating a reference synchronous signal according to a field synchronous signal;
under the condition that the field synchronizing signal exists, carrying out field synchronization according to the field synchronizing signal;
and performing field synchronization according to the reference synchronization signal when the field synchronization signal does not exist.
4. The display processing method according to claim 3, wherein a synchronization period of the reference synchronization signal is larger than a synchronization period of the field synchronization signal;
in the presence of the field synchronization signal, controlling field synchronization according to the field synchronization signal, comprising: and controlling the reference synchronization signal to reset in the case that the field synchronization signal indicates that the field synchronization operation is performed.
5. The display processing method according to claim 3, further comprising:
determining whether the field sync signal is recovered in case of controlling field sync according to the reference sync signal;
under the condition that the field synchronization signal is recovered, determining whether the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets a preset condition;
and under the condition that the overlapping condition of the synchronization time of the field synchronization signal and the synchronization time of the reference synchronization signal meets the preset condition, controlling to carry out field synchronization according to the field synchronization signal.
6. The display processing method according to any one of claims 1 to 5, wherein the two memories are a first memory and a second memory, and controlling the ping-pong operation of the video signal using the two memories comprises:
when the first memory is controlled to execute the writing operation of the target frame image, the second memory is controlled to execute the reading operation of the frame image before the target frame image;
and when the first memory is controlled to execute the reading operation of the target frame image, the second memory is controlled to execute the writing operation of a frame image behind the target frame image.
7. A display processing apparatus characterized by comprising:
a first determination unit for determining whether the video signal is normal;
the first control unit is used for controlling the ping-pong operation of the video signals by adopting two memories under the condition that the video signals are normal so as to output the video contents corresponding to the video signals frame by frame;
and the second control unit is used for controlling the two memories to stop the ping-pong operation and controlling one of the two memories to continuously output the image of the frame before the video signal abnormality under the condition that the video signal abnormality occurs.
8. A non-volatile storage medium, comprising a stored program, wherein a device in which the non-volatile storage medium is located is controlled to execute the display processing method according to any one of claims 1 to 6 when the program runs.
9. A processor, characterized in that the processor is configured to execute a program, wherein the program executes the display processing method according to any one of claims 1 to 6.
10. A display device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the display processing method of any one of claims 1 to 6 when executing the computer program.
CN202111426131.2A 2021-11-26 2021-11-26 Display processing method, device, storage medium, processor and display equipment Active CN114286162B (en)

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JP2005295134A (en) * 2004-03-31 2005-10-20 Pioneer Electronic Corp Adaptive frame synchronization system
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