CN103901684B - A kind of liquid crystal display of IPS patterns - Google Patents
A kind of liquid crystal display of IPS patterns Download PDFInfo
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- CN103901684B CN103901684B CN201210585433.9A CN201210585433A CN103901684B CN 103901684 B CN103901684 B CN 103901684B CN 201210585433 A CN201210585433 A CN 201210585433A CN 103901684 B CN103901684 B CN 103901684B
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Abstract
The present invention provides a kind of liquid crystal display of IPS patterns, including：TFT substrate；Form multipair gate line and a plurality of data lines in the TFT substrate；Multiple pixels, intersected by the multipair gate line and a plurality of data lines and limited；Each pixel includes the first sub-pixel and the second sub-pixel；Each sub-pixel includes TFT switch element, spaced pixel electrode and the public electrode；The source electrode of TFT switch element in two sub-pixels of same data wire both sides is connected on the same data wire, and grid connects in a pair of grid lines of both sides respectively；The number on first sub-pixel and the column in second sub-pixel is odd number.Therefore the present invention reduces the manufacture difficulty of engineering by making odd number column IPS mode activateds.In addition, by setting common wire between the first sub-pixel and the second pixel, increase the aperture opening ratio of liquid crystal display.
Description
Technical field
The present invention relates to a kind of liquid crystal display, more particularly, to a kind of liquid crystal display of in-plane switching (IPS) pattern
Device.
Background technology
The liquid crystal display (LCD) of in-plane switching (IPS) pattern is widely used due to its preferable viewing angle characteristic.It is described
The LCD of IPS patterns uses the horizontal component of electric field in the IPS patterns of in-plane switching as LCD drive method.
The LCD of IPS patterns includes：With the CF substrates being oppositely arranged and TFT substrate, and between the CF substrates and
Liquid crystal layer between TFT substrate.The TFT substrate includes multiple gate lines, multiple data wires, TFT, public electrode and pixel electricity
Pole, multiple gate lines and multiple data wires are arranged in a crossed manner, and the adjacent gate line limits one with the data wire
Individual pixel.The TFT, public electrode and pixel electrode are located in the pixel.Public electrode and pixel electrode are in same substrate
On be intervally installed.The CF substrates include black matrix and colour filter, the black matrix and the gate line in TFT substrate, number
Position according to line and TFT is corresponding, and the position of the colour filter is set according to the position of each pixel.The liquid crystal layer is by being situated between
Horizontal component of electric field driving between public electrode and pixel electrode.In order to ensure light transmittance, the public electrode and the pixel
Electrode is transparency electrode.
IPS mode LCDs of the prior art are described below.Fig. 1 is the IPS patterns of prior art
The top view of liquid crystal display.Fig. 2 is sectional views of the Fig. 1 along A-A directions.
As depicted in figs. 1 and 2, the TFT substrate of the IPS mode LCDs of prior art includes substrate 101, in substrate
The multiple gate lines 102 and multiple common wires 103 extended in a first direction on 101, the gate line 102 and the common wire
103 are parallel to each other and are separated from each other, multiple data wires 104 gate line arranged in a crossed manner, adjacent with the multiple gate line 102
102 and data wire 104 is arranged in a crossed manner limits a pixel, multiple pixel electrodes 106 are formed by gate line 102 and data wire
In 104 pixels limited, the TFT is arranged on the infall of gate line 102 and data wire 104.Each TFT includes
Grid 107, active layer 108, source electrode 109 and drain electrode 110, public electrode 111 is arranged on the substrate 101, the common electrical
Pole 111 is arranged at intervals with the pixel electrode 106.
The grid 107 is located on the substrate 101, and the grid 107 and the active layer 108 are insulated from each other, described
Gate insulation layer 112 is set between grid 107 and the active layer 108, and the source electrode 109 and drain electrode 110 are located at the active layer
On 108, passivation layer 113 is set on the source electrode 109 and drain electrode 110, the pixel electrode 106 is located at the passivation layer 113
On.
The grid 107 is integrally formed with the gate line 102, the source electrode 109 and the one of the data wire 104 into
Type, the drain electrode 110 can be electrically connected by via with pixel electrode 106.The gate line 102 provides and comes from gate drivers
（Not shown in figure）Scanning signal, the data wire 104 provides and comes from data driver（Not shown in figure）Data-signal.
When inputting Continuity signal in gate line 102, active layer 108 is conductive, and the data-signal of data wire 104 can be from source electrode
109 reach drain electrode 110 by the raceway groove of active layer 108, are finally-transmitted to pixel electrode 106.After pixel electrode 106 obtains signal
The horizontal component of electric field for driving liquid crystal to rotate is formed with public electrode 111.
As shown in Fig. 2 in the array base-plate structure of the IPS mode LCDs of prior art, the first storage capacitance
C1 is formed between pixel electrode 106 and common wire 103, and grid are provided between the pixel electrode 106 and the common wire 103
Insulating barrier 112 and passivation layer 113, the second storage capacitance C2 formed drain electrode 110 and the common wire 103 overlapping with drain electrode it
Between, it is provided with gate insulation layer 112 between the drain electrode 110 and the common wire 103.
As shown in figure 1, in the LCD design of IPS patterns, in order to reach maximum open rate, the data wire in TFT substrate
102 overlap with public electrode 105, and a pair of pixel electrodes/public electrode pivot region is referred to as column (column), so no matter
How to make pixel electrode with layer and public electrode all can only obtain even number column, such as 4 columns or 6 columns, so, design parameter is selected
Select that leeway is smaller, the manufacture difficulty of engineering is increased.
In addition, in the prior art, storage capacitance is to maintain pixel electrode after liquid crystal display pixel scanning signal terminates
The Main Means of current potential, unification increase the storage capacitance of pixel, can effectively improve the homogeneity of picture.But in the prior art
Improve the storage capacitance of pixel, it is necessary to more spaces are taken, so as to which the reduction of aperture opening ratio can be caused.
The content of the invention
The technical problem to be solved in the present invention is to provide a kind of liquid crystal display of IPS patterns, increase the choosing of design parameter
Increase aperture opening ratio while selecting.
According to a kind of liquid crystal display of IPS patterns of the present invention, including：
TFT substrate；
The multipair gate line in the TFT substrate is formed, gate line described in each pair includes first grid parallel to each other
Line and second gate line；
The a plurality of data lines in the TFT substrate is formed, is vertically arranged with the multipair gate line；
Multiple pixels, intersected by the multipair gate line and a plurality of data lines and limited, often row pixel corresponds to a pair
The gate line is simultaneously sandwiched between the pair of gate line；
Each pixel includes the first sub-pixel and the second sub-pixel；
Each sub-pixel includes the pixel electrode of TFT switch element, the public electrode of pectination and pectination, the pixel
Electrode and the public electrode are arranged at intervals；
The source electrode of TFT switch element in two sub-pixels of same data wire both sides is connected to the same data wire
On, grid connects in a pair of grid lines of both sides respectively；
A pair of pixel electrodes and public electrode pivot region are referred to as column, in first sub-pixel and second sub-pixel
The number on column be odd number.
Preferably, in each pixel, the pixel electrode of first sub-pixel and the second sub-pixel is disposed adjacent.
Preferably, common wire is provided between the first sub-pixel and the second sub-pixel in each pixel, it is described
Common wire has overlapping with the pixel electrode of described two sub-pixels respectively.
Preferably, the liquid crystal display also includes the first auxiliary capacitor substrate and the second auxiliary capacitor substrate, and described
One auxiliary capacitor substrate and the second auxiliary capacitor substrate are the same layers of grid with the TFT switch unit；The first auxiliary electricity
Hold substrate be connected with the drain electrode of the TFT switch unit in first sub-pixel, the second auxiliary capacitor substrate with it is described
The drain electrode of TFT switch unit in second sub-pixel is connected, the first auxiliary capacitor substrate and the second auxiliary capacitor substrate
With the public line overlap.
Preferably, the first auxiliary capacitor substrate and the second auxiliary capacitor substrate are the grid with the TFT switch unit
Extremely with the metal level of layer.
Preferably, the first storage capacitance, the common wire and auxiliary capacitor are formed between the common wire and pixel electrode
The second storage capacitance is formed between substrate.
Preferably, the first auxiliary capacitor substrate and the second auxiliary capacitor substrate do not connect.
Preferably, the common wire is the metal level with layer with the source-drain electrode of the TFT switch unit.
Preferably, the liquid crystal display also includes being formed passivation layer on the tft substrate, the pixel electrode and public
The same layer of electrode, and be formed on the passivation layer of the pixel.
Preferably, data wire is covered by the public electrode.
Preferably, the number on the column is 3~7.
Compared with prior art, the present invention has advantages below：
A kind of liquid crystal display of IPS patterns provided by the invention, is connected up using bigrid, on the one hand, can be made strange
The driving of number column IPS patterns, adds the selection of design parameter, reduces the difficulty of engineering manufacture.In addition, utilize each two picture
Public electrode wire is arranged in the presence of one piece of utilizable part among plain, opening can be increased while storage capacitance is formed
Rate.
Brief description of the drawings
Fig. 1 is the top view of the array base-plate structure of IPS mode LCDs in the prior art.
Fig. 2 is sectional views of the Fig. 1 along A-A directions.
Fig. 3 is the top view of the array base-plate structure of IPS mode LCDs in the present invention.
Fig. 4 is the vertical view of the array base-plate structure of the IPS mode LCDs of storage capacitance improvement design in the present invention
Figure.
Fig. 5 is profile of the sub-pixels of Fig. 4 first along B-B directions.
Embodiment
In order to facilitate the understanding of the purposes, features and advantages of the present invention, below in conjunction with the accompanying drawings to the present invention
Embodiment be described in detail.
Embodiment one
Fig. 3 is the top view of the array base palte of IPS mode LCDs in the embodiment of the present invention.As shown in figure 3, this reality
The liquid crystal display of the IPS patterns of example is applied, including：TFT substrate 301, the TFT substrate 301 are transparency carrier, specifically, its
Material can be glass or transparent organic material etc., the multipair gate line 302 formed in the TFT substrate 301, each pair institute
Stating gate line 302 includes first grid polar curve 302a and second gate line 302b parallel to each other, is formed in the TFT substrate
A plurality of data lines 303, it is vertically arranged with the multipair gate line 302 and insulated from each other, the gate line 302 and the data
Line 303 can include molybdenum（Mo）, chromium (Cr), aluminium（Al）, silver-colored (Ag), titanium（Ti）, tantalum (Ta) and tungsten（W）At least one of.
The multiple pixels 304 limited are intersected by the multipair gate line 302 and a plurality of data lines 303, often row pixel
304 correspond to a pair of gate lines and are sandwiched between the pair of gate line, and each pixel 304 includes the first sub-pixel
304a and the second sub-pixel 304b, each first sub-pixel 304a and the second sub-pixel 304b include TFT switch member
The pixel electrode 306 of part, the public electrode 305 of pectination and pectination, the pixel electrode 306 and the public electrode 305 are spaced
Set.
The TFT switch element includes grid 307, active layer 308, source electrode 309 and drain electrode 310.Same data wire both sides
Two sub-pixels in the source electrode of TFT switch element be connected on the same data wire, grid connects the one of both sides respectively
To on gate line；The grid 307 is integrally formed with the gate line 302, and the active layer 308 is located on the grid 307
And the grid 307 and the active layer 308 are insulated from each other, the active layer 308 can be amorphous silicon layer.
The source electrode 309 and drain electrode 310 be located at source-drain electrode layer, are formed on the active layer 308, the source electrode 309 and
The data wire 303 is integrally formed, and the pixel electrode 306 is formed on the passivation layer on source-drain electrode layer, the pixel electrode
306 be transparent conductive material, can be indium tin oxide.The pixel electrode 306 is electrically connected by via Q with drain electrode 310.Institute
State and horizontal component of electric field driving liquid crystal rotation, a pair of pixel electrode/public electrodes are formed between public electrode 305 and pixel electrode 306
Pivot region is referred to as column.The public electrode 305 overlaps with the data wire 303, i.e., described public electrode 305 covers institute
State data wire 303.Common wire 312, the common wire 312 and the gate line 302 be located at same layer, the common wire 312 and
The drain electrode 310 is insulated from each other and overlapping, and the common wire 312 and the pixel electrode 306 are insulated from each other and overlapping.
First the pixel electrode in the first sub-pixel 304a and public electrode are described in the present embodiment.In the first sub- picture
In plain 304a, the number that can select to set public electrode 305 is 3, as shown in figure 3, accordingly, in each sub-pixel
In 304a, it can select to set 3 pixel electrodes 306, because one of public electrode 305 is overlapping with data wire 303, because
This, the number on the column in the first sub-pixel 304a is 5.
In the present embodiment, the number of public electrode 305 and pixel electrode 306 is 3, so as to obtain the number on the column
Mesh is 5.Technical scheme not limited to this, for example, the number of public electrode and pixel electrode can select to be 2
Individual, then the number on the column is 3, if the selection of the number of public electrode and pixel electrode is 4, the number on the column is
7.Equally, in the second sub-pixel 304b, the pixel electrode 306 is referred to the first sub-pixel with public electrode 305
304a is set.
In the present embodiment, the TFT is bottom gate thin film transistor, in other embodiments of the invention, the TFT
Can also be top gate type thin film transistor, i.e., described grid is located at the top of the active layer, in addition, the active layer can be
Polysilicon layer.
It follows that technique according to the invention scheme connects up set public electrode and pixel electricity by bigrid
Pole, the number on the column is odd number, and in actual applications, when the number on column is odd number, the choice of design parameter is larger,
So as to reduce the manufacture difficulty of engineering.
Embodiment two
The difference of embodiment two and embodiment one is, public affairs are provided between the first sub-pixel and the second sub-pixel
Collinearly.Fig. 4 is the vertical view of the array base-plate structure of the IPS mode LCDs of storage capacitance improvement design in embodiment two
Figure.Fig. 5 is profile of first sub-pixel along B-B directions in Fig. 4.
The array base-plate structure in the present embodiment is described with reference to Fig. 4 and Fig. 5.
The array base palte includes substrate 401, the multipair gate line 402 formed on the substrate 401, described in each pair
Gate line 402 includes first grid polar curve 402a and second gate line 402b parallel to each other, is formed more in the TFT substrate
Data line 403, it is vertically arranged with the multipair gate line 402 and insulated from each other, by the multipair gate line 402 and institute
State a plurality of data lines 403 and intersect the multiple pixels 404 limited, often row pixel 404 corresponds to a pair of gate lines and is sandwiched in institute
Between stating a pair of grid lines, each pixel 404 includes the first sub-pixel 404a and the second sub-pixel 404b, and each described the
One sub-pixel 404a and the second sub-pixel 404b includes TFT switch element, the public electrode 405 of pectination and the pixel of pectination
Electrode 406, the pixel electrode 406 and the public electrode 405 are arranged at intervals.The TFT switch element includes grid 407,
Active layer 408, source electrode 409 and drain electrode 410.The grid 407 is integrally formed with the gate line 402, the source electrode 409 and institute
It is integrally formed to state data wire 403, the grid 407 and the active layer 408 are insulated from each other, in the grid 407 and active layer
Gate insulation layer 411 is set between 408, and the gate insulation layer 411 can be by chemical vapor deposition or physical vapour deposition (PVD) come shape
Can be into silica or nitridation silicon single-layer or including at least one layer of multilayer in silica and silicon nitride, the active layer 408
Amorphous silicon layer, the source electrode 409 and drain electrode 410 are positioned at source-drain electrode layer and on the active layer 408, in the source-drain electrode
Passivation layer 412 is set on layer.
The pixel electrode 406 and the public electrode 405 are located on the passivation layer 412, the He of pixel electrode 406
Public electrode 405 is transparent conductive material, can be indium tin oxide.The pixel electrode 406 can pass through via K and drain electrode
410 electrical connections.Form horizontal component of electric field driving liquid crystal between the public electrode 405 and pixel electrode 406 to rotate, a pair of pixel electricity
Pole/public electrode pivot region is referred to as column.The public electrode 405 overlaps with the data wire 403, i.e., described common electrical
Pole 405 covers the data wire 403.
Common wire 413, the common wire 413 are with the metal of layer, the common wire with the source electrode 409 and drain electrode 410
413 can include molybdenum（Mo）, chromium (Cr), aluminium（Al）, silver-colored (Ag), titanium（Ti）, tantalum (Ta) and tungsten（W）At least one of.Preferably,
The common wire 413a is parallel with gate line 402.The common wire 413 and the pixel electrode 406 are insulated from each other and overlapping,
Passivation layer 412 is provided between the common wire 413 and the pixel electrode 406.
First auxiliary capacitor substrate 414a and the second auxiliary capacitor substrate 414b, the first auxiliary capacitor substrate 414a,
Do not connected between the first auxiliary capacitor substrate 414a and the second auxiliary capacitor substrate 414b.First auxiliary capacitor
Substrate 414a and the second auxiliary capacitor substrate 414b is the metal with the grid 407 with layer, can include molybdenum（Mo）, chromium
(Cr), aluminium（Al）, silver-colored (Ag), titanium（Ti）, tantalum (Ta) and tungsten（W）At least one of.The first auxiliary capacitor substrate 414a and
Second auxiliary capacitor substrate 414b is electrically connected with drain electrode 410 by via L respectively.Due to the drain electrode 410 and the pixel
Electrode 406 electrically connects, so the first auxiliary capacitor substrate 414a and the second auxiliary capacitor substrate 414b current potential are and institute
The current potential for stating pixel electrode 406 is equal.
The storage capacitance of the liquid crystal display of the present embodiment includes being formed at the common wire 413 and the pixel electrode
The first storage capacitance Cs1 between 406 and the second storage being formed between the common wire 413 and the auxiliary capacitor substrate
Electric capacity Cs2, i.e., the second storage capacitance Cs2 is formed at the auxiliary capacitor of common wire 413 and first described in the first sub-pixel 404a
Between substrate 414a, the second storage capacitance Cs2 described in the second sub-pixel 404b is formed at the auxiliary electricity of common wire 413 and second
Between appearance substrate 414b.
In the present embodiment, the TFT is bottom gate thin film transistor, in other embodiments of the invention, the TFT
Can also be top gate type thin film transistor, i.e., described grid is located at the top of the active layer, in addition, the active layer can be
Polysilicon layer.
In addition, in the present embodiment, common wire have with pixel electrode it is overlapping, in other embodiments of the invention, common wire
Can also be without overlapping with pixel electrode.
In addition, in the present embodiment, common wire has overlapping with pixel electrode, and sets auxiliary capacitor among two sub-pixels
Substrate.In other embodiments of the invention, auxiliary capacitor substrate can not be set, then storage capacitance exists only in common wire and picture
Between plain electrode.Or common wire is not overlapping with pixel electrode, then storage capacitance exists only in common wire and auxiliary capacitor base
Between plate.
Common wire is arranged between the first sub-pixel and the second sub-pixel by bigrid wiring in the present embodiment, and
First auxiliary capacitor substrate and the second auxiliary capacitor substrate are set, is formed and deposited while the aperture opening ratio of liquid crystal display can be increased
Storing up electricity is held.In addition, by the way that pixel electrode and public electrode are overlapped in bigrid wiring, so as to obtain odd number
Increase aperture opening ratio while column IPS mode activateds.
The above described is only a preferred embodiment of the present invention, any formal limitation not is made to the present invention.Though
So the present invention is disclosed above with preferred embodiment, but is not limited to the present invention.It is any to be familiar with those skilled in the art
Member, without departing from the scope of the technical proposal of the invention, all using the methods and technical content of the disclosure above to the present invention
Technical scheme makes many possible changes and modifications, or is revised as the equivalent embodiment of equivalent variations.Therefore, it is every without departing from
The content of technical solution of the present invention, the technical spirit according to the present invention is to any simple modification made for any of the above embodiments, equivalent
Change and modification, still fall within technical solution of the present invention protection in the range of.
Claims (8)
1. a kind of liquid crystal display of IPS patterns, including：
TFT substrate；
Form multipair gate line in the TFT substrate, gate line described in each pair include first grid polar curve parallel to each other and
Second gate line；
The a plurality of data lines in the TFT substrate is formed, is vertically arranged with the multipair gate line；
Multiple pixels, intersected by the multipair gate line and a plurality of data lines and limited, often row pixel corresponds to described in a pair
Gate line is simultaneously sandwiched between the pair of gate line；
Each pixel includes the first sub-pixel and the second sub-pixel；
Each sub-pixel includes the pixel electrode of TFT switch element, the public electrode of pectination and pectination, the pixel electrode
It is arranged at intervals with the public electrode, the pixel electrode and the public electrode be arranged in parallel with the data wire, and institute
Data wire is stated to be covered by the public electrode；
The source electrode of TFT switch element in two sub-pixels of same data wire both sides is connected on the same data wire, grid
Pole connects in a pair of grid lines of both sides respectively；
A pair of pixel electrodes and public electrode pivot region are referred to as column, the column in first sub-pixel and second sub-pixel
Number be odd number, form horizontal component of electric field between the public electrode and the pixel electrode；
Wherein, in each pixel, the pixel electrode of first sub-pixel and the second sub-pixel is disposed adjacent.
Wherein, common wire is provided between the first sub-pixel and the second sub-pixel in each pixel,
The common wire has overlapping with the pixel electrode of two sub-pixels respectively.
2. liquid crystal display as claimed in claim 1, it is characterised in that also aided in including the first auxiliary capacitor substrate and second
Capacity substrate, the first auxiliary capacitor substrate and the second auxiliary capacitor substrate are the same layers of grid with the TFT switch unit；
The first auxiliary capacitor substrate is connected with the drain electrode of the TFT switch unit in first sub-pixel, second auxiliary
Capacity substrate is connected with the drain electrode of the TFT switch unit in second sub-pixel, the first auxiliary capacitor substrate and
Two auxiliary capacitor substrates with the public line overlap.
3. liquid crystal display as claimed in claim 2, it is characterised in that the first auxiliary capacitor substrate and the second auxiliary electricity
It is the metal level with the grid of the TFT switch unit with layer to hold substrate.
4. liquid crystal display as claimed in claim 2, it is characterised in that form first between the common wire and pixel electrode
Storage capacitance, the second storage capacitance is formed between common wire and the auxiliary capacitor substrate.
5. liquid crystal display as claimed in claim 2, it is characterised in that the first auxiliary capacitor substrate and the second auxiliary electricity
Hold substrate not connect.
6. liquid crystal display as claimed in claim 1, it is characterised in that：The common wire is and the TFT switch unit
Metal level of the source-drain electrode with layer.
7. liquid crystal display as claimed in claim 1, in addition to form passivation layer on the tft substrate, it is characterised in that institute
Pixel electrode and the same layer of public electrode are stated, and is formed on the passivation layer of the pixel.
8. liquid crystal display as claimed in claim 1, it is characterised in that the number on the column is 3~7.
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| CN201210585433.9A CN103901684B (en) | 2012-12-28 | 2012-12-28 | A kind of liquid crystal display of IPS patterns |
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| CN105607370A (en) * | 2016-02-04 | 2016-05-25 | 深圳市华星光电技术有限公司 | Array substrate, manufacturing method thereof and liquid crystal display panel |
| CN105589273B (en) * | 2016-03-07 | 2019-06-18 | 京东方科技集团股份有限公司 | Array substrate and preparation method thereof, display device |
| CN106292084B (en) * | 2016-08-26 | 2019-07-02 | 深圳市华星光电技术有限公司 | Dot structure and preparation method thereof |
| CN106842684B (en) * | 2017-03-08 | 2019-09-17 | 深圳市华星光电技术有限公司 | COA type array substrate |
| CN207396936U (en) * | 2017-10-24 | 2018-05-22 | 京东方科技集团股份有限公司 | A kind of array substrate and display device |
| JP7191596B2 (en) * | 2018-08-30 | 2022-12-19 | 株式会社ジャパンディスプレイ | liquid crystal display |
| CN109270751B (en) * | 2018-10-23 | 2020-10-30 | 深圳市华星光电技术有限公司 | Array substrate and liquid crystal display panel |
| CN111103734A (en) * | 2018-10-25 | 2020-05-05 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN109240012A (en) * | 2018-11-19 | 2019-01-18 | 京东方科技集团股份有限公司 | Array substrate, display panel and display device |
| CN111583841A (en) * | 2020-04-27 | 2020-08-25 | 深圳市华星光电半导体显示技术有限公司 | Display panel inspection method and device and electronic equipment |
| CN114839817A (en) * | 2022-05-16 | 2022-08-02 | 广州华星光电半导体显示技术有限公司 | Display panel |
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