CN103594493A - Trench-structure charge compensation Schottky semiconductor device and preparation method thereof - Google Patents
Trench-structure charge compensation Schottky semiconductor device and preparation method thereof Download PDFInfo
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- CN103594493A CN103594493A CN201210290641.6A CN201210290641A CN103594493A CN 103594493 A CN103594493 A CN 103594493A CN 201210290641 A CN201210290641 A CN 201210290641A CN 103594493 A CN103594493 A CN 103594493A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 71
- 238000002360 preparation method Methods 0.000 title claims abstract description 8
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 26
- 239000000463 material Substances 0.000 claims abstract description 16
- 239000002210 silicon-based material Substances 0.000 claims abstract description 15
- 239000002184 metal Substances 0.000 claims description 25
- 229910052751 metal Inorganic materials 0.000 claims description 25
- 229920005591 polysilicon Polymers 0.000 claims description 23
- 230000004888 barrier function Effects 0.000 claims description 19
- 239000000758 substrate Substances 0.000 claims description 17
- 238000005260 corrosion Methods 0.000 claims description 11
- 230000007797 corrosion Effects 0.000 claims description 11
- 230000003628 erosive effect Effects 0.000 claims description 8
- 238000001459 lithography Methods 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- 238000005530 etching Methods 0.000 claims description 6
- 238000005245 sintering Methods 0.000 claims description 5
- 239000012774 insulation material Substances 0.000 claims description 4
- 230000015572 biosynthetic process Effects 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims 4
- 239000012535 impurity Substances 0.000 claims 2
- 230000015556 catabolic process Effects 0.000 abstract description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 22
- 239000000377 silicon dioxide Substances 0.000 description 11
- 235000012239 silicon dioxide Nutrition 0.000 description 10
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 9
- 125000004437 phosphorous atom Chemical group 0.000 description 6
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
- 238000004519 manufacturing process Methods 0.000 description 4
- 238000001465 metallisation Methods 0.000 description 3
- 229910052759 nickel Inorganic materials 0.000 description 3
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- 238000001259 photo etching Methods 0.000 description 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 229910052757 nitrogen Inorganic materials 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 238000009826 distribution Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
- H01L29/8725—Schottky diodes of the trench MOS barrier type [TMBS]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/063—Reduced surface field [RESURF] pn-junction structures
- H01L29/0634—Multiple reduced surface field (multi-RESURF) structures, e.g. double RESURF, charge compensation, cool, superjunction (SJ), 3D-RESURF, composite buffer (CB) structures
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
- H01L29/6609—Diodes
- H01L29/66143—Schottky diodes
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- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
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- General Physics & Mathematics (AREA)
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Abstract
The invention discloses a trench-structure charge compensation Schottky semiconductor device and a preparation method thereof. When the semiconductor device is connected to a certain reverse bias voltage, a semiconductor material of a first conduction type in a drifting layer and a charge compensation structure formed by an oxygen-doped polycrystalline silicon material improve reverse breakdown voltage of the device and reduce conduction resistance of the device. The invention further provides a preparation method of the trench-structure charge compensation Schottky semiconductor device.
Description
Technical field
The present invention relates to the oxygen-doped polysilicon charge compensation of having of a kind of groove structure Schottky semiconductor device, the invention still further relates to the preparation method that a kind of groove structure has oxygen-doped polysilicon charge compensation Schottky semiconductor device.Semiconductor device of the present invention is the basic structure of manufacturing semiconductor power device.
Background technology
Power semiconductor is used in power management and application of power in a large number, the semiconductor device that specially refers to schottky junction has become the important trend of device development, schottky device has the advantages such as the low unlatching turn-off speed of forward cut-in voltage is fast, it is large that while schottky device also has reverse leakage current, can not be applied to the shortcomings such as hyperbaric environment.
Schottky diode is the most frequently used is plane figure, traditional surface, planer schottky diode drift region, the Electric Field Distribution curve when reverse biased with sudden change, therefore device has lower reverse breakdown voltage and larger reverse leakage current, and traditional planer schottky diode has higher conducting resistance simultaneously.
Summary of the invention
The present invention proposes mainly for the problems referred to above, and a kind of groove structure charge compensation Schottky semiconductor device and preparation method thereof is provided.
A charge compensation Schottky semiconductor device, is characterized in that: comprising: substrate layer, for semi-conducting material forms; Drift layer, is that the first conductive type semiconductor material forms, and is positioned on substrate layer; A plurality of grooves are arranged in drift layer, are filled with oxygen-doped polysilicon in groove; Schottky barrier junction, drift layer surface between groove.
A preparation method for groove structure charge compensation Schottky semiconductor device, is characterized in that: comprise the steps: to form the first conductive semiconductor material layer on substrate layer surface, then surface forms insulation material layer; Carry out lithography corrosion process and remove surperficial part dielectric, then etching is removed part bare semiconductor material and is formed groove; In groove, carry out oxygen-doped polysilicon deposit; Anti-carve the oxygen-doped polysilicon of erosion, remove surface insulation material; Deposit barrier metal, carries out sintering and forms schottky barrier junction.
When semiconductor device of the present invention connects certain reverse biased, in drift layer, the semi-conducting material of the first conduction type and oxygen-doped polycrystalline silicon material form charge compensation structure, improve the reverse breakdown voltage of device, reduce the conducting resistance of device.
Accompanying drawing explanation
Fig. 1 is a kind of groove structure charge compensation of the present invention Schottky semiconductor device generalized section;
Fig. 2 is a kind of groove structure charge compensation of the present invention Schottky semiconductor device generalized section;
Fig. 3 is a kind of groove structure charge compensation of the present invention Schottky semiconductor device generalized section.
Wherein, 1, substrate layer; 2, silicon dioxide; 3, drift layer; 4, oxygen-doped polysilicon; 5, polycrystalline semiconductor material; 6, schottky barrier junction; 10, upper surface electrode metal; 11, lower surface electrode metal.
Embodiment
Fig. 1 is the profile of a kind of groove structure charge compensation Schottky semiconductor device of the present invention, below in conjunction with Fig. 1, describes semiconductor device of the present invention in detail.
A charge compensation Schottky semiconductor device, comprising: substrate layer 1 is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/cm
3; Drift layer 3, is positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/cm
3; Oxygen-doped polysilicon 4, is arranged in groove, and groove width is 2um, and groove pitch is 2um; Schottky barrier junction 6, is positioned at the surface of semi-conducting material; Upper surface electrode metal 10, is positioned at device surface, for device is drawn anode; Lower surface electrode metal 11, is positioned at the device back side, for device is drawn negative electrode.
Its manufacture craft comprises the steps:
The first step, the semiconductor silicon material at the surperficial epitaxial growth formation of substrate layer 1 N conduction type, forms drift layer 3, and then surface heat oxidation, forms silicon dioxide;
Second step, carries out lithography corrosion process, and semiconductor material surface is removed part silicon dioxide, and then etching is removed part bare semiconductor silicon materials and formed groove;
The 3rd step, the oxygen-doped polysilicon 4 of deposit in groove;
The 4th step, anti-carves the oxygen-doped polysilicon 4 of erosion, and lithography corrosion process is removed drift layer 3 surface silica dioxides between groove;
The 5th step, deposit barrier metal nickel, sintering forms schottky barrier junction 6, erosion removal metallic nickel;
The 6th step, deposit upper surface electrode metal 10, photoetching corrosion is removed part upper surface electrode metal 10, for device is drawn anode, carries out back side metallization technology and forms lower surface electrode metal 11, for device is drawn negative electrode, as shown in Figure 1.
Fig. 2 is the profile of a kind of groove structure charge compensation Schottky semiconductor device of the present invention, below in conjunction with Fig. 2, describes semiconductor device of the present invention in detail.
A charge compensation Schottky semiconductor device, comprising: substrate layer 1 is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/cm
3; Drift layer 3, is positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/cm
3; Oxygen-doped polysilicon 4, is arranged in groove, and groove width is 2um, and groove pitch is 2um; Silicon dioxide 2, is positioned at oxygen-doped polysilicon 4 surfaces; Schottky barrier junction 6, is positioned at the surface of semi-conducting material; Upper surface electrode metal 10, is positioned at device surface and groove, for device is drawn anode; Lower surface electrode metal 11, is positioned at the device back side, for device is drawn negative electrode.
Its manufacture craft comprises the steps:
The first step, the semiconductor silicon material at the surperficial epitaxial growth formation of substrate layer 1 N conduction type, forms drift layer 3, at surface deposition silicon nitride;
Second step, carries out lithography corrosion process, and semiconductor material surface is removed part silicon dioxide, and then etching is removed part bare semiconductor silicon materials and formed groove;
The 3rd step, the oxygen-doped polysilicon 4 of deposit in groove;
The 4th step, anti-carves the oxygen-doped polysilicon 4 of erosion, forms groove, carries out thermal oxidation, forms silicon dioxide 2, and lithography corrosion process is removed drift layer 3 surface nitrogen SiClxs between groove;
The 5th step, deposit barrier metal nickel, sintering forms schottky barrier junction 6, erosion removal metallic nickel;
The 6th step, deposit upper surface electrode metal 10, photoetching corrosion is removed part upper surface electrode metal 10, for device is drawn anode, carries out back side metallization technology and forms lower surface electrode metal 11, for device is drawn negative electrode, as shown in Figure 2.
Fig. 3 is the profile of a kind of groove structure charge compensation Schottky semiconductor device of the present invention, below in conjunction with Fig. 3, describes semiconductor device of the present invention in detail.
A charge compensation Schottky semiconductor device, comprising: substrate layer 1 is N conductive type semiconductor silicon materials, and the doping content of phosphorus atoms is 1E19/cm
3; Drift layer 3, is positioned on substrate layer 1, is the semiconductor silicon material of N conduction type, and the doping content of phosphorus atoms is 1E16/cm
3; Oxygen-doped polysilicon 4, is positioned at trenched side-wall, and groove width is 2um, and groove pitch is 2um; Silicon dioxide 2, is arranged in groove; Schottky barrier junction 6, is positioned at the surface of semi-conducting material; Upper surface electrode metal 10, is positioned at device surface and groove, for device is drawn anode; Lower surface electrode metal 11, is positioned at the device back side, for device is drawn negative electrode.
Its manufacture craft comprises the steps:
The first step, the semiconductor silicon material that forms N conduction type in the surperficial epitaxial growth of substrate layer 1 forms drift layer 3, at surface deposition silicon nitride;
Second step, carries out lithography corrosion process, and semiconductor material surface is removed part silicon dioxide, and then etching is removed part bare semiconductor silicon materials and formed groove;
The 3rd step, forms oxygen-doped polysilicon 4 in trench wall deposit;
The 4th step, anti-carves the oxygen-doped polysilicon 4 of erosion, deposit silicon dioxide 2, and anti-etching silicon dioxide 2,, carrying out thermal oxidation, lithography corrosion process is removed drift layer 3 surface nitrogen SiClxs between groove;
The 5th step, deposit barrier metal nickel, sintering forms schottky barrier junction 6, erosion removal metallic nickel;
The 6th step, deposit upper surface electrode metal 10, photoetching corrosion is removed part upper surface electrode metal 10, for device is drawn anode, carries out back side metallization technology and forms lower surface electrode metal 11, for device is drawn negative electrode, as shown in Figure 3.
By above-mentioned example, set forth the present invention, also can adopt other example to realize the present invention, the present invention is not limited to above-mentioned instantiation, so the present invention is by claims circumscription simultaneously.
Claims (10)
1. a groove structure charge compensation Schottky semiconductor device, is characterized in that: comprising:
Substrate layer, for semi-conducting material forms;
Drift layer, is that the first conductive type semiconductor material forms, and is positioned on substrate layer; A plurality of
Groove, is arranged in drift layer, is provided with oxygen-doped polycrystalline silicon material in groove;
Schottky barrier junction, drift layer surface between groove.
2. semiconductor device as claimed in claim 1, is characterized in that: described substrate layer is the first conductive type semiconductor material of high concentration impurities doping.
3. semiconductor device as claimed in claim 1, is characterized in that: in described groove, oxygen-doped polysilicon surface can be coated with insulating material.
4. semiconductor device as claimed in claim 3, is characterized in that: described insulating material forms groove structure at groove internal upper part, fills electrode metal or polycrystalline semiconductor material in groove.
5. semiconductor device as claimed in claim 1, is characterized in that: in described groove, oxygen-doped polysilicon can be positioned at trenched side-wall fill insulant in groove.
6. semiconductor device as claimed in claim 5, is characterized in that: described insulating material forms groove structure at groove internal upper part, fills electrode metal or polycrystalline semiconductor material in groove.
7. semiconductor device as claimed in claim 1, is characterized in that: described oxygen-doped polysilicon can be for having the oxygen-doped polysilicon of the second conductive impurity doping.
8. semiconductor device as claimed in claim 1, is characterized in that: described oxygen-doped polysilicon and drift layer the first conductive semiconductor material can form charge compensation structure.
9. semiconductor device as claimed in claim 1, is characterized in that: described Schottky barrier is become the barrier junction of barrier metal and the formation of the first conductive semiconductor material.
10. the preparation method of a kind of groove structure charge compensation Schottky semiconductor device as claimed in claim 1, is characterized in that: comprise the steps:
1) on substrate layer surface, form the first conductive semiconductor material layer, then surface forms insulation material layer;
2) carry out lithography corrosion process and remove surperficial part insulating material, then etching is removed part bare semiconductor material and is formed groove;
3) the oxygen-doped polysilicon of deposit in groove;
4) anti-carve the oxygen-doped polysilicon of erosion, remove surface insulation material;
5) deposit barrier metal, carries out sintering and forms schottky barrier junction.
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| CN201210290641.6A CN103594493A (en) | 2012-08-15 | 2012-08-15 | Trench-structure charge compensation Schottky semiconductor device and preparation method thereof |
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| CN201210290641.6A CN103594493A (en) | 2012-08-15 | 2012-08-15 | Trench-structure charge compensation Schottky semiconductor device and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113517193A (en) * | 2021-04-06 | 2021-10-19 | 江苏新顺微电子股份有限公司 | Process method for improving performance of trench MOS structure Schottky diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201279B1 (en) * | 1998-10-22 | 2001-03-13 | Infineon Technologies Ag | Semiconductor component having a small forward voltage and high blocking ability |
| US20010013613A1 (en) * | 2000-02-12 | 2001-08-16 | U.S. Philips Corporation | Semiconductor device and a method of fabricating material for a semiconductor device |
| US6590240B1 (en) * | 1999-07-28 | 2003-07-08 | Stmicroelectronics S.A. | Method of manufacturing unipolar components |
| CN103383968A (en) * | 2012-05-06 | 2013-11-06 | 朱江 | Interface charge compensation Schottky semiconductor device and manufacturing method for same |
-
2012
- 2012-08-15 CN CN201210290641.6A patent/CN103594493A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6201279B1 (en) * | 1998-10-22 | 2001-03-13 | Infineon Technologies Ag | Semiconductor component having a small forward voltage and high blocking ability |
| US6590240B1 (en) * | 1999-07-28 | 2003-07-08 | Stmicroelectronics S.A. | Method of manufacturing unipolar components |
| US20010013613A1 (en) * | 2000-02-12 | 2001-08-16 | U.S. Philips Corporation | Semiconductor device and a method of fabricating material for a semiconductor device |
| CN103383968A (en) * | 2012-05-06 | 2013-11-06 | 朱江 | Interface charge compensation Schottky semiconductor device and manufacturing method for same |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113517193A (en) * | 2021-04-06 | 2021-10-19 | 江苏新顺微电子股份有限公司 | Process method for improving performance of trench MOS structure Schottky diode |
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Application publication date: 20140219 |