CN103580624A - Radio-frequency signal amplification circuit - Google Patents

Abstract

The invention relates to a radio-frequency signal amplification circuit which comprises a main MOS (Metal Oxide Semiconductor) varactor capacitor, an auxiliary MOS varactor capacitor, a main transistor, an auxiliary transistor, an output unit, a first resistor, a second resistor and a third resistor. Based on a multiple gate transistor method (MGTR), the radio-frequency signal amplification circuit uses the MOS varactor capacitors as signal coupling capacitors to replace original linear capacitors by using the characteristic that the capacitance values of the MOS varactor capacitors vary along with the voltages of two ends of the capacitors, so that the linearity of the signal coupling process is modified, the linearity of the whole radio-frequency signal amplification circuit is optimized, and the chip area needed by the coupling capacitors is reduced at the same time.

Description

Rf signal amplification circuit

Technical field

The present invention relates to radio frequency integrated circuit technology, be specifically related to rf signal amplification circuit.

Background technology

The air interface of modern wireless telecommunication system, to the definition of disturbing, except having comprised the interference that is derived from native system inside, also has the interference from different system.Concrete index has: the neighboring trace of transmitter suppresses (ACPR, Adjacent channel power rejection), intermodulation characteristic (inter-modulation) etc., adjacentchannel selectivity (ACS with receiver, Adjacent channel selectivity), block resistance (anti-Blocking characteristic), intermodulation characteristic (inter-modulation) etc.The quality of three rank linearities of radio frequency transceiver has directly determined the quality of above index.

As shown in Figure 1, be the radio frequency transceiver of prior art, its transmission channel is is generally connected and composed by digital to analog converter 100, filter 102, up-conversion mixer 104, pre-power amplifier amplifier 107 and power amplifier 111 successively; Its receive path is is generally connected and composed by low noise amplifier 108, down-conversion mixer 105, filter 103 and analog to digital converter 101 successively.The pre-power amplifier amplifier (PPA of radio frequency signal amplifiers before transmission channel shows as power amplifier PA, pre-PA amplifier) and power amplifier (PA, Power amplifier), in receive path, show as low noise amplifier (LNA, low noise amplifier).The non-linear behaviour of three kinds of radio frequency signal amplifiers more than enumerating has vital impact to radio frequency transceiver overall linear performance.

Radio frequency signal amplifiers is non-linear can be characterized by (formula 1), and the linearity of radio frequency signal amplifiers is conventionally with IIP3 or OIP3 definition (formula 2):

$V_{\mathrm{RFOUT}}=\mathrm{gm}*V_{\mathrm{RFIN}}*Z_{\mathrm{Load}}=(g_1{V}_{\mathrm{RFIN}}+g_2{V}_{\mathrm{RFIN}}^2+g_3{V}_{\mathrm{RFIN}}^3+\·\·\·)*Z_{\mathrm{Load}}$

${\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="HDA0000396920540000041.png"\; state="\{\{state\}\}">g</figure-callout>}}_1=\frac{\&PartialD;I_{\mathrm{RFOUT}}}{\&PartialD;V_{\mathrm{RFIN}}},g_2=\frac{{\&PartialD;}^2{I}_{\mathrm{RFOUT}}}{{\&PartialD;}^2{V}_{\mathrm{RFIN}}},g_3=\frac{{\&PartialD;}^3{I}_{\mathrm{RFOUT}}}{{\&PartialD;}^3{V}_{\mathrm{RFIN}}}$ (formula 1)

$A_{\mathrm{IIP}3}=\sqrt{\frac{4}{3}\left|\frac{g_1}{g_3}\right|}{A}_{\mathrm{OIP}3}=A_{\mathrm{IIP}3}*\mathrm{gm}*Z_{\mathrm{Load}}$ (formula 2)

Wherein, V _rFINthe input voltage signal of radio frequency signal amplifiers, V _rFOUTbe the output voltage signal of radio frequency signal amplifiers, gm is the mutual conductance of the output current of radio frequency signal amplifiers to input voltage signal, Z _loadthe load impedance of radio frequency signal amplifiers, g ₁, g ₂and g ₃respectively that radio frequency signal amplifiers output current is to the first derivative of input voltage signal, second dervative and three order derivatives.

At present under the CMOS process conditions of main flow, the pre-power amplifier amplifier that the power output of take is 0dBm is example, be subject to MOS device current voltage to be square conversion (I-V characteristic) restriction, single metal-oxide-semiconductor is as the OIP3 of the radio frequency signal amplifiers of transconductance element conventionally in 15dBm left and right, but main flow OFDM radio frequency sending set is more than to OIP3, basic demand reaches 23dBm.

Multiple-gate transistors method (MGTR, Multiple-Gated Transistor) is the method for improving radio frequency signal amplifiers linearity of commonly using.The method is open in IEEE Microwave and Guided Wave Letters in 2000 by B.Kim the earliest.

(see figure 2) in the radio frequency signal amplifiers that adopts multiple-gate transistors method, it comprises main transistor M _main, auxiliary transistor M _aux, resistance R 1, resistance R 2, resistance R 3, coupling capacitance C _main, coupling capacitance C _auxand output unit, main transistor M _maingrid by coupling capacitance C _mainwith radio-frequency (RF) signal input end V _rfinconnect auxiliary transistor M _auxgrid by coupling capacitance C _auxwith radio-frequency (RF) signal input end V _rfinconnect coupling capacitance C _mainwith coupling capacitance C _auxall by resistance R 1 and bias voltage V _dcinconnect main transistor M _maindrain electrode be connected with the input of output unit, the feeder ear of output unit is connected with supply voltage Vdd.Main transistor M _mainwith auxiliary transistor M _auxsource electrode and drain electrode short circuit respectively, main transistor M _mainsource ground (Vss), main transistor M _mainby bias voltage V _bmainbe biased in saturation region with resistance R 2, auxiliary transistor M _auxby bias voltage V _bauxbe biased in sub-threshold region with resistance R 3.When saturation region, main transistor M _maing ₃value is negative, when sub-threshold region, and auxiliary transistor M _auxg ₃value is positive number.Therefore, configure respectively the gain of two branch roads, make two branch road g ₃sum levels off to zero, and the linear properties of radio frequency signal amplifiers just obtains the improvement of certain degree.Process can be represented by formula 3.

$V_{\mathrm{RFOUT}}=({\mathrm{gm}}_{\mathrm{main}}+{\mathrm{gm}}_{\mathrm{aux}})*V_{\mathrm{RFIN}}*Z_{\mathrm{Load}}$

$=[({\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="HDA0000396920540000041.png"\; state="\{\{state\}\}">g</figure-callout>}}_{1\mathrm{main}}+{\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="HDA0000396920540000041.png"\; state="\{\{state\}\}">g</figure-callout>}}_{1\mathrm{aux}})V_{\mathrm{RFIN}}+(g_{2\mathrm{main}}+g_{2\mathrm{aux}})V_{\mathrm{RFIN}}^2+(g_{3\mathrm{mian}}+g_{3\mathrm{aux}})V_{\mathrm{RFIN}}^3+...)]*Z_{\mathrm{Load}}$

$g_{3\mathrm{main}}+g_{3\mathrm{aux}}\&RightArrow;0$ (formula 3)

General MGTR method is not considered the non-linear of generation in signal coupling process.Concrete: the device that MGTR method uses, except master/auxiliary transistor, also needs two coupling capacitance C _main, C _aux.Common C _main, C _auxwhat use is linear capacitance, as MIM(Metal-Insulation-Metal) electric capacity or MOM(Metal-Oxide-Metal) electric capacity.The capacitance of linear capacitance does not change with both end voltage.

The frequency method of master/auxiliary branch road is shown in formula 4

$F_{\mathrm{main}}=\frac{C_{\mathrm{main}}}{C_{\mathrm{main}}+C_{\mathrm{gmain}}},F_{\mathrm{aux}}=\frac{C_{\mathrm{aux}}}{C_{\mathrm{aux}}+C_{\mathrm{gaux}}}$ (formula 4)

Master/auxiliary transistorized grid capacitance C _gmain, C _gauxalong with gate source voltage V separately _gsvariation and change (see figure 3), grid capacitance is under different biasings and non-constant.According to formula 4, F _mainand F _auxalso the variation with input voltage signal changes, and coupling process exists non-linear contribution.Especially, auxiliary transistor is in sub-threshold region, the transitional region of transistor channel in He Ruo inversion regime, depletion region, C _gauxnon-linear maximum.

When linear coupling electric capacity value is more much bigger than gate capacitance, the non-linear contribution of coupling process can be ignored.But when chip area restriction, when coupling capacitance cannot be got larger value, when especially the coupling capacitance of auxiliary branch is enough large, non-linear obvious that the linear properties of whole radio frequency signal amplifiers is just showed of this coupling process.

Therefore the voltage transmission of MGTR method radio frequency signal amplifiers can be rewritten into formula 5:

$\begin{array}{c}{V}_{\mathrm{RFOUT}}=\mathrm{gm}*V_{\mathrm{RFIN}}*Z_{\mathrm{Load}}\\ =\left[\begin{array}{c}{F}_{\mathrm{main}}\left(V_{\mathrm{RFIN}}\right)*(g_{\mathrm{lmain}}{V}_{\mathrm{RFIN}}+g_{2\mathrm{main}}{V}_{\mathrm{RFIN}}^2+g_{3\mathrm{main}}{V}_{\mathrm{RFIN}}^3+...)\\ +F_{\mathrm{aux}}\left(V_{\mathrm{RFIN}}\right)*({\mathrm{<figure-callout\; id="1"\; label="g"\; filenames="HDA0000396920540000041.png"\; state="\{\{state\}\}">g</figure-callout>}}_{1\mathrm{aux}}{V}_{\mathrm{RFIN}}+g_{2\mathrm{aux}}{V}_{\mathrm{RFIN}}^2+g_{3\mathrm{aux}}{V}_{\mathrm{RFIN}}^3+...)\end{array}\right]*Z_{\mathrm{Load}}\end{array}$

(formula 5)

G _1main, g _2main, g _3mainand g _1aux, g _2aux, g _3auxrespectively that main transistor and auxiliary transistor output current are to the first derivative of input voltage signal, second dervative and three order derivatives.

Summary of the invention

The object of the invention is to propose a kind of rf signal amplification circuit, the problem that its linear properties that can solve the whole radio frequency signal amplifiers of non-linear effects of coupling process shows.

In order to achieve the above object, the technical solution adopted in the present invention is as follows:

, it comprises a main MOS varactor electric capacity, an auxiliary MOS varactor electric capacity, a main transistor, an auxiliary transistor, an output unit, one first resistance, one second resistance and one the 3rd resistance; The grid of the grid of main MOS varactor electric capacity and auxiliary MOS varactor electric capacity links together and as radio-frequency (RF) signal input end, described radio-frequency (RF) signal input end accesses an operating voltage by the first resistance; The source electrode of main MOS varactor electric capacity and drain electrode links together and as main SD end, the source electrode of auxiliary MOS varactor electric capacity and drain electrode link together and as auxiliary SD end; The source grounding of main transistor and auxiliary transistor, the drain electrode of main transistor and the drain electrode of auxiliary transistor link together, and the grid of main transistor is connected with main SD end, and the grid of auxiliary transistor is connected with auxiliary SD end; The grid of main transistor accesses a main bias voltage by the second resistance, and the grid of auxiliary transistor accesses an assisted bias voltage by the 3rd resistance; The drain electrode of main transistor is connected with the input of described output unit; The feeder ear of described output unit accesses a supply voltage;

Wherein, described operating voltage, for making the gate source voltage of described main MOS varactor electric capacity be greater than zero and be less than its accumulation area voltage, and makes the gate source voltage of described auxiliary MOS varactor electric capacity be greater than zero and be less than its accumulation area voltage.

Preferably, described output unit comprises a load impedance and has gate transistor altogether, the described drain electrode of gate transistor altogether accesses described supply voltage by load impedance, and the access of the grid of gate transistor has gate bias voltage altogether altogether, and the source electrode of gate transistor and the drain electrode of main transistor are connected altogether; The drain electrode of gate transistor and the connected node of load impedance are as radiofrequency signal output altogether.Further preferred, the driving voltage of described gate transistor is altogether higher than the driving voltage of main transistor and/or auxiliary transistor.

Preferably, main transistor is operated in saturation region, and auxiliary transistor is operated in sub-threshold region.

The present invention has following beneficial effect:

The first, by improving the linearity of signal coupling process, can significantly improve rf signal amplification circuit linear properties; The second, significantly improved coupling capacitance area efficiency, reduce coupling capacitance chip area expense; The 3rd, coupling process process matching is better, and the stability of the relative technique change of rf signal amplification circuit performance is better.

Accompanying drawing explanation

Fig. 1 is the circuit theory schematic diagram of the radio frequency transceiver of prior art;

Fig. 2 is the circuit theory schematic diagram of the radio frequency signal amplifiers of prior art;

Fig. 3 is transistorized grid capacitance-gate source voltage characteristic curve (C of prior art _gs-V _gscharacteristic curve);

Fig. 4 is the circuit theory schematic diagram of the rf signal amplification circuit of one embodiment of the present of invention;

Fig. 5 is grid capacitance-gate source voltage characteristic curve (C of MOS varactor electric capacity _gs-V _gscharacteristic curve);

Fig. 6 is the circuit theory schematic diagram of the rf signal amplification circuit of an alternative embodiment of the invention;

Fig. 7 is rf signal amplification circuit of the present invention and the comparison schematic diagram of the third order intermodulation ratio of the rf signal amplification circuit power output of prior art;

Fig. 8 is the comparison schematic diagram of the rf signal amplification circuit power output of rf signal amplification circuit of the present invention and prior art OIP3 while being 1.5dBm.

Embodiment

Below, by reference to the accompanying drawings and embodiment, the present invention is described further.

As shown in Figure 4, a kind of rf signal amplification circuit, it comprises a main MOS varactor capacitor C _main, an auxiliary MOS varactor capacitor C _aux, a main transistor M _main, an auxiliary transistor M _aux, an output unit, one first resistance R 1, one second resistance R 2 and one the 3rd resistance R 3.

Main MOS varactor capacitor C _maingrid G and auxiliary MOS varactor capacitor C _auxgrid G link together and as radio-frequency (RF) signal input end V _rfin, described radio-frequency (RF) signal input end V _rfinby the first resistance R 1 access one operating voltage V _dcin.Described operating voltage V _dcin, for making described main MOS varactor capacitor C _maingate source voltage be greater than zero and be less than its accumulation area voltage, and make described auxiliary MOS varactor capacitor C _auxgate source voltage V _gsbe greater than zero and be less than its accumulation area voltage V _corner, limit two electric capacity and be operated in its C separately _gs-V _gsthe transition region Zheng Ban district (see figure 5) of curve.

Main MOS varactor capacitor C _mainsource electrode and drain electrode links together and as main SD end, auxiliary MOS varactor capacitor C _auxsource electrode and drain electrode links together and as auxiliary SD end.Main transistor M _mainwith auxiliary transistor M _auxsource grounding (Vss), main transistor M _maindrain electrode and auxiliary transistor M _auxdrain electrode link together, main transistor M _maingrid be connected with main SD end, auxiliary transistor M _auxgrid be connected with auxiliary SD end.

Main transistor M _maingrid by the second resistance R 2 access one main bias voltage V _bmain, described main bias voltage V _bmainbe used for making main transistor M _mainbe operated in saturation region.

Auxiliary transistor M _auxgrid by the 3rd resistance R 3 access one assisted bias voltage V _baux, described assisted bias voltage V _bauxbe used for making auxiliary transistor M _auxbe operated in sub-threshold region.

Main transistor M _maindrain electrode be connected with the input of described output unit, the feeder ear of described output unit accesses a supply voltage Vdd, described supply voltage Vdd is 3.3V.Concrete, described output unit comprises a load impedance Zload and has gate transistor M altogether _cas, described gate transistor M altogether _casdrain electrode by load impedance Zload, access described supply voltage Vdd, gate transistor M altogether _casgrid access gate bias voltage V altogether _bcas, be total to gate transistor M _cassource electrode and main transistor M _maindrain electrode connect.Be total to gate transistor M _casdrain electrode and the connected node of load impedance Zload as radiofrequency signal output V _rfout.Be total to gate transistor M _cascan alleviate main transistor M _mainwith auxiliary transistor M _auxmiller effect (The Miller Effect), also play the reverse isolation effect of radiofrequency signal.In addition, described gate transistor M altogether _casdriving voltage be 3.3V, main transistor M _mainwith auxiliary transistor M _auxdriving voltage be 1.2V.

The basic principle of the present embodiment is: utilize MOS varactor electric capacity (MOS Varactor) capacitance with the characteristic of the change in voltage at electric capacity two ends, on the basis of MGTR method, use MOS varactor electric capacity as signal coupling electric capacity, replace original linear capacitance, improve the linearity of signal coupling process, the linearity of whole rf signal amplification circuit is optimized, reduces the required chip area of coupling capacitance simultaneously.

MOS varactor electric capacity is the normal component that CMOS technique provides, and belongs to charge accumulated type N-type channel capacitance.Capacitor voltage characteristic (the C of MOS varactor electric capacity _gs-V _gscharacteristic) as shown in Figure 5.C in Fig. 5 _gs-V _gscharacteristic curve is visible, works as V _gswhile being less than a negative threshold voltage, capacitance body is in depletion region, and along with grid voltage improves, capacitance body is transitioned into accumulation area from depletion region gradually.Work as V _gsbe greater than accumulation area voltage V _cornertime, capacitance body is completely in accumulation area, and capacitance keeps substantially constant.This process, capacitance increases 4-5 doubly.Fig. 4 is visible, and G end is made the positive pole of MOS varactor electric capacity, and SD end is made the negative pole of MOS varactor electric capacity, V _gsthe dull capacitance of controlling varactor electric capacity of voltage, V _gslarger, varactor capacitor C _gslarger.

In 130nmCMOS technique, MOS varactor electric capacity active area unit-area capacitance reaches as high as 12fF/um ², have than MIM electric capacity (1.5fF/um ²) exceed the advantage of the active area unit-area capacitance of maximum 8 times, use MOS varactor electric capacity can reduce the requirement of coupling capacitance to chip area.

Because the capacitance of coupling capacitance and the capacitance of grid capacitance are all inversely proportional to thin oxide layer thickness, to compare and adopt MIM electric capacity or MOM electric capacity (capacitance of coupling capacitance is uncorrelated with the capacitance of gate capacitance), coupling coefficient does not change with technique change substantially.Therefore, adopt the circuit of the present embodiment, when changes in process parameters, stability is better.

The design process of the present embodiment is as follows:

The first step, by general MGTR method, design main transistor M _main, auxiliary transistor M _auxsize and main bias voltage V _bmain, assisted bias voltage V _baux.Main transistor M _mainbe biased in saturation region, auxiliary transistor M _auxbe biased in sub-threshold region.By direct current, scan, obtain both output current and input voltage relation curves, to curve differentiate respectively, obtain g _3mainand g _3aux, adjust master/auxiliary transistorized size and master/auxiliary bias voltage, make g _3mainand g _3auxwithin the scope of input signal amplitude, farthest cancel out each other.

Second step, amplifies with assisting the main MOS varactor capacitor C that branch road adds the use that is coupled at main amplification branch road respectively _mainwith auxiliary MOS varactor capacitor C _aux, set the operating voltage of two MOS varactor electric capacity, also set V _dcin.The V setting _dcinvalue is required to meet following principle: C _mainand C _auxv _gsbe greater than zero, and be less than accumulation area voltage V _corner, limit two electric capacity and be operated in its C _gs-V _gsthe transition region Zheng Ban district of curve.

The 3rd step, respectively selected suitable MOS varactor capacitance size.In this step, can to the MOS varactor electric capacity of two branch roads, carry out parameter scanning respectively, by measuring the IP3 value under different parameters, obtain optimal value.

The circuit of the present embodiment can be applicable to integrated low noise amplifier, and pre-power amplifier amplifier and power amplifier etc. require in the design of high linear radio frequency signal amplifiers.

In addition, the circuit form of the present embodiment can be the single-ended input Single-end output form as Fig. 4, also can expand to the differential-input differential output form as Fig. 6.

Now with the design example of the pre-power amplifier amplifier of a 2.4GHz frequency range based under TSMC130nm CMOS technique, by relatively circuit (Fig. 4) and the general MGTR method circuit (Fig. 2) of the present embodiment, the technical scheme of detailed description the present embodiment:

As shown in Figure 4, Vdd is 3.3V, and each device parameters is as follows: M _mainwide length is 115um/0.13um, M _auxwide length is 580um/0.13um, M _caswide length is 940um/0.35um; C _mainwide length is 48um/1.6um, V _gsc during for 0V _maincapacitance 0.6pF; C _auxbreadth length ratio is 216um/1.6um, V _gsc during for 0V _auxcapacitance 2.7pF; Each voltage V _dcin, V _bmain, V _baux, V _bcasvalue is respectively 0.65V, 0.65V, 0.33V, 1.8V.

The general MGTR method circuit (Fig. 2) of contrast use is used MIM electric capacity (1.5fF/um ²) as coupling capacitance, C _mainthe wide long 22um/18um in active area, capacitance is 0.6pF; C _auxthe wide long 44um/40um in active area, capacitance is 2.7pF.All the other parameters are consistent with Fig. 4 circuit parameter.The circuit that emulation is used is all differential-input differential output form (Fig. 6), is below simulation result contrast:

In upper table, data can be seemed, consuming same current, in output equal-wattage situation, adopt the rf signal amplification circuit OIP3 of the present embodiment to improve 7.5dBm, coupling capacitance area is only for being used the 42%(3300/7800=42% of the general MGTR method of MIM electric capacity area).

Fig. 7 is two radio frequency amplifying circuit power outputs, and third order intermodulation is than (IM3Inter-modulation3 ^rd) comparison, the rf signal amplification circuit that adopts the present embodiment power output from-20dBm to+5dBm within the scope of, reduced largely the generation of third-order intermodulation product.

Fig. 8 is the comparison of two radio frequency amplifiers OIP3 when power output is 1.5dBm, at suitable V _dcinin interval, the more general MGTR method of OIP3 value is improved nearly 7.5dBm.

For a person skilled in the art, can make other various corresponding changes and distortion according to technical scheme described above and design, and these all changes and distortion all should belong to the protection range of the claims in the present invention within.

Claims (4)

1. rf signal amplification circuit, is characterized in that, comprises a main MOS varactor electric capacity, an auxiliary MOS varactor electric capacity, a main transistor, an auxiliary transistor, an output unit, one first resistance, one second resistance and one the 3rd resistance; The grid of the grid of main MOS varactor electric capacity and auxiliary MOS varactor electric capacity links together and as radio-frequency (RF) signal input end, described radio-frequency (RF) signal input end accesses an operating voltage by the first resistance; The source electrode of main MOS varactor electric capacity and drain electrode links together and as main SD end, the source electrode of auxiliary MOS varactor electric capacity and drain electrode link together and as auxiliary SD end; The source grounding of main transistor and auxiliary transistor, the drain electrode of main transistor and the drain electrode of auxiliary transistor link together, and the grid of main transistor is connected with main SD end, and the grid of auxiliary transistor is connected with auxiliary SD end; The grid of main transistor accesses a main bias voltage by the second resistance, and the grid of auxiliary transistor accesses an assisted bias voltage by the 3rd resistance; The drain electrode of main transistor is connected with the input of described output unit; The feeder ear of described output unit accesses a supply voltage;

Wherein, described operating voltage, for making the gate source voltage of described main MOS varactor electric capacity be greater than zero and be less than its accumulation area voltage, and makes the gate source voltage of described auxiliary MOS varactor electric capacity be greater than zero and be less than its accumulation area voltage.

2. rf signal amplification circuit as claimed in claim 1, it is characterized in that, described output unit comprises a load impedance and has gate transistor altogether, the described drain electrode of gate transistor altogether accesses described supply voltage by load impedance, the access of the grid of gate transistor has gate bias voltage altogether altogether, and the source electrode of gate transistor and the drain electrode of main transistor are connected altogether; The drain electrode of gate transistor and the connected node of load impedance are as radiofrequency signal output altogether.

3. rf signal amplification circuit as claimed in claim 2, is characterized in that, the driving voltage of described gate transistor is altogether higher than the driving voltage of main transistor and/or auxiliary transistor.

4. rf signal amplification circuit as claimed in claim 1, is characterized in that, main transistor is operated in saturation region, and auxiliary transistor is operated in sub-threshold region.

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