CN102981021B - Differential capacitance-voltage conversion circuit and acceleration sensor detection system - Google Patents
Differential capacitance-voltage conversion circuit and acceleration sensor detection system Download PDFInfo
- Publication number
- CN102981021B CN102981021B CN201210488560.7A CN201210488560A CN102981021B CN 102981021 B CN102981021 B CN 102981021B CN 201210488560 A CN201210488560 A CN 201210488560A CN 102981021 B CN102981021 B CN 102981021B
- Authority
- CN
- China
- Prior art keywords
- differential amplifier
- electric capacity
- capacitor
- output terminal
- voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Landscapes
- Amplifiers (AREA)
Abstract
The invention discloses a differential capacitance-voltage conversion circuit and an acceleration sensor detection system. The differential capacitance-voltage conversion circuit is used for converting a capacitance difference value into a voltage difference value, and comprises a clock signal source for generating a clock signal, a sampling circuit and a differential amplifying circuit; the differential amplifying circuit comprises a differential amplifier, a first capacitor, a second capacitor, a third capacitor and a fourth capacitor; the sampling circuit comprises a first reference capacitor, a second reference capacitor, a first sampling output end and a second sampling output end; and two conducting circuits are composed of each component above. The invention further discloses an acceleration sensor detection system adopting the differential capacitance-voltage conversion circuit. The influence of external disturbance and noise is overcome through the manner of a difference channel, and the voltage deviation and noise of an amplifier are solved by adopting the clock signal in different conductive paths, so that the sampling precision and degree of sensitivity are improved.
Description
Technical field
The present invention relates to a kind of differential type convert of capacitor to voltage circuit and acceleration transducer detection system.
Background technology
At present a lot of acceleration transducers adopt the change of electric capacity to characterize the acceleration of the displacement of acceleration transducer place object.The variation that the capacitance Cs 1 of the both sides that for example central shaft of acceleration transducer forms and CS2 can produce capacitance along with the variation of the speed detecting, for example, CS1+ Δ C and CS2-Δ C or CS1-Δ C and CS2+ Δ C.The size and Orientation of this variation is the size and Orientation of the acceleration of the sensor that accelerates.
In other words, acceleration transducer changes into positive and negative electric capacity difference the size and Orientation of speed, if positive electricity tolerance represents CS1-CS2, that negative capacitance difference is exactly CS2-CS1.And the electric capacity difference of this reflection acceleration magnitude and direction cannot directly directly be processed by treatment circuit subsequently.
The electric capacity difference that is to say described reflection acceleration magnitude and direction need to be converted into could pass through back-end circuit after voltage and process and obtain an application result that represents acceleration.
A lot of existing convert of capacitor to voltage circuit design still adopt single-ended signal design at present, thus cannot overcome the impact of external disturbance and noise, thus reduced sampling precision and the sensitivity of acceleration transducer.And the variation of the device self such as voltage amplifier and sampling precision and the sensitivity that noise has limited acceleration transducer further in existing convert of capacitor to voltage circuit.
Summary of the invention
The technical problem to be solved in the present invention is in order to overcome the low precision of convert of capacitor to voltage circuit of prior art and the defect of muting sensitivity, a kind of differential type convert of capacitor to voltage circuit is provided, by the mode of difference channel, overcome the impact of external disturbance and noise, and utilize clock signal at different conductive paths, to come variation and the noise of erase amplifier self, thereby improve sampling precision and the sensitivity of acceleration transducer.
The present invention solves above-mentioned technical matters by following technical proposals:
The invention provides a kind of differential type convert of capacitor to voltage circuit, for an electric capacity difference is converted into a voltage difference, be characterized in, described convert of capacitor to voltage circuit comprises a signal source of clock, a sample circuit and a differential amplifier circuit that generates a clock signal;
Described differential amplifier circuit comprises a differential amplifier, one first electric capacity, one second electric capacity, one the 3rd electric capacity and one the 4th electric capacity; Described sample circuit comprises one first reference capacitance, one second reference capacitance, one first sampling output terminal and one second sampling output terminal;
When described clock signal is high level or low level, described differential amplifier circuit comprises following conductive path:
The positive input terminal of described differential amplifier and negative input end access a reference voltage by described the first electric capacity and described the 3rd electric capacity respectively; The positive input terminal of described differential amplifier and negative output terminal are electrically connected to;
The negative input end of described differential amplifier and positive output end are electrically connected to;
Described sample circuit comprises following conductive path:
Described the first reference capacitance, the first sampling output terminal and one first testing capacitance are serially connected with between a VDD-to-VSS successively, described the second reference capacitance, the second sampling output terminal and one second testing capacitance be serially connected with successively and described power supply between; Described the first sampling output terminal and the second sampling output terminal are all electrically connected to described reference voltage;
When described clock signal is anti-phase, described differential amplifier circuit comprises following conductive path:
The positive input terminal of described differential amplifier and described first is sampled and is connected in series described the first electric capacity between output terminal, between the negative input end of described differential amplifier and described the second sampling output terminal, is connected in series described the 3rd electric capacity; Between the negative output terminal of described first sampling output terminal and described differential amplifier, be connected in series described the second electric capacity, described second samples is connected in series described the 4th electric capacity between the positive output end of output terminal and described differential amplifier;
Described sample circuit comprises following conductive path:
Described the first reference capacitance, the first sampling output terminal and one first testing capacitance be serially connected with successively and described power supply between, described the second reference capacitance, the second sampling output terminal and one second testing capacitance are also serially connected with between described VDD-to-VSS successively.
Described differential signal is exactly the signal of two equal amplitude opposite phases.Difference between these two signals is exactly differential signal.Because the interference for external and noise can appear on these two fully differential signal wires, so can cancel each other simultaneously.Finally can obtain better CMRR(common-mode rejection ratio) and PSRR(Power Supply Rejection Ratio).So utilize the pattern of differential signal to carry out the conversion of capacitance voltage in the present invention, thereby eliminate external interference and noise.Improve the sensitivity detecting.
Wherein the present invention is when arbitrary state of clock signal and during rp state, correspond respectively to sampling conductive path and amplify conductive path, specifically, for example, when clock signal is during at high level, by coming at the first sampling output terminal and the second sampling output terminal access reference voltage capacitor charging to be measured to reference voltage, thereby realize the sampling to testing capacitance.When clock signal inversion is low level, by the first sampling output terminal and the second sampling output terminal access differential amplifier, realize the differential amplification to the electric capacity difference of testing capacitance.
And in differential amplifier circuit, by the first electric capacity and the 3rd electric capacity, remove zero migration and the low-frequency noise that differential amplifier self exists in the present invention.Specifically, for example, when the high level of clock signal, to in the process of electric capacity sampling, the conductive path consisting of differential amplifier gathers zero migration and low-frequency noise, and clock signal is anti-phase while being low level, in the process of sampled signal differential amplification, add differential amplifier to eliminate zero migration and the low-frequency noise of differential amplifier self zero migration and low-frequency noise.
Preferably, described differential amplifier circuit also comprises one first differential amplifier, one the 5th electric capacity, one the 6th electric capacity, one the 7th electric capacity and one the 8th electric capacity;
When described clock signal is high level or low level, described differential amplifier circuit also comprises following conductive path:
The positive input terminal of described the first differential amplifier and negative input end access described reference voltage by described the 5th electric capacity and described the 7th electric capacity respectively; The positive input terminal of described the first differential amplifier and negative input end are also electrically connected to described reference voltage; The positive input terminal of described the first differential amplifier and negative output terminal are electrically connected to; The negative input end of described the first differential amplifier and positive output end are electrically connected to;
When described clock signal is anti-phase, described differential amplifier circuit also comprises following conductive path:
Between the positive input terminal of described the first differential amplifier and the negative output terminal of described differential amplifier, be connected in series described the 5th electric capacity, between the negative input end of described the first differential amplifier and the positive output end of described differential amplifier, be connected in series described the 7th electric capacity; Between the negative output terminal of the positive input terminal of described the first differential amplifier and described the first differential amplifier, be connected in series described the 6th electric capacity, between the positive output end of the negative input end of described the first differential amplifier and described the first differential amplifier, be connected in series described the 8th electric capacity.
The present invention is by amplifying further to make the final differential signal obtaining more meet the demand of subsequent conditioning circuit or equipment to the output of differential amplifier.
Preferably, half of the magnitude of voltage that the magnitude of voltage of described reference voltage is described power supply.
For the ease of the calculating of the differential voltage value of whole differential type convert of capacitor to voltage circuit output, the magnitude of voltage of described reference voltage is preferably set to half of magnitude of voltage of described power supply.
The present invention also provides a kind of acceleration transducer detection system, comprise an acceleration transducer, be characterized in, described acceleration transducer detection system also comprises differential type convert of capacitor to voltage circuit as above, and wherein said differential type convert of capacitor to voltage circuit is converted into voltage difference by the electric capacity difference of described acceleration transducer.
Preferably, described acceleration transducer is MEMS(MEMS (micro electro mechanical system)) acceleration transducer.
Because adopting the change of electric capacity, current acceleration transducer characterizes acceleration, especially the MEMS acceleration transducer of its place object.The capacitance Cs 1 of MEMS acceleration transducer both sides and CS2 can produce along with the variation of detection speed the variation of capacitance, for example CS1+ Δ C and CS2-Δ C or CS1-Δ C and CS2+ Δ C.The size and Orientation of this variation is the size and Orientation of the acceleration of sensor.In other words, acceleration transducer changes into positive and negative electric capacity difference the size and Orientation of speed, if positive electricity tolerance represents CS1-CS2, that negative capacitance difference is exactly CS2-CS1.The electric capacity difference of this reflection acceleration magnitude and direction need to be converted into could pass through back-end circuit after voltage and process an application result that represents acceleration of acquisition.So the present invention in acceleration transducer, is converted into by the electric capacity difference that characterizes acceleration the voltage difference of can back-end circuit processing thereby realize by differential type convert of capacitor to voltage circuit application.
Meeting on the basis of this area general knowledge, above-mentioned each optimum condition, can combination in any, obtains the preferred embodiments of the invention.
Positive progressive effect of the present invention is:
Differential type convert of capacitor to voltage circuit of the present invention utilizes the mode of difference channel to reduce common mode interference, and the error causing as switch and the noise coming by chip substrate or power lead coupling, so can improve signal and noise proportional.In addition, sensitivity and dynamic range also can increase to some extent.
The present invention is based on the different conductive path that clock signal forms constantly and realize the two kinds of circuit of amplification to the sampling of electric capacity and signal, and in electric capacity sampling process, to gather and eliminate variation and the noise of differential amplifier self, thereby improve further sampling precision and the sensitivity of acceleration transducer.
Accompanying drawing explanation
Fig. 1 is the electrical block diagram of the preferred embodiment of acceleration transducer detection system of the present invention.
Embodiment
Mode below by embodiment further illustrates the present invention, but does not therefore limit the present invention among described scope of embodiments.
As shown in Figure 1, in the acceleration transducer detection system of the present embodiment, by a differential type convert of capacitor to voltage circuit, the electric capacity difference of capacitor C S1 and capacitor C S2 in one MEMS acceleration transducer 3 is converted into voltage difference.
Specifically, as shown in Figure 1, described differential type convert of capacitor to voltage circuit comprises a sample circuit 1, a differential amplifier circuit 2 and a signal source of clock (in Fig. 1, not showing).
Described signal source of clock generates a clock signal, when wherein described clock signal is high level in the present embodiment, and all switch P 1 conductings, all switch P 2 disconnect.When described clock signal is anti-phase while being low level, all switch P 1 disconnect, all switch P 2 conductings.Wherein all switch P 1 and switch P 2 can be circuit component, device or the unit that switching tube etc. can be realized switch.
In addition described switch P 1 also can conducting when clock signal is low level, and described switch P 2 is all conductings when making the inversion signal of signal of switch P 1 conducting.
The present embodiment, by conducting and the disconnection of all switch P 1 and all switch P 2, is realized two different conductive paths at described sample circuit 1 and differential amplifier circuit 2, thereby is realized the function that in the present embodiment, electric capacity difference is converted into voltage difference.
In wherein said sample circuit 1, use capacitor C R1 as the reference capacitance of the capacitor C S1 of MEMS acceleration transducer 3, use capacitor C R2 as the reference capacitance of capacitor C S2.
As shown in Figure 1, thus in the present embodiment when all switch P 1 conducting switch P 2 disconnects, the conductive path of described sample circuit 1 is:
Described power vd D is both by capacitor C R1, the sampling end CP and the capacitor C S1 ground connection that are connected in series successively, also by capacitor C R2, the sampling end CM and the capacitor C S2 ground connection that are connected in series successively.And described sampling end CP and sampling end CP be all electrically connected to reference voltage VCM, the magnitude of voltage of described reference voltage VCM is half of magnitude of voltage of power vd D.
That is to say, capacitor C R1 and capacitor C R2 are connected to power vd D, and capacitor C S1 and capacitor C S2 are connected to ground.The reference voltage VCM=VDD/2 that sampling end CP and sampling end CP are connected to.Therefore, in this stage, capacitor C S1 and capacitor C S2 are charged to VDD/2, and capacitor C R1 and be charged to-VDD/2 of capacitor C R1.Being stored in the voltage difference that charge Q in any capacitor all equals capacitance and electric capacity two ends multiplies each other.Q=C*V。Wherein C is capacitance, and V is the voltage difference at electric capacity two ends.
Differential amplifier circuit described in the present embodiment 2 is two-stage amplifier, and wherein first order amplifier comprises a differential amplifier U1, capacitor C AZ1, capacitor C AZ2, capacitor C F1 and capacitor C F2.Second level amplifier comprises a differential amplifier U2, capacitor C gi1, capacitor C gi2, capacitor C gf1 and capacitor C gf2.
Equally when so the switch P 1 conducting switch P 2 when all disconnects, described differential amplifier circuit 2 and described sample circuit 1 disconnect completely, between the first order amplifier of same described differential amplifier circuit 2 and second level amplifier, also disconnect completely, so there is not phase mutual interference between described sample circuit 1, first order amplifier and second level amplifier.
And now the conductive path of first order amplifier is:
The positive input terminal of described differential amplifier U1 is by described capacitor C AZ1 access reference voltage VCM, and the negative input end of described differential amplifier U1 is by described capacitor C AZ2 access reference voltage VCM.The positive input terminal of described differential amplifier U1 and negative output terminal Voutn1 are electrically connected to, and the negative input end of described differential amplifier U1 and positive output end Voutp1 are electrically connected to.
Now the zero migration of differential amplifier U1 and low-frequency noise can be left in respectively in capacitor C AZ1 and capacitor C AZ2.The zero migration of differential amplifier U1 and low frequency noise like this, can be deleted in to the amplification process of the sampled voltage of sample circuit 1 output.So the present embodiment is made output bias by capacitor C AZ1 and capacitor C AZ2 zero migration and low frequency noise, thereby in after this to the amplification process of the sampled voltage of sample circuit 1 output, will cancel each other because this leaves zero migration and the low frequency noise that zero migration in capacitor C AZ1 and capacitor C AZ2 and low frequency noise and described differential amplifier U1 occurs in to the amplification process of the sampled voltage of sample circuit 1 output in advance in.Therefore, the zero migration of described differential amplifier U1 and low frequency noise have also fallen with regard to deleted the impact of output.
Equally, the conductive path in the amplifier of the described second level is:
The positive input terminal of described differential amplifier U2 accesses described reference voltage VCM by capacitor C gi1, and the negative input end of described differential amplifier U2 accesses described reference voltage VCM by capacitor C gi2.And the positive input terminal of described differential amplifier U2 and negative input end are also electrically connected to described reference voltage VCM.The positive input terminal of described differential amplifier U2 and negative output terminal Voutn2 are electrically connected to, and the negative input end of described differential amplifier U2 and positive output end Voutp2 electrical connection.
Now second level amplifier is identical with the principle of the first amplifier, and variation of himself etc. is proofreaied and correct, and concrete principle please refer to first order amplifier, just repeats no more herein.
As mentioned above, in 1 conducting of all switch P, when all switch P 2 disconnect, capacitor C S1 and capacitor C S2 in 1 pair of acceleration transducer of sample circuit of the present embodiment sample, and first order amplifier and the second level amplifier in differential amplifier circuit 2 carries out the corrections such as variation simultaneously.And prevent crosstalking etc. between each circuit by the first order amplifier in isolation sample circuit 1 and differential amplifier circuit 2 and second level amplifier.
In the present embodiment, working as all switch P 1 disconnects, during all switch P 2 conducting, described sample circuit 1 is connected with second level amplifier electric with the first order amplifier in differential amplifier circuit 2, so the capacitor C S1 that described sample circuit 1 is gathered and the difference of capacitor C S2 transform and be enlarged into voltage difference.
Specifically, when all switch P 1 disconnect, during all switch P 2 conducting, the conductive path in described sample circuit 1 is:
Described power vd D is both by capacitor C S1, the sampling end CP and the capacitor C R1 ground connection that are connected in series successively, also by capacitor C S2, the sampling end CM and the capacitor C R2 ground connection that are connected in series successively.And described sampling end CP is electrically connected to the positive input terminal of differential amplifier U1 by capacitor C AZ1.Described sampling end CM is electrically connected to the negative input end of differential amplifier U1 by capacitor C AZ2.
Be that capacitor C R1 and capacitor C R2 are connected to ground, and capacitor C S1 and capacitor C S2 are connected to power vd D.Due to switch P 1 conducting all, when all switch P 2 disconnect, described sampling end CP and sampling end CM have been controlled in VCM=VDD/2.According to the principle of charge conservation, electric charge should remain unchanged on described sampling end CP and sampling end CM.Therefore, in capacitor C S1 and capacitor C R1, charge differences (Qcs1-Qcr1) is transferred to capacitor C F1 at this moment.The charge differences of capacitor C S2 and capacitor C R2 (Qcs2 – Qcr2) is transferred to capacitor C F2 at this moment.When if in the present embodiment, the capacitance of capacitor C R1 equals the capacitance of capacitor C R2, in fact the electric charge difference between final described capacitor C F1 and capacitor C F2 is exactly differential charge (Qcs1-Qcr1)-(Qcs2-Qcr2)=(Qcs1 – Qcs2).
Equally, when all switch P 1 disconnect, during all switch P 2 conducting, between the first order amplifier of described differential amplifier circuit 2 and second level amplifier, be also electrically connected to completely.
The conductive path of wherein said first order amplifier is:
Between the positive input terminal of described differential amplifier U1 and described sampling end CP, be connected in series described capacitor C AZ1, between the negative input end of described differential amplifier U1 and described sampling end CM, be connected in series described capacitor C AZ2.Between the negative output terminal Voutn1 of described sampling end CP and described differential amplifier U1, be connected in series described capacitor C F1, between the positive output end Voutp1 of described sampling end CM and described differential amplifier U1, be connected in series described capacitor C F2.
Now the conductive path of first order amplifier is exactly the amplifying circuit of existing differential amplifier, so according to the amplification principle of differential amplifier, the positive output end Voutp1 of described differential amplifier U1 is output as:
Voutp1＝(VDD×(CS1-CR1)+CF2×VCM)/CF2
The negative output terminal Voutn1 of described differential amplifier U1 is output as:
Voutn1＝(VDD×(CS2-CR2)+CF1×VCM)/CF1
If the capacitance of the F1 of capacitor C described in the present embodiment equals the capacitance of capacitor C F2, while being CF1=CF2=CF, the voltage difference Δ Vout1 that can obtain obtaining by described first order amplifier by above-mentioned formula is: Δ Vout1=(Voutp1-Voutn1)=(VDD * (CS1-CS2))/CF
If when Δ C is defined as to the electric capacity difference of capacitor C S1 and capacitor C S2, during Δ C=CS1-CS2, can obtain Δ Vout1=VDD * Δ C/CF
Now in like manner, the conductive path of described second level amplifier is:
Between the negative output terminal Voutn1 of the positive input terminal of described differential amplifier U2 and described differential amplifier U1, be connected in series described capacitor C gi1, between the negative output terminal Voutp1 of the negative input end of described differential amplifier U2 and described differential amplifier U1, be connected in series described capacitor C gi2.Between the negative output terminal Voutn2 of the positive input terminal of described differential amplifier U2 and described differential amplifier U2, be connected in series described capacitor C gf1, between the positive output end Voutp2 of the negative input end of described differential amplifier U2 and described differential amplifier U2, be connected in series described capacitor C gf2.
Equally, now the conductive path of described second level amplifier is also the amplifying circuit of existing differential amplifier, if now the capacitance of described capacitor C gi1 is identical with the capacitance of capacitor C gi2, be Cgi1=Cgi2=Cgi, the capacitance of described capacitor C gf1 is identical with the capacitance of capacitor C gf2, i.e. Cgf1=Cgf2=Cgf.So according to the amplification principle of differential amplifier and at the specifically described Computing Principle of described first order amplifier, the voltage difference Δ Vout2 that can obtain final output is:
ΔVout2＝(Voutp2-Voutn2)＝VDD×(ΔC/CF)×(Cgi/Cgf)
From above-mentioned formula, can find out that this differential output voltage Δ Vout2 is directly proportional with the electric capacity difference DELTA C of acceleration transducer.So Δ Vout2 can characterize the variation of the electric capacity difference DELTA C of acceleration transducer, and the form of the differential amplification in employing the present embodiment, and the mode of the isolation of amplifying circuit and sample circuit, can effectively reduce and disturb and noise.
Although more than described the specific embodiment of the present invention, it will be understood by those of skill in the art that these only illustrate, protection scope of the present invention is limited by appended claims.Those skilled in the art is not deviating under the prerequisite of principle of the present invention and essence, can make various changes or modifications to these embodiments, but these changes and modification all fall into protection scope of the present invention.
Claims (5)
1. a differential type convert of capacitor to voltage circuit, for an electric capacity difference is converted into a voltage difference, is characterized in that, described convert of capacitor to voltage circuit comprises a signal source of clock, a sample circuit and a differential amplifier circuit that generates a clock signal;
Described differential amplifier circuit comprises a differential amplifier, one first electric capacity, one second electric capacity, one the 3rd electric capacity and one the 4th electric capacity; Described sample circuit comprises one first reference capacitance, one second reference capacitance, one first sampling output terminal and one second sampling output terminal;
When described clock signal is high level or low level, described differential amplifier circuit forms following conductive path:
The positive input terminal of described differential amplifier and negative input end access a reference voltage by described the first electric capacity and described the 3rd electric capacity respectively; The positive input terminal of described differential amplifier and negative output terminal are electrically connected to; The negative input end of described differential amplifier and positive output end are electrically connected to;
Described sample circuit comprises following conductive path:
Power supply is by the first reference capacitance, the first sampling output terminal and the one first testing capacitance ground connection that are connected in series successively, also by the second reference capacitance, the second sampling output terminal and the one second testing capacitance ground connection that are connected in series successively; Described the first sampling output terminal and the second sampling output terminal are all electrically connected to described reference voltage;
When described clock signal is anti-phase, described differential amplifier circuit forms following conductive path:
The positive input terminal of described differential amplifier and described first is sampled and is connected in series described the first electric capacity between output terminal, between the negative input end of described differential amplifier and described the second sampling output terminal, is connected in series described the 3rd electric capacity; Between the negative output terminal of described first sampling output terminal and described differential amplifier, be connected in series described the second electric capacity, described second samples is connected in series described the 4th electric capacity between the positive output end of output terminal and described differential amplifier;
Described sample circuit comprises following conductive path:
Power supply is by one first testing capacitance, the first sampling output terminal and the first reference capacitance ground connection that are connected in series successively, also by one second testing capacitance, the second sampling output terminal and the second reference capacitance ground connection that are connected in series successively.
2. differential type convert of capacitor to voltage circuit as claimed in claim 1, is characterized in that, described differential amplifier circuit also comprises one first differential amplifier, one the 5th electric capacity, one the 6th electric capacity, one the 7th electric capacity and one the 8th electric capacity;
When described clock signal is high level or low level, described differential amplifier circuit forms following conductive path:
The positive input terminal of described the first differential amplifier and negative input end access described reference voltage by described the 5th electric capacity and described the 7th electric capacity respectively; The positive input terminal of described the first differential amplifier and negative input end are also electrically connected to described reference voltage; The positive input terminal of described the first differential amplifier and negative output terminal are electrically connected to; The negative input end of described the first differential amplifier and positive output end are electrically connected to;
When described clock signal is anti-phase, described differential amplifier circuit forms following conductive path:
Between the positive input terminal of described the first differential amplifier and the negative output terminal of described differential amplifier, be connected in series described the 5th electric capacity, between the negative input end of described the first differential amplifier and the positive output end of described differential amplifier, be connected in series described the 7th electric capacity; Between the negative output terminal of the positive input terminal of described the first differential amplifier and described the first differential amplifier, be connected in series described the 6th electric capacity, between the positive output end of the negative input end of described the first differential amplifier and described the first differential amplifier, be connected in series described the 8th electric capacity.
3. differential type convert of capacitor to voltage circuit as claimed in claim 1 or 2, is characterized in that half of the magnitude of voltage that the magnitude of voltage of described reference voltage is described power supply.
4. an acceleration transducer detection system, comprise an acceleration transducer, it is characterized in that, described acceleration transducer detection system also comprises the differential type convert of capacitor to voltage circuit as described in any one in claim 1-3, and wherein said differential type convert of capacitor to voltage circuit is converted into voltage difference by the electric capacity difference of described acceleration transducer.
5. the acceleration transducer detection system as described in claim 4, is characterized in that, described acceleration transducer is MEMS acceleration transducer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210488560.7A CN102981021B (en) | 2012-11-26 | 2012-11-26 | Differential capacitance-voltage conversion circuit and acceleration sensor detection system |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201210488560.7A CN102981021B (en) | 2012-11-26 | 2012-11-26 | Differential capacitance-voltage conversion circuit and acceleration sensor detection system |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102981021A CN102981021A (en) | 2013-03-20 |
| CN102981021B true CN102981021B (en) | 2014-08-13 |
Family
ID=47855232
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201210488560.7A Active CN102981021B (en) | 2012-11-26 | 2012-11-26 | Differential capacitance-voltage conversion circuit and acceleration sensor detection system |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102981021B (en) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109738670B (en) * | 2018-12-19 | 2020-12-11 | 哈尔滨工业大学 | MEMS capacitive accelerometer characteristic parameter measuring system and measuring method |
| CN109756097A (en) * | 2018-12-25 | 2019-05-14 | 芯海科技（深圳）股份有限公司 | A kind of sensor power supply system of adaptive charge pump and the two-way switching of source of stable pressure |
| CN109669054B (en) * | 2019-02-20 | 2021-01-05 | 哈尔滨工程大学 | High-precision fully-differential capacitor-voltage conversion circuit system |
| CN113452368B (en) * | 2021-07-15 | 2022-06-10 | 上海芯问科技有限公司 | Capacitance-voltage conversion circuit and application system |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100587492C (en) * | 2008-02-04 | 2010-02-03 | 浙江大学 | Apparatus and method for measuring microtubule gas-liquid diphasic flow rate based on capacitance and correlational method |
| US8188754B2 (en) * | 2009-07-15 | 2012-05-29 | Maxim Integrated Products, Inc. | Method and apparatus for sensing capacitance value and converting it into digital format |
| JP5797973B2 (en) * | 2011-02-08 | 2015-10-21 | ローム株式会社 | CAPACITANCE / VOLTAGE CONVERSION CIRCUIT, INPUT DEVICE USING SAME, ELECTRONIC DEVICE, AND CAPACITANCE / VOLTAGE CONVERSION METHOD |
| CN202948026U (en) * | 2012-11-26 | 2013-05-22 | 微动科技（杭州）有限公司 | Differential capacitance voltage conversion circuit and acceleration sensor detection system |
-
2012
- 2012-11-26 CN CN201210488560.7A patent/CN102981021B/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| CN102981021A (en) | 2013-03-20 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN103414442B (en) | High accuracy fully-differential amplifier based on wave chopping technology | |
| CN108124474B (en) | Device for detecting capacitance, electronic equipment and device for detecting pressure | |
| CN102981021B (en) | Differential capacitance-voltage conversion circuit and acceleration sensor detection system | |
| US20150185257A1 (en) | Circuit and method for sensing a differential capacitance | |
| CN202948026U (en) | Differential capacitance voltage conversion circuit and acceleration sensor detection system | |
| US20240272214A1 (en) | Circuits and methods for precise capacitance measurement | |
| CN107124179B (en) | Phase-locked amplifier for detecting weak photocurrent signal | |
| CN109541283B (en) | Non-contact voltage measurement system and method | |
| CN103257324A (en) | Magnetic sensor device | |
| CN105897248B (en) | Weak signal reading circuit | |
| JP2013076610A (en) | Acceleration sensor circuit | |
| CN113922776B (en) | C/V conversion circuit based on switched capacitor type common mode feedback charge amplifier | |
| CN104237624B (en) | EV (electric vehicle) direct-current high-voltage sensor and sampling method thereof | |
| CN103472493B (en) | A kind of Weak Signal Detecting Circuit for gradiometry | |
| CN103684408A (en) | Capacitance-type sensor interface circuit | |
| CN203759090U (en) | Current sampling circuit of rail-transit traction data acquisition system | |
| CN110426614A (en) | A kind of ultrasonic partial discharge sensor of high-precision signal frequency down circuit design | |
| CN101832788A (en) | Capacitor continuous time reading circuit adopting chopped wave stabilizing technology | |
| CN103091561A (en) | Device obtaining direct current signals from alternative current and direct current superposition signals and method thereof | |
| CN201583599U (en) | Capacitive equipment online monitoring standard signal generator | |
| CN105004259B (en) | A kind of capacitive MEMS sensor detection circuit | |
| CN209627339U (en) | A kind of noise suppression circuit and the test circuit including the noise suppression circuit | |
| CN112505436A (en) | Non-contact electrostatic field testing device and testing method | |
| CN203122375U (en) | Non-invasive blood pressure anti-interference circuit | |
| CN104038161A (en) | Module for amplifying signals in gas concentration detection system of transformer substation |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20200820 Address after: Room 1006, 10 / F, building 67, 421 Hongcao Road, Xuhui District, Shanghai, 200233 Patentee after: BROADCHIP TECHNOLOGY GROUP Corp.,Ltd. Address before: 310053 A room, 12 floor, No. 3730 South Ring Road, Hangzhou, Zhejiang, Binjiang District, China Patentee before: MICROMOTION TECHNOLOGY (HANGZHOU) Co.,Ltd. |