CN102751402B - The manufacture method of semiconductor light-emitting elements and light-emitting component - Google Patents
The manufacture method of semiconductor light-emitting elements and light-emitting component Download PDFInfo
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- CN102751402B CN102751402B CN201210237486.1A CN201210237486A CN102751402B CN 102751402 B CN102751402 B CN 102751402B CN 201210237486 A CN201210237486 A CN 201210237486A CN 102751402 B CN102751402 B CN 102751402B
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Abstract
The invention discloses the manufacture method of a kind of semiconductor light-emitting elements and light-emitting component, semiconductor light-emitting elements comprises: patterned substrate, comprises multiple pattern, and each The pattern comprises multiple beveled region and the bottom zone adjacent with the plurality of beveled region; Semiconductor buffer layer, is formed in this patterned substrate; Luminous lamination, be formed on this semiconductor buffer layer, this luminous lamination comprises the first conductive type semiconductor layer, active layer and second conductive type semiconductor layer; With the first electrode and the second electrode, be electrically connected with this first conductive type semiconductor layer and this second conductive type semiconductor layer respectively.
Description
The application is a divisional application, the application number of corresponding female case is 200610151738.3, the applying date is on September 8th, 2006, and denomination of invention is " a kind of light-emitting component and manufacture method thereof with patterned substrate ", and application people is Jingyuan Photoelectricity Co., Ltd.
Technical field
The present invention relates to a kind of light-emitting component, particularly relate to light-emitting component and the manufacture method thereof of the patterned substrate of a kind of tool.
Background technology
Light-emitting diode (LightEmittingDiode; LED) owing to having the characteristic of power saving and long service life, be regarded as a kind of typical products of Energy Saving Industry, thus the following potentiality replacing traditional lighting market also enjoy expectation.But can LED be widely used in various illumination, depend on the raising of luminous efficiency and the decline of cost, and improve light extraction efficiency and be the key factor affecting luminous efficiency.
Surface coarsening has been regarded as one of effective ways improving light emitting diode light extraction efficiency, the such as surface coarsening of substrate or the superiors' semiconductive layer.Announcement that to please refer to Fig. 1 has by No. 6091085th, United States Patent (USP) the light-emitting component of surface coarsening substrate, wherein LED10 comprises the light that sapphire substrate 11 sends with scattering luminescent layer 14 with multiple protruding 111 and the multiple depression 112 that are formed thereon surface, and then increases light extraction efficiency.Multiple protruding 111 form rough surface with the surface that multiple depression 112 available mechanical lapping mode or ion(ic) etching mode contact with semiconductor layer 13 at substrate 11 randomly.Though this practice improves light extraction efficiency by substrate surface alligatoring, substrate surface simultaneously also because causing composition change and the lattice distortion of substrate surface in coarsening process such as grade after such as Ions Bombardment, and wrecks.In addition, part mask material or reactive ion are absorbed in substrate surface during the course to a certain degree of depth by splashing, affect the quality of follow-up formation epitaxial loayer.The destruction of lattice structure can be caused as mechanical lapping equally to substrate surface, and then affect the growth quality of subsequent semiconductor layer such as GaN, reduce internal quantum.
The people such as Wang are at JournalofTheElectrochemicalSociety, and the paper that 153 (3) C182-C185 deliver is inquired into a kind of with the horizontal (EpitaxialLateralOvergrowth that grows up again of maskless (maskless) mode; ELOG) method growth GaN layer, its object is improveing traditional E LOG technique because need silicon dioxide to increase process complexity as hard mask, how its research mainly do not mated (latticemismatch) and caused in the grow up GaN layer, particularly sapphire substrate with lower lattice defect of sapphire substrate and penetrate dislocation defects (ThreadingDislocationDefect inquiring into the lattice of GaN layer; TDD).Its method disclosed etches sapphire substrate surface to form the V-type of multiple strip or U-shaped groove in wet etching mode, and inquire into the exposed crystal face of the sapphire substrate that causes under different etching condition, follow-up GaN is laterally grown up (EpitaxialLateralOvergrowth again; ELOG) the impact penetrating dislocation defect density, to obtain the less GaN layer penetrating dislocation defects, improves the quality of epitaxial loayer.
Summary of the invention
The present invention proposes the light-emitting component with patterned substrate, and this patterned substrate has the light that multiple depression is sent by luminescent layer with scattering.This sunk surface has less lattice damage, and comprises the beveled region of multiple symmetry.Follow-up growth semiconductor laminated directly can to grow up in the substrate that this is patterned and to insert this depression to reach good light extraction efficiency.
Another object of the present invention is to provide a kind of light-emitting component with patterned substrate, this patterned substrate has multiple depression, and the patterns of openings of this depression is round and smooth closed curve, such as circular or oval, makes depression have level and smooth surface.
Another object of the present invention is to provide a kind of manufacture method with the light-emitting component of patterned substrate, the method is included in hard mask layer substrate being formed pattern, and the substrate comprising the hard mask layer of pattern is formed multiple depression in wet etching mode at substrate surface.Wet etching solution is based on phosphoric acid, and etching period controls in the given time, makes depression have level and smooth surface, is beneficial to follow-up semiconductor layer and inserts the plurality of depression, reach good light extraction efficiency.
According to the present invention, provide a kind of semiconductor light-emitting elements, comprising:
Patterned substrate, comprises multiple ostiolate depression;
Semiconductor buffer layer, to be formed in this patterned substrate and to insert the plurality of depression;
Luminous lamination, be formed on this semiconductor buffer layer, this luminous lamination comprises the first conductive type semiconductor layer, active layer and second conductive type semiconductor layer; With
First electrode and the second electrode, be electrically connected with this first conductive type semiconductor layer and this second conductive type semiconductor layer respectively;
Wherein the patterns of openings of this depression is round and smooth closed curve.
Preferably, this depression comprises the beveled region of multiple symmetry.
Preferably, this depression also comprises bottom zone, and the beveled region of this bottom zone and the plurality of symmetry is adjacent.
Preferably, this bottom zone is plane, curved surface or is roughly a little.
Preferably, the ratio of the bottom zone area of this depression and the aperture area of this depression is about between 0.15 to 0.75.
Preferably, this baseplate material comprises sapphire.
Preferably, the beveled region of the plurality of symmetry comprises at least three symmetrical sapphire R faces.
Preferably, this bottom zone at least comprises sapphire C face.
Preferably, the opening of this depression defined by circular or elliptic curve.
Preferably, the diameter of this depression is about 0.5 to 10 μm.
Preferably, the degree of depth of this depression is about 0.025 to 8 μm.
Preferably, the degree of depth of this depression and diameter ratio value are about 0.05 to 0.8.
Preferably, this semiconductor laminatedly comprises group III-nitride.
According to the present invention, provide a kind of manufacture method of light-emitting component, it comprises following each step:
Form the mask layer of pattern on substrate, with a part for this substrate exposed;
This exposed part is removed to desired depth, to form multiple ostiolate depression in wet etching mode;
Remove this mask layer; And
Forming semiconductor layer makes this semiconductor layer insert the plurality of depression on the substrate;
Wherein the patterns of openings of this depression is round and smooth closed curve.
Preferably, the mask layer forming this pattern is further comprising the steps of on the substrate:
Form the photoresist oxidant layer of pattern on mask layer, with a part for this mask layer exposed;
This exposed part is removed, with a part for this substrate exposed with wet etching or dry ecthing mode; And
Remove the photoresist oxidant layer of this pattern.
Preferably, described wet etching mode etches this substrate with the mixed solution of sulfuric acid and phosphoric acid.
Preferably, in this mixed solution, the percentage by weight of phosphoric acid is greater than the percentage by weight of sulfuric acid.
Preferably, the operating temperature of described wet etching mode is about 250 to 350 degree Celsius.
Preferably, this depression comprises bottom zone and is adjacent to the beveled region of multiple symmetries of this bottom zone.
Preferably, this bottom zone is plane, curved surface or is roughly a bit.
Preferably, the ratio of the bottom zone area of this depression and the aperture area of this depression is between 0.15 to 0.75.
Preferably, the material of this patterned substrate comprises sapphire.
Preferably, the beveled region of the plurality of symmetry comprises at least three symmetrical sapphire R faces.
Preferably, this bottom zone comprises sapphire C face.
Preferably, the opening of this depression defined by circular or elliptic curve.
Preferably, the diameter of this depression is about 0.5 to 10 μm.
Preferably, the degree of depth of this depression is about 0.025 to 8 μm.
Preferably, the degree of depth of this depression and diameter ratio value are about 0.05 to 0.8.
Preferably, this semiconductor laminatedly comprises group III-nitride.
For this reason, one aspect of the present invention provides a kind of semiconductor light-emitting elements, comprising:
Patterned substrate, comprises multiple ostiolate depression;
Semiconductor buffer layer, to be formed in this patterned substrate and to insert the plurality of depression;
Luminous lamination, is formed on this semiconductor buffer layer, and this luminous lamination comprises the first conductive type semiconductor layer, active layer (or claiming active layer) and second conductive type semiconductor layer; With
First electrode and the second electrode, be electrically connected with this first conductive type semiconductor layer and this second conductive type semiconductor layer respectively;
Wherein the patterns of openings of this depression is round and smooth closed curve.
The present invention provides a kind of manufacture method of light-emitting component on the other hand, and it comprises following each step:
Form the mask layer of pattern on substrate, with a part for this substrate exposed;
This exposed part is removed to desired depth, to form multiple ostiolate depression in wet etching mode;
Remove this mask layer; And
Forming semiconductor layer makes this semiconductor layer insert the plurality of depression on the substrate;
Wherein the patterns of openings of this depression is round and smooth closed curve.
Accompanying drawing explanation
Fig. 1 is schematic diagram, shows according to the light-emitting component shown in prior art;
Fig. 2 A to 2E is schematic diagram, shows each step schematic diagram according to manufacture method of the present invention;
Fig. 3 is schematic diagram, shows the top view of patterned basal section and the correspondence thereof formed according to the present invention;
Fig. 4 discloses the optical output power of patterned substrate to light-emitting component formed in different etching period according to the present invention and improves curve;
Fig. 5 discloses according to the drive current measured by light-emitting component of the present invention the curve of external quantum efficiency;
Fig. 6 discloses according to the drive current measured by light-emitting component of the present invention the curve of optical output power.
Simple symbol explanation
10,20: light-emitting component;
11,21,21a: substrate;
111: protruding;
112,311,312,313: depression;
13,241: the first conductivity type semiconductor layer;
14,242: active layer;
15,243: the second conductivity type semiconductor layer;
16,26: the second electrodes;
17,27: the first electrodes;
22,32: hard mask layer;
23: semiconductor buffer layer;
25: transparency conducting layer;
28: reflection layer;
311a, 312a, 313a: recessed openings;
311b, 312b: concave bottom district;
311c, 312c, 313c: depression beveled region;
O: depression low spot;
XX ': the tangent plane of depression 311;
YY ': the tangent plane of depression 312;
ZZ ': the tangent plane of depression 313.
Embodiment
Please refer to the embodiment that Fig. 2 A to 2E progressively illustrates manufacture method provided by the present invention.As shown in Figure 2 A, first provide substrate 21, this substrate 21 comprise a kind of material be selected from sapphire, GaN, SiC, Si, GaAs and other any can in order to the baseplate material of Group III-V semiconductor of growing up thereon.Form the hard mask layer 22 of pattern on the substrate, its material is such as silicon dioxide, the formation method of the hard mask layer 22 of this pattern is such as with conventional lithography and etching mode, first on this hard mask layer, form photoresist oxidant layer, and after photoresist oxidant layer is exposed, developing, etch hard mask layer, to the substrate of substrate surface or over etching partial depth, removes this photoresist oxidant layer then.
Please continue to refer to Fig. 2 B, be that hard mask layer pattern is passed to this substrate 21 to form patterned substrate 21a in wet etching mode by hard mask with the hard mask layer 22 of this pattern.This wet etching mode comprises in the etching solution be placed on by the substrate 21 of the hard mask layer 22 comprising pattern based on phosphoric acid to carry out wet etching to this substrate.For making wet etching carry out at relatively high temperatures, can adding portion sulfuric acid to improve the boiling point of solution, but phosphoric acid and sulfuric acid composition are greater than sulfuric acid with the percentage by weight of phosphoric acid and are advisable, such as, be 2:1, to maintain phosphoric acid solution for main etch liquid.Operating temperature range is suitable for the scope of 250 to 350 degree Celsius, because the rate of etch of low-temperature operation is lower, etching period is relatively long; High-temperature operation is not such as then suitable for a large amount of production higher than 350 degree, because high temperature easily causes acid solution to volatilize, and then changes solution concentration, causes rate of etch unstable, is unfavorable for production stability; And high-temperature technology also has the upper potential public security harm of production, and shortening solution is eliminated the time of changing (cycletime), increases the shortcomings such as production cost.According to embodiments of the invention, under phosphoric acid and sulfuric acid percentage by weight are 2:1 and operating temperature is about the condition of 320 degree Celsius, rate of etch is about 0.6 ~ 1 [mu (still depending on patterns of openings size).For the depression making follow-up semiconductor buffer layer more easily fill up patterned substrate, etching period can suitably control within the scheduled time, to control the kenel that caves in, such as, makes depression have level and smooth lower surface.
After wet etching completes, remaining hard mask layer 22 is removed, form the patterned substrate 21a comprising multiple depression, as shown in Figure 2 C.The diameter range of each depression is about 0.5 to 10 μm, and depth bounds is about 0.025 to 8 μm, and the ratio range of the degree of depth and diameter is then about 0.05 to 0.8.
Then growing semiconductor resilient coating 23 is on patterned substrate 21a, and as shown in Figure 2 D, this semiconductor buffer layer 23 can be and comprises at least one material and be selected from the material group that AlN, GaN, InGaN, AlGaN and other III-nitride form.In an embodiment of the present invention, this semiconductor buffer layer 23 roughly fills up this depression, produce, and then minimizing light produces total reflection in hole, makes light easily enter substrate, reaches good substrate dispersion effect to reduce hole in depression.
Please continue to refer to Fig. 2 E, this semiconductor buffer layer 23 forms luminous lamination 24 and transparency conducting layer 25 successively, wherein this luminous lamination 24 can be the nitride structure based on GaN, comprises and forms the first conductivity type semiconductor layer 241, active layer 242 and the second conductivity type semiconductor layer 243 successively.This first conductivity type semiconductor layer 241 can be n-type or p-type semiconductor layer; this second conductivity type semiconductor layer 243 is for having the semiconductor layer with the first conductivity type semiconductor layer 241 opposite-sign, and the structure of this active layer 242 can be the structure known as double heterojunction (DoubleHeterojunction; Or multi layer quantum well (Multi-QuantumWell DH); MQW) to increase internal light emission efficiency.This transparency conducting layer can be metal or metal oxide, such as Ni, Au, tin indium oxide, cadmium tin, antimony tin, indium zinc oxide, zinc oxide aluminum or zinc-tin oxide.
Then carry out pattern with traditional photoetching etching mode, with a part for this first conductivity type semiconductor layer 241 exposed, form the first electrode 27 afterwards on this first conductivity type semiconductor layer 241, and form the second electrode 26 on this transparency conducting layer 25.The lower surface that the method is also included in this patterned substrate 21a forms reflection layer 28, and reflection layer 28 comprises at least one material and is selected from Sn, Al, Au, Pt, Ag, Ti, Cu, PbSn, AuZn, SiO
2, Al
2o
3, SiN
xand TiO
2the material group formed.
Fig. 3 shows the schematic diagram of the corresponding depression section kenel formed at substrate of DIFFERENT WET etching period.In an embodiment of the present invention, substrate surface is made up of sapphire C face, and sunk surface pattern is circular, and etching condition such as phosphoric acid and sulfuric acid percentage by weight are 2:1, and operating temperature is about 320 degree Celsius.Depression 311,312 and 313 as shown in Figure 3 respectively corresponding etching period is 60,90 and 120 seconds.Depression 311 is by recessed openings 311a, three the symmetrical beveled region 311c being about leg-of-mutton concave bottom district 311b and surrounding this concave bottom district 311b formed, wherein the area of this concave bottom district 311b and the area ratio of recessed openings 311a are about 0.35, and this concave bottom district 311b comprises such as sapphire C face (namely have { 0001} lattice plane), three symmetrical beveled region 311c comprise such as sapphire R face (namely have { 1-102} lattice plane), wherein the section of this beveled region is being smooth curve near depression upper end and bottom, and near bottom zone, there is round and smooth corner.Depression 312 is similar to depression 311, by recessed openings 312a, the beveled region 312c being about leg-of-mutton concave bottom district 312b and surrounding three of this concave bottom district 312b symmetrical formed, wherein the area of this concave bottom district 312b and the area ratio of recessed openings 312a are about 0.18, and this concave bottom district 312b comprises such as sapphire C face (namely have { 0001} lattice plane), three symmetrical beveled region 312c comprise such as sapphire R face (namely have { 1-102} lattice plane), wherein the section of this beveled region is being smooth curve near depression upper end and bottom, and near bottom zone, there is round and smooth corner.Cave in 313 and be different from depression 311 or 312, be only made up of recessed openings 313a and three symmetrical beveled region 313b, and these three symmetrical beveled region 313b meet at depression low spot O, wherein the section of this beveled region is being smooth curve near depression upper end.As seen from Figure 3 along with etching period increases, concave bottom district reduces gradually, beveled region then increases thereupon, the lattice plane that its reason has this Two Areas for etching solution, the sapphire C face that such as concave bottom district has is different with the rate of etch in the sapphire R face that beveled region has caused; Namely the rate of etch in sapphire C face is greater than the rate of etch in sapphire R face.
The sapphire substrate through pattern that Fig. 4 is formed for different etching period improves curve relative to smooth sapphire substrate (etching) usefulness to the optical output power of light-emitting component.From curve, the patterned substrate formed under the condition of etching period for 30,60,90 and 120 seconds, relative to smooth sapphire substrate, the optical output power of light-emitting component is about had to the improvement of 24%, 16%, 15% and 5%, the depression wherein formed under condition at 120 seconds is comparatively unfavorable for that Subsequent semiconductor resilient coating inserts depression, so more not remarkable to the improvement amplitude of optical output power, but those skilled in the art is still by finely tuning the parameter of epitaxial deposition, make semiconductor buffer layer approximately insert this depression, reach significant effect.Therefore, if suitably control etching period in the given time, this depression can be made to have concave bottom district, such as etching period controls the depression formed between 15 seconds to 100 seconds, concave bottom district can be obtained, concave bottom district area and recessed openings area ratio value are about between 0.15 to 0.75, and optical output power can obtain the raising of more than 10%.
Fig. 5 and Fig. 6 shows patterned substrate relative to flat substrate, under different driving electric current, to external quantum efficiency and the optical output power curve chart of light-emitting component.The light-emitting component with patterned substrate as seen from the figure according to gained of the present invention compares with traditional light-emitting component with planar substrates, no matter the present invention, under the drive current range of 0 to 200 milliampere, all has stable raising effect in external quantum efficiency or power output.
Each embodiment cited by the present invention is only the present invention is described, and is not used to limit the scope of the invention.Anyone any modification made for the present invention or change neither depart from claim of the present invention.
Claims (13)
1. a semiconductor light-emitting elements, ︰ drawn together by bag
Patterned substrate, comprises multiple depression;
Semiconductor buffer layer, to be formed in this patterned substrate and to insert the plurality of depression;
Luminous lamination, be formed on this semiconductor buffer layer, this luminous lamination comprises the first conductive type semiconductor layer, active layer and second conductive type semiconductor layer; With
First electrode and the second electrode, be electrically connected with this first conductive type semiconductor layer and this second conductive type semiconductor layer respectively;
Wherein each the plurality of depression comprises multiple beveled region and the bottom zone adjacent with the plurality of beveled region, the opening of this depression is round and smooth closed curve, this concave bottom district is approximately triangle, and the section of each the plurality of beveled region is being smooth curve near the upper end of this depression and bottom.
2. optical element as claimed in claim 1, the material of wherein this patterned substrate comprises sapphire, and the plurality of beveled region comprises at least sapphire R face.
3. light-emitting component as claimed in claim 1, wherein this round and smooth closed curve is circular or oval.
4. light-emitting component as claimed in claim 1, wherein each the plurality of beveled region has round and smooth corner near this bottom zone.
5. a manufacture method for light-emitting component, it comprises following each step:
Substrate is provided;
Form patterned mask layer on substrate, with a part for this substrate exposed;
Remove this substrate of this exposed part to desired depth in wet etching mode, be depressed in this substrate to be formed; And
Form semiconductor layer on this substrate and this depression, and insert this depression;
Wherein this depression comprises multiple beveled region and the bottom zone adjacent with the plurality of beveled region, the opening of this depression is round and smooth closed curve, this concave bottom district is approximately triangle, and the rate of etch of etching solution to the lattice plane of the plurality of beveled region that this wet etching mode uses is different from the rate of etch of the lattice plane to this bottom zone.
6. manufacture method as claimed in claim 5, wherein forms this patterned mask layer further comprising the steps of on the substrate:
Form patterned photoresist oxidant layer on mask layer, with a part for this mask layer exposed;
This exposed part is removed, with a part for this substrate exposed with wet etching or dry ecthing mode; And
Remove the photoresist oxidant layer that this is patterned.
7. manufacture method as claimed in claim 5, wherein said wet etching mode etches this substrate with the mixed solution of sulfuric acid and phosphoric acid.
8. manufacture method as claimed in claim 7, wherein in this mixed solution, the percentage by weight of phosphoric acid is greater than the percentage by weight of sulfuric acid.
9. manufacture method as claimed in claim 5, the operating temperature of wherein said wet etching mode is 250 to 350 degree Celsius.
10. manufacture method as claimed in claim 5, wherein along with etching period increases, this bottom zone is reduced gradually, and the plurality of beveled region then increases thereupon.
11. manufacture methods as claimed in claim 5, wherein the section of each the plurality of beveled region is being smooth curve near the upper end of this depression and bottom.
12. manufacture methods as claimed in claim 5, wherein the material of this substrate comprises sapphire, and the plurality of beveled region comprises sapphire R face, and this bottom zone comprises sapphire C face, and the rate of etch in this sapphire C face is greater than the rate of etch in this sapphire R face.
13. manufacture methods as claimed in claim 5, wherein this round and smooth closed curve is circular or oval.
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| CN201210237486.1A CN102751402B (en) | 2006-09-08 | 2006-09-08 | The manufacture method of semiconductor light-emitting elements and light-emitting component |
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| Application Number | Priority Date | Filing Date | Title |
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| CN200610151738A CN101140968B (en) | 2006-09-08 | 2006-09-08 | Light element device and method for manufacturing same having patterned substrate |
| CN201210237486.1A CN102751402B (en) | 2006-09-08 | 2006-09-08 | The manufacture method of semiconductor light-emitting elements and light-emitting component |
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| CN101800274B (en) * | 2009-02-11 | 2011-11-09 | 晶发光电股份有限公司 | Method for manufacturing semiconductor element with concave-convex base plate |
| CN102347409B (en) * | 2010-07-28 | 2013-12-11 | 佛山市奇明光电有限公司 | Light-emitting diode assembly |
| KR20120029767A (en) * | 2010-09-17 | 2012-03-27 | 엘지디스플레이 주식회사 | Method for manufacturing semiconductor light emitting device |
| CN102544264B (en) * | 2012-01-19 | 2014-04-23 | 苏州锦元纳米科技有限公司 | Method for preparing nano pattern on sapphire substrate |
| WO2017076119A1 (en) | 2015-11-03 | 2017-05-11 | 厦门市三安光电科技有限公司 | Patterned sapphire substrate, light emitting diode, and manufacturing methods therefor |
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