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CN102315246B - Relaxation SiGe virtual substrate and preparation method thereof - Google Patents

Relaxation SiGe virtual substrate and preparation method thereof Download PDF

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Publication number
CN102315246B
CN102315246B CN 201010214666 CN201010214666A CN102315246B CN 102315246 B CN102315246 B CN 102315246B CN 201010214666 CN201010214666 CN 201010214666 CN 201010214666 A CN201010214666 A CN 201010214666A CN 102315246 B CN102315246 B CN 102315246B
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sige
component
resilient coating
layer
substrate
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CN102315246A (en
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刘学超
陈之战
施尔畏
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Shanghai Institute of Ceramics of CAS
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Shanghai Institute of Ceramics of CAS
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Abstract

The invention belongs to the technical field of semiconductor materials, and relates to a relaxation SiGe virtual substrate with high Ge content and a preparation method thereof. The SiGe virtual substrate comprises a Si substrate, a Ge crystal seed layer, a Ge buffer layer, a SiGe buffer layer with variable components and a SiGe layer with constant components, wherein the Ge crystal seed layer, the Ge buffer layer, the SiGe buffer layer and the SiGe layer epitaxially grow on the Si substrate from inside to outside in sequence; and the Ge crystal seed layer and the Ge buffer layer form a Ge relaxation buffer layer. The SiGe virtual substrate has the characteristics of high Ge contents, complete relaxation, low dislocation density, thin thickness, smooth surface and the like. The preparation method of the SiGe virtual substrate is characterized in that the epitaxial layers grow on the Si substrate by adopting a decompression chemical vapor deposition method. The relaxation SiGe virtual substrate with high Ge content provided by the invention can be widely applied to Ge channel strain engineering and the preparation of high-mobility channel materials in a CMOS (complementary metal oxide semiconductor) technology, and the performances of a CMOS device are improved further.

Description

A kind of relaxation SiGe virtual substrate and preparation method thereof
Technical field
The invention belongs to technical field of semiconductor, relate to SiGe virtual substrate of the high Ge content of a kind of high-quality relaxation and preparation method thereof.
Background technology
In semiconductor industry, the Si material has developed nearly half a century as the semiconductor device that occupies dominant position.Along with the development of science and technology and the people pursuit to the microelectronic component performance, so that the characteristic size of semiconductor device is constantly dwindled, the single transistor size has reached the dual limit of physics and technology gradually, can't satisfy the requirement of the continuous lifting of performance of semiconductor device as the performance of the cmos device of channel material with traditional Si.People are stepping up to seek novel method and material, to keep the paces of microelectronic component rapid growth.Existing known, the Si or the Ge that introduce strain in cmos device can significantly improve performance of devices, because be in Si under the strain regime and the carrier mobility of Ge can significantly improve.Strain Si and strain Ge are considered to the most promising channel material.Owing to there is larger character mismatch (4.2%) between Ge and the Si, can not directly the Ge epitaxial growth be introduced strain as channel material with the Si epitaxial growth at the Ge wafer on the Si wafer or directly, character mismatch between them is so that relaxation will occur when very thin in epitaxial loayer, produce defective and dislocation, seriously reduce the mobility of charge carrier.Therefore, just need the new technology of exploitation, obtain high-quality at the Si substrate, be suitable for the resilient coating that channel material is used.The exploitation of virtual substrate is considered to a kind of very promising research project.Virtual substrate generally is to obtain high-quality, less with the required channel material nature difference rete of one deck by the whole bag of tricks at the Si substrate, as the substrate of new material, prepares high-quality channel material layer thereon.If introduce the Si of strain as channel material, just need the SiGe virtual substrate of the low Ge content of high-quality; If introduce the Ge of strain as channel material, just need the SiGe virtual substrate of the high Ge content of high-quality.Traditional method for preparing virtual substrate mainly is that the SiGe layer by the extension component-gradient obtains virtual substrate, this SiGe virtual substrate at low Ge content is feasible, if but prepare the virtual substrate of high Ge content, just need very thick SiGe component-gradient layer.Such as the Si by the preparation of SiGe component-gradient layer 1-xGe x(0.7≤x≤0.9) virtual substrate thickness is many more than 5 μ m, that have even 10 μ m, cause long processing time, cost is higher, and thicker SiGe component-gradient layer makes virtual substrate surface have serious crosshatch (cross hatch), so that surface roughness is larger, need chemico-mechanical polishing (CMP) just can obtain more smooth surface, increased the complexity of technique.Therefore, the thin SiGe virtual substrate that obtains high-quality high Ge content is still a study hotspot with practical application of Si base semiconductor material preparation field.
Summary of the invention
The purpose of this invention is to provide SiGe virtual substrate of the high Ge content of a kind of relaxation and preparation method thereof, the shortcomings such as, rough surface large with the thickness that overcomes high Ge content SiGe virtual substrate prepared in the prior art, complex process.A kind of mode with Ge content in the reverse gradual change SiGe component provided by the invention has prepared high-quality SiGe virtual substrate, and this virtual substrate has high Ge content, complete characteristics such as low, the thin thickness of relaxation, dislocation density, surfacing.
In order to solve the problems of the technologies described above, technical scheme of the present invention is as follows:
A kind of relaxation SiGe virtual substrate, described SiGe virtual substrate comprises the Si substrate, on the Si substrate the constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge seed layer, Ge resilient coating, component-gradient and component successively from inside to outside, described Ge seed layer and described Ge resilient coating form the Ge relaxed buffer layers.
Each epitaxially grown layer is the resilient coating of complete deformation relaxation on the described Si substrate.
Dislocation in the SiGe virtual substrate of the high Ge content of described relaxation and defective mainly concentrate in the SiGe resilient coating of component-gradient, have lower dislocation and defect concentration (<10 in the constant SiGe layer of component 6Cm -2).
The molar content of germanium is Ge% 〉=70% in the described relaxation SiGe virtual substrate, is the SiGe virtual substrate of high Ge content.
The mean roughness of described relaxation SiGe virtual substrate is 1.3-1.9nm, be lower than the prior art processes level requirement (<2.0nm).By the dislocation density after the SiGe virtual substrate of the high Ge content of the described relaxation of etching 10 6Cm -2Magnitude, satisfy process for fabricating semiconductor device to the requirement of substrate.
The Si substrate adopts the Si wafer in the described SiGe virtual substrate; Described Si wafer is standard-sized industrialization wafer, and the size of this Si wafer is selected from 4 inches, 6 inches, 8 inches, 12 inches equidimension specifications.
Ge seed layer and Ge resilient coating form the Ge relaxed buffer layer of complete relaxation in the described SiGe virtual substrate; The thickness of described Ge seed layer is 50-100nm, and the thickness of described Ge resilient coating is 300-600nm, and the thickness of described whole Ge relaxed buffer layer is 350-700nm.
Component is Si and Ge in the constant SiGe layer of the SiGe resilient coating of described component-gradient and component, its separately content be molar content.
In the SiGe resilient coating of described component-gradient, take the side of next-door neighbour's Ge relaxed buffer layers as starting point, take the side of the constant SiGe layer of next-door neighbour's component as terminal point, the molar content of Ge is gradually reduced to identical with Ge molar content the constant SiGe layer of component from 100%.In the SiGe of described component-gradient resilient coating, the Ge content of the every 200-250nm varied in thickness 5% of the molar content of described Ge.
As, the molar content of the Ge of the SiGe resilient coating of described component-gradient is along with the increase of the SiGe buffer layer thickness of component-gradient, be gradient to 95% since 100%, be gradient to 90% from 95%, by that analogy, every 200-250nm thickness reduces by 5% Ge content, until be gradient to identical with the molar content of Ge in the constant SiGe layer of the component that is close to.
The thickness of the SiGe layer that described component is constant is 500-1000nm, can regulate according to the thickness requirement of required virtual substrate.
But epitaxial growing strain Ge channel layer is to be used for the channel material of cmos device on the described SiGe component layer of constant.
The preparation method of the SiGe virtual substrate of the high Ge content of a kind of relaxation adopts the rpcvd method on the Si substrate, with GeH according to the composition of the SiGe virtual substrate of the high Ge content of described relaxation 4And SiH 2Cl 2For the gas phase predecessor, with H 2Be carrier gas each epitaxial loayer of growing successively.
The epitaxial growth of Ge seed layer and Ge resilient coating is all with GeH among the preparation method of the SiGe virtual substrate of the high Ge content of described relaxation 4Be the gas phase predecessor, the epitaxial growth of the SiGe layer that the SiGe resilient coating of described component-gradient and component are constant is all with GeH 4And SiH 2Cl 2Be the gas phase predecessor.
This preparation method specifically comprises the steps:
1) epitaxial growth Ge seed layer on the Si substrate, the growth temperature of described Ge seed layer is 350-400 ℃, and growth room's pressure is 50-150Torr, and the thickness of growth is 50-100nm.
The growth of described Ge seed layer is with GeH 4Be the gas phase predecessor, flow velocity is 100-200sccm, with H 2Be carrier gas.
2) epitaxial growth Ge resilient coating on the good Ge seed layer of growth, the growth temperature of described Ge resilient coating is 650-700 ℃, and growth room's pressure is 50-150Torr, and the thickness of growth is 300-600nm.
The growth of described Ge resilient coating is with GeH 4Be the gas phase predecessor, flow velocity is 100-200sccm, with H 2Be carrier gas.
3) in growth room's in-situ annealing, annealing temperature was 800-900 ℃ after Ge buffer growth described step 2) was finished, and obtained the Ge relaxed buffer layers of complete relaxation.
The thickness of described Ge relaxed buffer layers is 350-700nm, can regulate according to the thickness requirement of required virtual substrate;
Described annealing time is as being 10 minutes.
4) the SiGe resilient coating of epitaxial growth component-gradient on the good Ge relaxed buffer layers of growth, described epitaxial growth temperature is 800-900 ℃, growth room's pressure is 20-100Torr.
The growth of the SiGe resilient coating of described component-gradient is with H 2Be carrier gas, with GeH 4And SiH 2Cl 2Be the gas phase predecessor, by the described gas phase predecessor of dynamic adjustments in epitaxial process GeH 4And SiH 2Cl 2Flow velocity recently prepare.
5) the constant SiGe layer of epitaxial growth component on the SiGe resilient coating of the good component-gradient of growth, described epitaxial growth temperature is 800-900 ℃, and growth room's pressure is 20-100Torr, and the thickness of growth is 500-1000nm.
The constant SiGe layer of described component is with H 2Be carrier gas, with GeH 4And SiH 2Cl 2Be gas phase predecessor, GeH 4Flow be 300-500sccm, SiH 2Cl 2Flow be 14-80sccm;
Wherein said SiH 2Cl 2Flow be preferably 14-62sccm.
Among the preparation method of the SiGe virtual substrate of the high Ge content of relaxation of the present invention, wherein said whole Ge relaxed buffer layers is the necessary condition for the SiGe resilient coating of epitaxial growth component-gradient, and therefore obtaining the Ge relaxed buffer layers also is one of key factor that affects the virtual substrate quality.The epitaxial growth temperature of Ge seed layer can not be excessively low in the whole Ge relaxed buffer layers, otherwise polycrystalline growth can occur, and the thickness of whole Ge relaxed buffer layers can be regulated within the specific limits according to the thickness requirement of virtual substrate;
The SiGe resilient coating of wherein said component-gradient is the most critical part of high-quality SiGe virtual substrate of the present invention, increase along with the SiGe buffer layer thickness of component-gradient, every 200-250nm thickness is realized the variation of 5%Ge content in the SiGe resilient coating of component-gradient, too fast or excessively slow Ge component-gradient rate is very large on virtual substrate quality and gross thickness impact, and this resilient coating is the zone of restriction virtual substrate Dislocations and defective;
The constant SiGe resilient coating of wherein said component is the resilient coating of complete relaxation, and general at high temperature epitaxial growth can obtain the SiGe layer of complete relaxation, and epitaxial growth temperature is 800-900 ℃, and low-temperature epitaxy then needs annealing process, and growth rate is slow.
The SiGe virtual substrate of the high Ge content of relaxation of the present invention, the Ge relaxed buffer layers that forms by introducing Ge seed layer and Ge resilient coating, adopt the content of Ge in the SiGe resilient coating of reverse gradual change component-gradient to limit dislocation and defective, be particularly suitable for preparing the thin SiGe virtual substrate of high Ge content.Adopt preparation method of the present invention not only can obtain the SiGe virtual substrate of the high Ge content of thinner thickness, effectively reduced simultaneously surface roughness and the dislocation density of this SiGe virtual substrate, do not needed extra processing technology, such as CMP etc., shorten the extension time, saved cost.The high-quality SiGe virtual substrate that the present invention is prepared has high Ge content, complete characteristics such as low, the thin thickness of relaxation, dislocation density, surfacing, has reached the application requirements of device level strain Ge channel material.
Description of drawings
Structural representation and the preparation flow figure of Fig. 1 high Ge content SiGe virtual substrate of the present invention
Si among Fig. 2 embodiment 1 0.2Ge 0.8Virtual substrate c high-resolution X-ray diffraction reciprocal space collection of illustrative plates
Si among Fig. 3 embodiment 1 0.2Ge 0.8Virtual substrate c cross-sectional transmission electron microscope (TEM) photo
Si among Fig. 4 embodiment 1 0.2Ge 0.8Surface atom force microscope (AFM) photo of virtual substrate c
Si among Fig. 5 embodiment 1 0.2Ge 0.8The optical microscope photograph of virtual substrate c after etching
Embodiment
Further set forth the present invention below in conjunction with specific embodiment, should be understood that these embodiment only are used for explanation the present invention and are not used in restriction protection scope of the present invention.
Embodiment 1
A kind of preparation flow of SiGe virtual substrate of high Ge content as shown in Figure 1, with the preparation Si 0.2Ge 0.8Virtual substrate is example, may further comprise the steps:
Step s100 prepares respectively the Si wafer of four 4 inches, 6 inches, 8 inches and 12 inches as the Si substrate.
Step s101, the growth of Ge relaxed buffer layers: respectively take the Si substrate of 4 inches, 6 inches, 8 inches and 12 inches as the basis, first at 400 ℃ with GeH 4Be gas phase predecessor, GeH 4Flow is 150sccm, with H 2Be carrier gas, growth room's pressure is 100Torr, and depositing respectively a layer thickness is the Ge seed layer of 50nm, 60nm, 100nm and 100nm; Keep growth atmosphere constant, then on four good Ge seed layer of deposition 700 ℃ respectively deposit thickness be the Ge resilient coating of 300nm, 340nm, 400nm and 600nm, all annealed 10 minutes in 850 ℃ of original positions (epitaxial chamber) after finishing, keeping growth room's pressure during annealing is 100Torr, obtains the Ge relaxed buffer layers of four complete deformation relaxations.These four Ge relaxed buffer layers are respectively the Ge relaxed buffer layers of 4 inches Si substrate 350nm thickness, be labeled as the Ge relaxed buffer layers of a1,6 inches Si substrate 400nm thickness, be labeled as the Ge relaxed buffer layers of b1,8 inches Si substrate 500nm thickness, be labeled as the Ge relaxed buffer layers of c1 and 12 inches Si substrate 700nm thickness, be labeled as d1.
Step s102, the growth of the SiGe resilient coating of component-gradient: on the basis of relaxation Ge resilient coating a1, b1, c1 and d1 that step s101 obtains, the SiGe resilient coating of difference epitaxial growth component-gradient is with H 2Be carrier gas, GeH 4And SiCl 2H 2Be the gas phase predecessor, growth temperature is 850 ℃, and growth room's pressure is 20Torr, with the variation of Ge content in the SiGe resilient coating of component-gradient, by regulating GeH 4With SiH 2Cl 2Flow-rate ratio realizes SiGe component-gradient, GeH 4Flow remain on 500sccm, SiCl 2H 2Flow cumulative with the growth time linearity.The every 250nm thickness of the SiGe resilient coating of component-gradient is realized the minimizing of 5%Ge, is 0.8: 0.2 until be gradient to the content ratio of Ge and Si, obtains respectively the Si that thickness is the component-gradient of 1000nm 0.2Ge 0.8Resilient coating a2, b2, c2 and d2.
Step s103, the growth of the SiGe layer that component is constant: the Si of the component-gradient that obtains at step s102 0.2Ge 0.8On the basis of resilient coating a2, b2, c2 and d2, all with GeH 4And SiCl 2H 2Be gas phase predecessor, GeH 4Flow is 500sccm, SiCl 2H 2Flow is 33sccm, H 2Be carrier gas, epitaxial growth temperature is 850 ℃, and growth room's pressure is 20Torr, and growth thickness is the constant Si of the component of 500nm 0.2Ge 0.8Layer obtains respectively SiGe virtual substrate a, b, c and the d of the high Ge content of relaxation, and the gross thickness of its epitaxial loayer is respectively 1850nm, 1900nm, 2000nm and 2200nm after testing.
The structural representation of the SiGe virtual substrate of the high Ge content of relaxation of this embodiment 1 gained as shown in Figure 1, take the Si substrate as the basis, the constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge seed layer, Ge resilient coating, component-gradient and component successively from inside to outside, described Ge seed layer and described Ge resilient coating form the Ge relaxed buffer layer.
Fig. 2 is the Si of embodiment 1 gained 0.2Ge 0.8Virtual substrate c high-resolution X-ray diffraction reciprocal space collection of illustrative plates, epitaxially grown each layer marks in the drawings, can find out that complete deformation relaxation has occured for Ge seed layer and Ge resilient coating, and SiGe component-gradient layer and SiGe component layer of constant also are in complete relaxed state.
Fig. 3 is the Si of embodiment 1 gained 0.2Ge 0.8Virtual substrate c cross-sectional transmission electron microscope (TEM) photo, the TEM photo from Fig. 3 can be found out Si 0.2Ge 0.8Each epitaxial loayer gross thickness of virtual substrate c is 2 μ m, and dislocation and defective mainly concentrate on the Si that thickness is 1 μ m 0-0.2Ge 1-0.8The component-gradient layer, Si 0.2Ge 0.8Then there are not obvious dislocation and defective in the component layer of constant.Need to prove in addition the colloid that component is constant among Fig. 3 SiGe layer upper part used for the preparation sample for use in transmitted electron microscope, with the object of reference as top layer.
Fig. 4 is the Si of embodiment 1 gained 0.2Ge 0.8Surface atom force microscope (AFM) photo of virtual substrate c can be found out this Si from this surface topography atomic force photo 0.2Ge 0.8The mean roughness of virtual substrate c is 1.7 ± 0.1nm, be lower than the prior art processes level requirement (<2.0nm).
Fig. 5 is the Si of embodiment 1 gained 0.2Ge 0.8The optical microscope photograph of virtual substrate c after etching is by the Si that obtains after the etching 0.2Ge 0.8The dislocation density of virtual substrate is 1 * 10 6Cm -2, satisfy process for fabricating semiconductor device to the requirement of substrate.
Embodiment 2
A kind of Si of high Ge content 0.15Ge 0.85The preparation of virtual substrate may further comprise the steps:
Step s100 prepares 8 inches Si wafer as the Si substrate.
Step s101, the growth of Ge relaxed buffer layers: take 8 inches Si substrates as the basis, first at 350 ℃ with GeH 4Be gas phase predecessor, GeH 4Flow is 200sccm, with H 2Be carrier gas, growth room's pressure is 100Torr, and deposition a layer thickness is the Ge seed layer of 100nm; Keep growth atmosphere constant, then the Ge resilient coating that on the good Ge seed layer of deposition, is 400nm at 650 ℃ of deposit thickness, annealed 10 minutes in 850 ℃ of original positions (epitaxial chamber) after finishing, keeping growth room's pressure during annealing is 100Torr, and acquisition thickness is the Ge relaxed buffer layers of 500nm, complete deformation relaxation.
Step s102, the growth of the SiGe resilient coating of component-gradient: on the relaxation Ge resilient coating basis that step s101 obtains, the SiGe resilient coating of epitaxial growth component-gradient is with H 2Be carrier gas, GeH 4And SiCl 2H 2Be the gas phase predecessor, growth temperature is 900 ℃, and growth room's pressure is 20Torr, with the increase of the SiGe buffer layer thickness of component-gradient, by regulating GeH 4With SiH 2Cl 2Flow-rate ratio realizes SiGe component-gradient, GeH 4Flow remain on 500sccm, SiCl 2H 2Flow cumulative with the growth time linearity.The every 200nm thickness of the SiGe resilient coating of component-gradient is realized the minimizing of 5%Ge, is 0.85: 0.15 until be gradient to the content ratio of Ge and Si, obtains the Si that thickness is the component-gradient of 600nm 0.15Ge 0.85Resilient coating.
Step s103, the growth of the SiGe layer that component is constant: the Si of the component-gradient that obtains at step s102 0.15Ge 0.85On the resilient coating, with GeH 4And SiCl 2H 2Be gas phase predecessor, GeH 4Flow is 300sccm, SiCl 2H 2Flow is 18sccm, H 2Be carrier gas, epitaxial growth temperature is 800 ℃, and growth room's pressure is 50Torr, and growth thickness is the constant Si of the component of 500nm 0.15Ge 0.85Layer obtains the SiGe virtual substrate of the high Ge content of relaxation, and the gross thickness of its epitaxial loayer is 1600nm after testing.
After testing, the SiGe virtual substrate of the high Ge content of relaxation of gained is take the Si substrate as the basis, comprise from inside to outside the successively constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge relaxed buffer layer, component-gradient and component, described Ge relaxed buffer layer comprises Ge seed layer and Ge resilient coating from inside to outside.
After testing, the Si of embodiment 2 gained 0.15Ge 0.85Virtual substrate high-resolution X-ray diffraction reciprocal space collection of illustrative plates can find out that complete deformation relaxation has occured for Ge seed layer and Ge resilient coating, and SiGe component-gradient layer and SiGe component layer of constant also are in complete relaxed state.
After testing, the Si of embodiment 2 gained 0.15Ge 0.85Virtual substrate cross-sectional transmission electron microscope (TEM) photo can be found out Si 0.15Ge 0.85Each epitaxial loayer gross thickness of virtual substrate is 1.6 μ m, and dislocation and defective mainly concentrate on the Si that thickness is 0.6 μ m 0-0.15Ge 1-0.85The component-gradient layer effectively reduces Si 0.15Ge 0.85Dislocation in the component layer of constant and defect concentration, the TEM photo shows Si 0.15Ge 0.85Then there are not obvious dislocation and defective in the component layer of constant.
After testing, the Si of embodiment 2 gained 0.15Ge 0.85Surface atom force microscope (AFM) photo of virtual substrate can be found out this Si from this surface topography atomic force photo 0.15Ge 0.85The mean roughness of virtual substrate is 1.5 ± 0.1nm, be lower than the prior art processes level requirement (<2.0nm).
After testing, the Si of embodiment 2 gained 0.15Ge 0.85The optical microscope photograph of virtual substrate after etching is by the Si that obtains after the etching 0.15Ge 0.85The dislocation density of virtual substrate is 6 * 10 6Cm -2, satisfy process for fabricating semiconductor device to the requirement of substrate.
Embodiment 3
A kind of Si of high Ge content 0.1Ge 0.9The preparation of virtual substrate may further comprise the steps:
Step s100 prepares 6 inches Si wafer as the Si substrate.
Step s101, the growth of Ge relaxed buffer layers: take 6 inches Si substrates as the basis, first at 400 ℃ with GeH 4Be gas phase predecessor, GeH 4Flow is 100sccm, with H 2Be carrier gas, growth room's pressure is 50Torr, and deposition a layer thickness is the Ge seed layer of 100nm; Keep growth atmosphere constant, then the Ge resilient coating that on the good Ge seed layer of deposition, is 500nm at 650 ℃ of deposit thickness, annealed 10 minutes in 800 ℃ of original positions (epitaxial chamber) after finishing, keeping growth room's pressure during annealing is 100Torr, and acquisition thickness is the Ge relaxed buffer layers of 600nm, complete deformation relaxation.
Step s102, the growth of the SiGe resilient coating of component-gradient: on the relaxation Ge resilient coating basis that step s101 obtains, the SiGe resilient coating of epitaxial growth component-gradient is with H 2Be carrier gas, GeH 4And SiCl 2H 2Be the gas phase predecessor, growth temperature is 800 ℃, and growth room's pressure is 100Torr, with the increase of the SiGe buffer layer thickness of component-gradient, by regulating GeH 4With SiH 2Cl 2Flow-rate ratio realizes SiGe component-gradient, GeH 4Flow remain on 300sccm, SiCl 2H 2Flow cumulative with the growth time linearity.The every 250nm thickness of the SiGe resilient coating of component-gradient is realized the minimizing of 5%Ge, is 0.9: 0.1 until be gradient to the content ratio of Ge and Si, obtains the Si that thickness is the component-gradient of 500nm 0.1Ge 0.9Resilient coating.
Step s103, the growth of the SiGe layer that component is constant: the Si of the component-gradient that obtains at step s102 0.1Ge 0.9On the resilient coating, with GeH 4And SiCl 2H 2Be gas phase predecessor, GeH 4Flow is 500sccm, SiCl 2H 2Flow is 14sccm, H 2Be carrier gas, epitaxial growth temperature is 900 ℃, and growth room's pressure is 100Torr, and growth thickness is the constant Si of the component of 1000nm 0.1Ge 0.9Layer obtains the SiGe virtual substrate of the high Ge content of relaxation, and the gross thickness of its epitaxial loayer is 2100nm after testing.
After testing, the SiGe virtual substrate of the high Ge content of relaxation of gained is take the Si substrate as the basis, comprise from inside to outside the successively constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge relaxed buffer layer, component-gradient and component, described Ge relaxed buffer layer comprises Ge seed layer and Ge resilient coating from inside to outside.
After testing, the Si of embodiment 3 gained 0.1Ge 0.9Virtual substrate high-resolution X-ray diffraction reciprocal space collection of illustrative plates can find out that complete deformation relaxation has occured for Ge seed layer and Ge resilient coating, and SiGe component-gradient layer and SiGe component layer of constant also are in complete relaxed state.
After testing, the Si of embodiment 3 gained 0.1Ge 0.9Virtual substrate cross-sectional transmission electron microscope (TEM) photo can be found out Si 0.1Ge 0.9Each epitaxial loayer gross thickness of virtual substrate is 2.1 μ m, and dislocation and defective mainly concentrate on the Si that thickness is 0.5 μ m 0-0.1Ge 1-0.9The component-gradient layer effectively reduces Si 0.1Ge 0.9Dislocation in the component layer of constant and defect concentration, the TEM photo shows Si 0.1Ge 0.9Then there are not obvious dislocation and defective in the component layer of constant.
After testing, the Si of embodiment 3 gained 0.1Ge 0.9Surface atom force microscope (AFM) photo of virtual substrate can be found out this Si from this surface topography atomic force photo 0.1Ge 0.9The mean roughness of virtual substrate is 1.4 ± 0.1nm, be lower than the prior art processes level requirement (<2.0nm).
After testing, the Si of embodiment 3 gained 0.1Ge 0.9The optical microscope photograph of virtual substrate after etching is by the Si that obtains after the etching 0.1Ge 0.9The dislocation density of virtual substrate is 8.5 * 10 6Cm -2, satisfy process for fabricating semiconductor device to the requirement of substrate.
Embodiment 4
A kind of Si of high Ge content 0.25Ge 0.75The preparation of virtual substrate may further comprise the steps:
Step s100 prepares 12 inches Si wafer as the Si substrate.
Step s101, the growth of Ge relaxed buffer layers: take 12 inches Si substrates as the basis, first at 400 ℃ with GeH 4Be gas phase predecessor, GeH 4Flow is 150sccm, with H 2Be carrier gas, growth room's pressure is 150Torr, and deposition a layer thickness is the Ge seed layer of 100nm; Keep growth atmosphere constant, then the Ge resilient coating that on the good Ge seed layer of deposition, is 400nm at 700 ℃ of deposit thickness, annealed 10 minutes in 900 ℃ of original positions (epitaxial chamber) after finishing, keeping growth room's pressure during annealing is 100Torr, and acquisition thickness is the Ge relaxed buffer layers of 500nm, complete deformation relaxation.
Step s102, the growth of the SiGe resilient coating of component-gradient: on the relaxation Ge resilient coating basis that step s101 obtains, the SiGe resilient coating of epitaxial growth component-gradient is with H 2Be carrier gas, GeH 4And SiCl 2H 2Be the gas phase predecessor, growth temperature is 850 ℃, and growth room's pressure is 50Torr, with the increase of the SiGe buffer layer thickness of component-gradient, by regulating GeH 4With SiH 2Cl 2Flow-rate ratio realizes SiGe component-gradient, GeH 4Flow remain on 500sccm, SiCl 2H 2Flow cumulative with the growth time linearity.The every 200nm thickness of the SiGe resilient coating of component-gradient is realized the minimizing of 5%Ge, is 0.75: 0.25 until be gradient to the content ratio of Ge and Si, obtains the Si that thickness is the component-gradient of 1000nm 0.25Ge 0.75Resilient coating.
Step s103, the growth of the SiGe layer that component is constant: the Si of the component-gradient that obtains at step s102 0.25Ge 0.75On the resilient coating, with GeH 4And SiCl 2H 2Be gas phase predecessor, GeH 4Flow is 400sccm, SiCl 2H 2Flow is 62sccm, H 2Be carrier gas, epitaxial growth temperature is 850 ℃, and growth room's pressure is 20Torr, and growth thickness is the constant Si of the component of 500nm 0.25Ge 0.75Layer obtains the SiGe virtual substrate of the high Ge content of relaxation, and the gross thickness of its epitaxial loayer is 2000nm after testing.
After testing, the SiGe virtual substrate of the high Ge content of relaxation of gained is take the Si substrate as the basis, comprise from inside to outside the successively constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge relaxed buffer layer, component-gradient and component, described Ge relaxed buffer layer comprises Ge seed layer and Ge resilient coating from inside to outside.
After testing, the Si of embodiment 4 gained 0.25Ge 0.75Virtual substrate high-resolution X-ray diffraction reciprocal space collection of illustrative plates can find out that complete deformation relaxation has occured for Ge seed layer and Ge resilient coating, and SiGe component-gradient layer and SiGe component layer of constant also are in complete relaxed state.
After testing, the Si of embodiment 4 gained 0.25Ge 0.75Virtual substrate cross-sectional transmission electron microscope (TEM) photo can be found out Si 0.25Ge 0.75Each epitaxial loayer gross thickness of virtual substrate is 2 μ m, and dislocation and defective mainly concentrate on the Si that thickness is 1 μ m 0-0.25Ge 1-0.75The component-gradient layer effectively reduces Si 0.25Ge 0.75Dislocation in the component layer of constant and defect concentration, the TEM photo shows Si 0.25Ge 0.75Then there are not obvious dislocation and defective in the component layer of constant.
After testing, the Si of embodiment 4 gained 0.25Ge 0.75Surface atom force microscope (AFM) photo of virtual substrate can be found out this Si from this surface topography atomic force photo 0.25Ge 0.75The mean roughness of intending substrate is 1.8 ± 0.1nm, be lower than the prior art processes level requirement (<2.0nm).
After testing, the Si of embodiment 4 gained 0.25Ge 0.75The optical microscope photograph of virtual substrate after etching is by the Si that obtains after the etching 0.25Ge 0.75The dislocation density of virtual substrate is 1.5 * 10 6Cm -2, satisfy process for fabricating semiconductor device to the requirement of substrate.

Claims (8)

1. relaxation SiGe virtual substrate, described SiGe virtual substrate comprise the Si substrate, the constant SiGe layer of the SiGe resilient coating of epitaxially grown Ge seed layer, Ge resilient coating, component-gradient and component successively from inside to outside on the Si substrate; Described Ge seed layer and described Ge resilient coating form the Ge relaxed buffer layers; In the SiGe resilient coating of described component-gradient, take the side of next-door neighbour's Ge relaxed buffer layers as starting point, take the side of the constant SiGe layer of next-door neighbour's component as terminal point, the molar content of Ge is gradually reduced to identical with the molar content of Ge the constant SiGe layer of component from 100%.
2. relaxation SiGe virtual substrate as claimed in claim 1, it is characterized in that: the SiGe layer that the SiGe resilient coating of described Ge seed layer, Ge resilient coating, component-gradient and component are constant is the resilient coating of complete deformation relaxation.
3. relaxation SiGe virtual substrate as claimed in claim 1, it is characterized in that: the thickness of described Ge seed layer is 50-100nm, the thickness of described Ge resilient coating is 300-600nm; The thickness of the SiGe layer that described component is constant is 500-1000nm.
4. relaxation SiGe virtual substrate as claimed in claim 1 is characterized in that: in the SiGe of described component-gradient resilient coating, and the every 200-250nm varied in thickness 5% of the molar content of described Ge.
5. such as the application in Ge channel strain engineering and the high mobility channel material in CMOS technique of the arbitrary described relaxation SiGe virtual substrate of claim 1-4.
6. the preparation method such as the arbitrary described relaxation SiGe virtual substrate of claim 1-4 is characterized in that, adopts the rpcvd method with GeH 4And SiH 2Cl 2For the gas phase predecessor, with H 2For carrier gas each epitaxial loayer of on the Si substrate, growing successively, specifically comprise the steps:
1) epitaxial growth Ge seed layer on the Si substrate;
2) epitaxial growth Ge resilient coating on the good Ge seed layer of growth;
3) in growth room's in-situ annealing, annealing temperature was 800-900 ℃ after Ge buffer growth described step 2) was finished, and obtained the Ge relaxed buffer layers of complete relaxation;
4) the SiGe resilient coating of epitaxial growth component-gradient on the Ge relaxed buffer layers that it is good that described step 3) is grown; In the SiGe resilient coating of described component-gradient, take the side of next-door neighbour's Ge relaxed buffer layers as starting point, take the side of the constant SiGe layer of next-door neighbour's component as terminal point, the molar content of Ge is gradually reduced to identical with the molar content of Ge the constant SiGe layer of component from 100%;
5) the constant SiGe layer of epitaxial growth component on the SiGe resilient coating of the component-gradient that it is good that described step 4) is grown.
7. the preparation method of relaxation SiGe virtual substrate as claimed in claim 6 is characterized in that:
The growth temperature of described step 1) Ge seed layer is 350-400 ℃, and growth room's pressure is 50-150Torr, and the growth of described Ge seed layer is with GeH 4Be the gas phase predecessor;
Described step 2) growth temperature of Ge resilient coating is 650-700 ℃, and growth room's pressure is 50-150Torr, and the growth of described Ge resilient coating is with GeH 4Be the gas phase predecessor;
The epitaxial growth temperature of the SiGe resilient coating of described step 4) component-gradient is 800-900 ℃, and growth room's pressure is 20-100Torr, with GeH 4And SiH 2Cl 2Be the gas phase predecessor;
The SiGe layer that described step 5) component is constant, described epitaxial growth temperature are 800-900 ℃, and growth room's pressure is 20-100Torr, with GeH 4And SiH 2Cl 2Be the gas phase predecessor.
8. such as the preparation method of claim 6 or 7 described relaxation SiGe virtual substrates, it is characterized in that in the described step 4), the SiGe resilient coating of component-gradient is by the described gas phase predecessor of dynamic adjustments GeH in epitaxial process 4And SiH 2Cl 2Flow velocity recently prepare.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1612293A (en) * 2003-10-30 2005-05-04 台湾积体电路制造股份有限公司 Method for manufacturing multi-layer structure having strain and field effect transistor having strain layer
CN1954421A (en) * 2004-06-29 2007-04-25 国际商业机器公司 Method of forming strained Si/SiGe on insulator with silicon germanium buffer
CN101140864A (en) * 2005-09-07 2008-03-12 硅绝缘体技术有限公司 Semiconductor heterostructure and method for forming a semiconductor heterostructure

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US7186626B2 (en) * 2005-07-22 2007-03-06 The Regents Of The University Of California Method for controlling dislocation positions in silicon germanium buffer layers

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1612293A (en) * 2003-10-30 2005-05-04 台湾积体电路制造股份有限公司 Method for manufacturing multi-layer structure having strain and field effect transistor having strain layer
CN1954421A (en) * 2004-06-29 2007-04-25 国际商业机器公司 Method of forming strained Si/SiGe on insulator with silicon germanium buffer
CN101140864A (en) * 2005-09-07 2008-03-12 硅绝缘体技术有限公司 Semiconductor heterostructure and method for forming a semiconductor heterostructure

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