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CN102097333A - Method for designing circuit board, circuit board and electronic device - Google Patents

Method for designing circuit board, circuit board and electronic device Download PDF

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Publication number
CN102097333A
CN102097333A CN 201010533969 CN201010533969A CN102097333A CN 102097333 A CN102097333 A CN 102097333A CN 201010533969 CN201010533969 CN 201010533969 CN 201010533969 A CN201010533969 A CN 201010533969A CN 102097333 A CN102097333 A CN 102097333A
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fan
out line
circuit board
adjacent
layer
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CN 201010533969
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CN102097333B (en
Inventor
王瑞
乔斌
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Huawei Device Co Ltd
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Huawei Device Co Ltd
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Abstract

The invention discloses a method for designing a circuit board, the circuit board and an electronic device, relating to the technical field of microelectronics, and aiming to reduce numbers of orders and layers of the circuit board. The method for designing the circuit board, disclosed by the embodiment of the invention, comprises the step of reducing the fan-out depth of fan-out lines on the circuit board, wherein the fan-out depth is the number of circuit board layers of the circuit board in which the fan-out lines are distributed, and the circuit board comprises multiple mutually stacked circuit board layers. The circuit board disclosed by the embodiment of the invention is a circuit board obtained by the method for designing the circuit board. The electronic device disclosed by the embodiment of the invention comprises the circuit board. The invention can be applied to designing and manufacturing the circuit boards with fewer orders and layers.

Description

Circuit board designing method, circuit board and electronic equipment
Technical field
The present invention relates to microelectronics technology, relate in particular to a kind of circuit board designing method, circuit board and electronic equipment.
Background technology
At present, at HDI (High Density Interconnect, high density interconnect) in the circuit board of type, used little blind buried via hole art designs highdensity circuit distribute, and used many closely spaced encapsulation technologies such as BGA encapsulation (Ball Grid Array Package, the BGA Package technology), improved the density of arranging of electronic equipment components and parts on the circuit board greatly.
Wherein, for adopting the circuit board of BGA encapsulation, along with development of technology, the density of arranging of each pad is increasing in the BGA encapsulation, make that the spacing between the two adjacent pads is more and more littler, so make the density of the circuit board fan-out line of drawing from each pad also increasing, the spacing between each fan-out line is also more and more littler.
State in realization in the process of use, the inventor finds that there are the following problems at least in the prior art:
For the circuit board that constitutes by the multilayer circuit flaggy, if wherein the fan-out line density on one deck board layer is increasing, so that when on this layer circuit board layer, being difficult to arrange, need be incorporated on another layer circuit board layer by the fan-out line on will this layer such as blind buried via hole technology, make fan-out line fan-out on this another layer circuit board layer of introducing then.Like this along with the continuous increase of fan-out line density, need just be on the increase by the fan-out line that blind buried via hole technology is drawn, make the exponent number of blind buried via hole improve constantly on the one hand, sometimes even need to adopt the blind buried via hole technology of random layer interconnection, also make the number of plies that increases in the circuit board be on the increase on the other hand, so just strengthen technology difficulty, improved product cost.
Summary of the invention
Embodiments of the invention provide a kind of circuit board designing method, circuit board and electronic equipment, to reduce the exponent number and the number of plies of circuit board.
For achieving the above object, embodiments of the invention adopt following technical scheme:
A kind of circuit board designing method, described circuit board comprises the board layer that multilayer is piled up mutually, described method comprises: reduce the fan-out degree of depth of fan-out line on the circuit board, the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.
A kind of circuit board, described circuit board comprises the board layer that multilayer is piled up mutually, and described circuit board has the structure of the fan-out degree of depth that reduces fan-out line on the circuit board, the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.
A kind of electronic equipment has the foregoing circuit plate in the described electronic equipment.
The circuit board designing method that the embodiment of the invention provides, circuit board and electronic equipment, because the fan-out degree of depth of fan-out line is relevant with the exponent number and the number of plies of circuit board on the circuit board, be that the fan-out degree of depth is big more, it is just many more for these fan-out line circuitry needed flaggy numbers are set, and it is also high more for the blind buried via hole exponent number that these fan-out lines adopt is set, even the blind buried via hole technology that needs the employing random layer to interconnect, therefore by reducing the fan-out degree of depth of fan-out line on the circuit board, reduced to these fan-out line circuitry needed flaggy numbers and blind buried via hole exponent number are set, reached the purpose that reduces the circuit board exponent number and the number of plies.
Description of drawings
Fig. 1 is the schematic diagram of a kind of BGA package design in the prior art;
Fig. 2 is the schematic diagram of BGA package design under the 0.4pitch specification in the prior art;
Fig. 3 is the schematic diagram of embodiment of the invention circuit board designing method;
Fig. 4 is a kind of schematic diagram of the embodiment of the invention indication fan-out degree of depth;
Fig. 5 is the another kind of schematic diagram of the embodiment of the invention indication fan-out degree of depth;
Fig. 6 is the schematic diagram after BGA package design shown in Figure 1 is improved;
Fig. 7 is the schematic diagram to first kind of modification of BGA package design shown in Figure 2;
Fig. 8 is the schematic diagram to first kind of compensation of fan-out line pad shown in Figure 7;
Fig. 9 is the schematic diagram to second kind of compensation of fan-out line pad shown in Figure 7;
Figure 10 is the schematic diagram to the third compensation of fan-out line pad shown in Figure 7;
Figure 11 is the schematic diagram to second kind of modification of BGA package design shown in Figure 2;
Figure 12 is the schematic diagram to the third modification of BGA package design shown in Figure 2;
Figure 13 is the schematic diagram to the 4th kind of modification of BGA package design shown in Figure 2.
Embodiment
Below in conjunction with accompanying drawing embodiment of the invention circuit board designing method, circuit board and electronic equipment are described in detail.For clarity sake, below the structure described in the accompanying drawing be zoomed-in view, do not represent the true ratio of actual object.
Should be clear and definite, described embodiment only is a part of embodiment of the present invention, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making all other embodiment that obtained under the creative work prerequisite.
As shown in Figure 3, be a specific embodiment of circuit board designing method of the present invention.Wherein, described circuit board comprises the board layer that multilayer is piled up mutually, and described method comprises:
S301 reduces the fan-out degree of depth of fan-out line on the circuit board.
Wherein, fan-out (English fanout by name) refers to a kind of mode that lead is drawn from pad.What illustrates below is fan-out line, for example for a large-area circuit board, according to wiring and components and parts the needs of position are set, can a chip be set a position on this circuit board, and another position thereon are provided with another chip.In order to realize the communication between these two chips, the a series of high density BGA pads that link to each other with the pin of this chip can be set in the peripheral region of an above-mentioned chip, and the other a series of high density BGA pads that link to each other with the pin of this chip are set in the peripheral region of above-mentioned another chip, by cabling the high density GBA pad in two zones is coupled together to realize two communications between the chip then.Particularly, unilaterally with regard to one of them chip, the lead-out wire towards the high density BGA of another chip pad of drawing from the high density BGA pad of this chip peripheral region is fan-out line.
Particularly, the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.As shown in Figure 4, with the circuit board of being made up of 6 layer circuit board layers, when being equipped with fan-out line on every layer circuit board layer, the fan-out depth H is 6 layers.When fan-out line not being set on wherein one deck or which floor board layer, for example among Fig. 5, when fan-out line not being set on the four-layer circuit board layer, fan-out depth H=H1+H2 is 5 layers.
The circuit board designing method that provides in the present embodiment, because the fan-out degree of depth of fan-out line is relevant with the exponent number and the number of plies of circuit board on the circuit board, be that the fan-out degree of depth is big more, it is just many more for these fan-out line circuitry needed flaggy numbers are set, and it is also high more for the blind buried via hole exponent number that these fan-out lines adopt is set, even the blind buried via hole technology that needs the employing random layer to interconnect, therefore by reducing the fan-out degree of depth of fan-out line on the circuit board, can be reduced to these fan-out line circuitry needed flaggy numbers and blind buried via hole exponent number are set, to reach the purpose that reduces the circuit board exponent number and the number of plies.
Wherein, can adopt multiple mode to reduce the fan-out degree of depth of fan-out line on the circuit board.For example, under the situation of conditions permit, the area that can increase circuit board allows the fan-out line number that distributes to increase on each layer circuit board layer, and then reduces the fan-out degree of depth.Perhaps, can also omit the number of unnecessary fan-out line, and then reduce the fan-out degree of depth with the minimizing fan-out line.
In the present embodiment, under the prerequisite of and fan-out line invariable number constant at holding circuit plate area, can be in the following way: the whole fan-out lines at least one layer circuit board layer except that top layer in the described circuit board are shifted being arranged on described top layer or other the board layer, so just reduced the fan-out degree of depth of fan-out line.With regard to being provided with regard to the aspect of fan-out line, after whole fan-out lines at least one layer circuit board layer in described circuit board except that top layer all remove, the use that can omit this at least one layer circuit board layer on the one hand, can avoid in circuit board, being provided with the blind buried via hole that leads to this at least one layer circuit board layer on the other hand, therefore reduce the exponent number and the number of plies of circuit board.
And further, in the present embodiment when the part fan-out line on the 3rd layer circuit board layer is shifted be arranged on top layer or the second layer board layer after, can reduce the distribution density of fan-out line on the 3rd layer circuit board layer, make the blind buried via hole density of leading on the 3rd layer circuit board layer also decrease, so just can use the bigger blind buried via hole in aperture, for example laser hole (aperture is less) can be changed into mechanical hole (aperture is bigger), to reduce the processing and fabricating cost of blind buried via hole.
Illustrate below the whole fan-out lines at least one layer circuit board layer except that top layer in the described circuit board are shifted the mode of operation that is arranged on described top layer or other the board layer.As shown in Figure 1, in the prior art, with the circuit board of being made up of 3 layer circuit board layers is example, in this circuit board, adopt the BGA encapsulation technology, and on the top layer of circuit board, be provided with 5 row BGA fan-out line pads, BGA fan-out line pad represents that with the circle of blacking top layer to the single order blind hole of second layer board layer (1-2) represents that with the circle of making fork the second-order blind holes of top layer to the three layer circuit board layers (1-3) is represented with the circle of beating round dot.Suppose that the BGA among Fig. 1 is encapsulated as the BGA encapsulation of adopting around the chip, wherein the distribution of fan-out line is as follows, and the fan-out line of outermost first row and second row's fan-out line pad is directly drawn by top layer for this chip, and its fan-out line is represented with solid line; The fan-out line of the 3rd row's fan-out line pad is drawn by second layer board layer by after the position being set and single order blind hole that the fan-out line pad departs from mutually being incorporated on the second layer board layer, and its fan-out line is represented with two-dot chain line; The fan-out line that the 4th row and the 5th arranges the fan-out line pad is drawn by the 3rd layer circuit board layer by after the position being set and second-order blind holes that fan-out line pad and single order blind hole depart from mutually being incorporated on the 3rd layer circuit board layer, and its fan-out line is represented by dotted lines.Under the distribution mode of this fan-out line, its fan-out degree of depth is the height of 3 layer circuit board layers on stacking direction.
As shown in Figure 6, when transfer is provided with fan-out line, can at first the fan-out line on the second layer board layer be shifted being arranged on the top layer, and then the transfer of the fan-out line on the 3rd layer circuit board layer is arranged on the second layer board layer.After the transfer setting of fan-out line is finished as can be seen, the fan-out line of first row, second row and the 3rd row's fan-out line pad is all directly drawn by top layer, its fan-out line is represented with solid line, the fan-out line of the 4th row and the 5th row's fan-out line pad is drawn by second layer board layer, and its fan-out line is represented with two-dot chain line.With regard to fan-out line is provided with the aspect, can save use like this, reduce the number of plies of circuit board, save in addition, reduce the exponent number of circuit board use by the second-order blind holes of top layer to the three layer circuit board layers to the 3rd layer circuit board layer.
In the present embodiment, the whole fan-out lines at least one layer circuit board layer except that top layer in the circuit board can be shifted being arranged on described top layer or other the board layer, reduce the number of plies and the exponent number of circuit board with this.But for the circuit board of the BGA encapsulation that has higher density, the spacing between two adjacent fan-out line pads is very little, may cause being difficult to increasing between these two adjacent fan-out line pads being provided with and shift the fan-out line of coming.
0.4pitch (spacing with present routine, the centre-to-centre spacing that refers to two adjacent fan-out line pads, 1pitch=1000 μ m wherein) the BGA package design is example, the spacing P=400 μ m of its two adjacent fan-out line pad, the diameter of each circular fan-out line pad (identical) b=250 μ m with the diameter of BGA ball, the spacing c=75 μ m between fan-out line pad and the adjacent with it fan-out line.When only needing to draw a fan-out line between two adjacent fan-out line pads, and spacing three's homogeneous phase of the width of this fan-out line and this fan-out line and this two adjacent fan-out line pad simultaneously, and the P=b+3c establishment should be arranged.But as shown in Figure 2, for the BGA package design of 0.4pitch specification, only there is P=b+2c to set up, that is to say, do not have enough intervals to increase between the two adjacent fan-out line pads and draw a fan-out line (this fan-out line is represented with the hacures that tilt towards the lower right).
In like manner, when fan-out line being shifted on other board layers that are arranged on except that top layer, also there is same problem in two adjacent fan-out line via holes.
For this purpose, before whole fan-out lines at least one layer circuit board layer in described circuit board except that top layer shift and are arranged on described top layer or other the board layer, need make amendment to existing fan-out line pad or fan-out line via hole, so that can draw at least one fan-out line from increasing between two adjacent fan-out line pads or two adjacent fan-out line via holes.The aspect of revising can relate to following three kinds of modes: the first, to the modification of fan-out line pad or fan-out line via shape; The second, to the modification of the fan-out line width that is transferred setting; The 3rd, to the modification of the spacing of each the fan-out line spacing between two adjacent fan-out line pads or the fan-out line via hole and each fan-out line and this two adjacent fan-out line pad or two adjacent fan-out line via holes.In actual use, can only use above-mentioned a kind of alter mode, perhaps be used in combination multiple alter mode.Need to prove that the alter mode in the embodiment of the invention is not limited to above-mentioned three kinds, can also use other known or common use modification modes.
Below by concrete example above-mentioned three kinds of alter modes are done respectively to describe.
First kind of alter mode, revise the shape of the fan-out line pad on the top layer, and between the opposite edges of the inboard of two adjacent fan-out line pads, form first at interval, described first allows to draw at least one velamen and shift the fan-out line that is provided with from increasing between described two adjacent fan-out line pads at interval.
Particularly, can cut the dish processing in the relevant location of the fan-out line of drawing with increase of first row's fan-out line pad, to reduce the width of described fan-out line pad at this place, relevant range, so that between the opposite edges of the inboard of two adjacent fan-out line pads, form enough first at interval, and then can first increase at interval and draw at least one velamen and shift the fan-out line that is provided with from this.Still the BGA package design with the 0.4pitch specification is that example describes, as shown in Figure 7, in the horizontal direction first row's circular fan-out line pad being cut dish handles, the scarce shape of circle that correspondence eliminates the circular fan-out line pad left and right sides makes it to form Long Circle, and makes cutting on this Long Circle left and right directions coil width a=175 μ m.After cutting dish like this and handling, can make form between the opposite edges of inboard of the adjacent fan-out line pad of two-phase first reach p-(b-a)=400 μ m-(250 μ m-175 μ m)=225 μ m at interval.The fan-out line of drawing when increase (promptly, being transferred the fan-out line of setting) spacing three's homogeneous phase of width and this fan-out line and this two adjacent fan-out line pad is simultaneously, satisfy P=a+3c, the i.e. requirement of 400 μ m=175 μ m+3 * 75 μ m, so this first interval allows to draw the fan-out line that a velamen shifts setting from increasing between two adjacent fan-out line pads.
But it should be noted that, through above-mentioned cut dish and handle after, the bilateral of the circular fan-out line pad of first row is cut the travelling expenses degree and has been reached b-a=75 μ m on the top layer, make the area of this circle fan-out line pad reduce greatly, and also making the big or small inhomogeneous of dish fan-out line pad and second row's fan-out line pad of winning after cutting the dish processing, this all might cause welding is caused bad.Therefore, cutting outside the dish processing, also need the area of revising back fan-out line pad is compensated, and make the area of the fan-out line pad after the compensation identical or roughly the same with the area of revising preceding fan-out line pad, for example area error can be in 0 to 10% scope, to realize the consistency of welding contact-making surface.Wherein, revising the step and the follow-up step that the area of revising back fan-out line pad is compensated of the shape of fan-out line pad on the described top layer can finish before being arranged on described top layer or other the board layer in described circuit board in the whole fan-out lines transfers at least one layer circuit board layer except that top layer, also can in described circuit board, the whole fan-out lines transfers at least one layer circuit board layer except that top layer finish after being arranged on described top layer or other board layer, perhaps carry out simultaneously.
Introduce three kinds of concrete compensation ways below, but be not limited to these three kinds, other any modes that can compensate the area of revising back fan-out line pad can adopt.
As shown in Figure 8, first kind of compensation way, at first the diameter with the fan-out line pad is extended to (b+2r) to form the circular fan-out line pad of diameter for (b+2r) by b, then this diameter is done for the circular fan-out line pad of (b+2r) and cut dish and handle, it is that to form left and right sides width be the Long Circle fan-out line pad of a for the circular fan-out line pad of (b+2r) that the part that eliminates the left and right sides makes diameter.The compensation of shaded area for amended fan-out line bonding pad area is made of ruling knits a net among Fig. 8, beat the fan-out line bonding pad area that eliminates when the hatched area that tilts towards the lower left compensates for not doing, wherein can control the value of r, so that the area of this compensation is identical with the area that eliminates or roughly the same, thereby make the area of the fan-out line pad after the compensation identical or roughly the same with the area of revising preceding fan-out line pad.
As shown in Figure 9, second kind of compensation way, keeping the diameter of fan-out line pad is that b is constant, on the above-below direction area of cutting the fan-out line pad after dish is handled is being compensated, promptly prolong the length of described fan-out line pad on above-below direction, the area of compensation is the shaded area of the ruling that knits a net among Fig. 9.Because area width on the left and right directions in Fig. 9 of this compensation is that a remains unchanged, therefore can control the length L of area on above-below direction of this compensation 1, so that the area of the fan-out line pad after the compensation is identical or roughly the same with the area of revising preceding fan-out line pad.At this compensation way, do not need to change its diameter when making the original fan-out line pad before cutting dish and handling, can use conventional BGA soldered ball to make, processing performance is good.
As shown in figure 10, the third compensation way, at first the diameter of fan-out line pad is contracted to a to form the circular fan-out line pad that diameter is a (need not do this moment cut dish handle) on this diameter is the circular fan-out line pad of a by b, on above-below direction shown in Figure 10, be that the area of the circular fan-out line pad of a compensates then to this diameter, promptly described pad lengthening is Long Circle, the area of compensation is the shaded area of the ruling that knits a net among Figure 10.Because area width on the left and right directions in Figure 10 of this compensation is that a remains unchanged, therefore can control the length L of area on above-below direction of this compensation 2, so that the area of the fan-out line pad after the compensation is identical or roughly the same with the area of revising preceding fan-out line pad.
After passing through above-mentioned compensation in the present embodiment, with described fan-out line pad compensation becoming Long Circle.But be not limited to this, also can compensate ovalisation or long polygon, wherein long polygon is preferably the long polygon of even number, as Long Hexagon, long octagon etc.And it should be noted that, and the line direction of described Long Circle, ellipse or the adjacent fan-out line pad with at least one of long polygonal short side direction is identical, promptly less at the above Long Circle of line direction, ellipse or the long polygonal width of described amended fan-out line pad and described adjacent fan-out line pad, there is fan-out line to pass between described amended fan-out line pad and the described adjacent fan-out line pad.
Based on same consideration, can also revise the shape of fan-out line via hole on described other the board layer in the present embodiment, and between the opposite edges of the inboard of two adjacent fan-out line via holes, form second at interval, described second allows to draw at least one velamen and shift the fan-out line that is provided with from increasing between described two adjacent fan-out line via holes at interval.Based on the same reason of above-mentioned fan-out line pad, can make amendment and the hole area of revising after the shape of crossing is compensated so that weld the contact-making surface unanimity the shape of fan-out line via hole.Wherein all the situation with described fan-out line pad is identical or similar for the shape that the modification of described fan-out line via hole, compensation and compensation back are formed etc., can come with reference to processing described fan-out line via hole is made identical or similar processing, not repeat them here described fan-out line pad.
Particularly, increase when drawing the fan-out line that is transferred setting, can only revise the shape of fan-out line pad on the top layer when only relating on top layer; On described other board layer, increase when drawing the fan-out line that is transferred setting when only relating to, can only revise the shape of fan-out line via hole on other board layers; And draw the fan-out line that is transferred setting, relate to and on described other board layer, increasing when drawing the fan-out line that is transferred setting when both relating to increasing on the top layer, can all make the shape of fan-out line via hole on the shape of fan-out line pad on the top layer and other board layers and revising and compensation.
Second kind of alter mode, modification is transferred the width of fan-out line between two adjacent fan-out line pads of setting, so as first between the two adjacent fan-out line pads allow at interval from increase between this two adjacent fan-out line pad draw at least one this be transferred the fan-out line of setting.
Particularly, first between the opposite edges of the inboard of two adjacent fan-out line pads can reduce from the width of each fan-out line of drawing between first row's the two adjacent fan-out line pads, so that can allow to increase the fan-out line of drawing at least one velamen transfer setting at interval.Wherein the BGA package design with the 0.5pitch specification is that example describes, under this specification, the spacing P=500 μ m of fan-out line pad, the diameter b of fan-out line pad=250 μ m, the spacing of each fan-out line, and the spacing between each fan-out line and the adjacent with it fan-out line pad is all identical and be c1=75 μ m.As shown in figure 11, in order between first row's two adjacent fan-out line pads, to draw two fan-out lines (wherein is to increase the fan-out line that is transferred setting of drawing), can reduce the width of these two fan-out lines in the horizontal direction.Particularly, identical and when being c2 when the width of two fan-out lines, there is P=b+3c1+2c2 to set up, promptly there are 500 μ m=250 μ m+3 * 75 μ m+2c2 to set up, can draw c2=12.5 μ m thus.After like this width of fan-out line being handled, described first can allow to draw the fan-out line that a velamen shifts setting from increasing between two adjacent fan-out line pads at interval.
Particularly, as shown in figure 11, when reducing the width of each fan-out line between the two adjacent fan-out line pads, can only reduce the fan-out line width in the presumptive area between the two adjacent fan-out line pads, and make the fan-out line width outside this presumptive area have original width.Can make the one section fan-out line that is positioned within this presumptive area have width smaller like this, and make each section fan-out line that is positioned at outside this presumptive area have bigger width, thereby make fan-out line have transmittability reliably.
Wherein, after whole fan-out lines at least one layer circuit board layer in described circuit board except that top layer shift and are arranged on described top layer or other the board layer, for example will reduce in this alter mode after fan-out line increase behind the width is arranged on the top layer, also need be coated with insulating layer coating being transferred on the fan-out line of setting, to avoid in welding process, making fan-out line and adjacent fan-out line pad to interconnect and cause short circuit.Particularly, the coverage of this insulating barrier can exceed this width that is transferred the fan-out line of setting, and the scope that surpasses can be selected according to actual conditions, can select the scope of 0 to 50 μ m as monolateral plussage, to reach mutual insulation purpose better.
Need to prove, not only can insulating barrier be set being transferred on the fan-out line of setting in the present embodiment, can also on other original fan-out lines, insulating barrier be set.And not only can on the fan-out line that produces under this second kind of alter mode, insulating barrier be set, can also under above-mentioned first kind of alter mode or on the fan-out line that produces under following the third alter mode that will illustrate, the 4th kind of alter mode or other alter modes of not elaborating insulating barrier be set all.
Similarly, can also revise the width of fan-out line between two adjacent fan-out line via holes that is transferred setting in the present embodiment, so as second between the two adjacent fan-out line via holes allow at interval from increase between this two adjacent fan-out line via hole draw at least one this be transferred the fan-out line of setting.Wherein revise identical or similar to fan-out line between the modification of the fan-out line between the two adjacent fan-out line via holes and the described two adjacent fan-out line pads, can come with reference to processing the fan-out line between the described fan-out line via hole is made identical or similar processing, not repeat them here the fan-out line between the described fan-out line pad.
Particularly, increase when drawing the fan-out line that is transferred setting, can only revise the fan-out line between the fan-out line pad on the top layer when only relating on top layer; On described other board layer, increase when drawing the fan-out line that is transferred setting when only relating to, can only revise the fan-out line between the fan-out line via hole on other board layers; And draw the fan-out line that is transferred setting, relate to and on described other board layer, increasing when drawing the fan-out line that is transferred setting when both relating to increasing on the top layer, can all make modification to the fan-out line between the fan-out line via hole on the fan-out line between the fan-out line pad on the top layer and other board layers.
The third alter mode, revise the spacing of each fan-out line between the two adjacent fan-out line pads on the described top layer and/or the spacing of each fan-out line and these two adjacent fan-out line pads, draw the fan-out line that at least one velamen shifts setting from increasing between this two adjacent fan-out line pad so that allow.
Be that example describes still below with the BGA package design of 0.4pitch specification, as shown in figure 12, reduce to increase the spacing between the fan-out line of drawing and the fan-out line pad adjacent in the horizontal direction with this fan-out line, wherein as the identical c1 of being of spacing that increases between the fan-out line draw and two fan-out line pads adjacent with this fan-out line, and during the width c2=75 μ m of the fan-out line that this increase is drawn, there is P=b+2c1+c2 to set up, promptly there are 400 μ m=250 μ m+2c1+75 μ m to set up, the spacing that increases like this between the fan-out line draw and two fan-out line pads adjacent with this fan-out line is decreased to c1=37.5 μ m by 75 μ m, this moment two adjacent fan-out line pads inboard opposite edges between first can allow at interval to draw a velamen and shift the fan-out line that is provided with from increasing between two adjacent fan-out line pads.
Similarly; Can also revise on described other the board layer each the fan-out line spacing between the two adjacent fan-out line via holes and/or the spacing of each fan-out line and these two adjacent fan-out line via holes in the present embodiment, draw at least one velamen and shift the fan-out line that is provided with from increasing between this two adjacent fan-out line via hole so that allow. are wherein identical or similar to the modification of the spacing of the spacing of the modification of each the fan-out line spacing between the two adjacent fan-out line via holes and/or each fan-out line and the spacing of these two adjacent fan-out line via holes and each fan-out line between the two adjacent fan-out line pads and/or each fan-out line and these two adjacent fan-out line pads; Can make identical or similar processing with the processing of the spacing of these two adjacent fan-out wire bonding dishes to the spacing of each the fan-out line spacing between the two adjacent fan-out line via holes and/or each fan-out line and these two adjacent fan-out line via holes with reference to spacing and/or each fan-out line to each the fan-out line between the two adjacent fan-out wire bonding dishes, not repeat them here.
Particularly, increase when drawing the fan-out line that is transferred setting, can only revise the spacing of each fan-out line between the two adjacent fan-out line pads on the top layer and/or the spacing of each fan-out line and these two adjacent fan-out line pads when only relating on top layer; On described other board layer, increase when drawing the fan-out line that is transferred setting when only relating to, can only revise the spacing of each fan-out line spacing between the two adjacent fan-out line via holes on other board layers and/or each fan-out line and these two adjacent fan-out line via holes; And draw the fan-out line that is transferred setting, relate to and on described other board layer, increasing when drawing the fan-out line that is transferred setting when both relating to increasing on the top layer, can all make modification to each the fan-out line spacing between the two adjacent fan-out line via holes and/or the spacing of each fan-out line and these two adjacent fan-out line via holes on the spacing of the spacing of each fan-out line between the two adjacent fan-out line pads on the top layer and/or each fan-out line and these two adjacent fan-out line pads and other board layers.
The 4th kind of alter mode, can be in conjunction with above-mentioned three kinds of alter modes, the shape of fan-out line pad, fan-out line width between two adjacent fan-out line pads and the spacing of each fan-out line between the two adjacent fan-out line pads and/or the spacing of each fan-out line and these two adjacent fan-out line pads are all made modification, draw at least one velamen and shift the fan-out line that is provided with from increasing between this two adjacent fan-out line pad so that allow.
As shown in figure 13, BGA package design with the 0.4pitch specification is that example describes below, at first on horizontal direction shown in Figure 13, first row's fan-out line pad done and cut dish and handle, is that the circle of b is revised as the Long Circle that width is a with the fan-out line pad by diameter, setting then increases the fan-out line width of drawing, the identical c that is of spacing of this fan-out line and adjacent two fan-out line pads, then should there be P=a+3c to set up, for example when the value of cutting dish processing back a is 220 μ m, then there are 400 μ m=220 μ m+3 * 60 μ m to set up, so just can draw the fan-out line that a velamen shifts setting from increasing between two adjacent fan-out line pads.
Therefore need to prove,, still need the area of amended fan-out line pad is compensated that what illustrate in the mode of compensation and the above-mentioned first kind of alter mode is identical owing to after cutting dish the area of fan-out line pad is reduced to some extent.
Under this alter mode, it is b-a=30 μ m (being 75 μ m under first kind of alter mode) that the bilateral of first row's fan-out line pad is cut the travelling expenses degree, the width of revising the back fan-out line is c=60 μ m (being 12.5 μ m under second kind of alter mode), the spacing of revising back fan-out line and two adjacent fan-out line pads is c=60 μ m (being 37.5 μ m under the third alter mode), contrast as can be seen, for the modification result who under the 4th kind of alter mode, makes, its index word is all comparatively balanced, the modification result that unlikely generation is extreme, be a kind of alter mode of comparatively optimizing, therefore can select for use in actual use by multiple alter mode as far as possible in conjunction with the modification result who makes.Wherein need to prove, the first, the width of fan-out line pad is too small for fear of revising after the shape, bilateral can be cut the travelling expenses degree and be limited in certain scope, as making b-a<50 μ m, preferably can make b-a<30 μ m.The second, the width of fan-out line is revised, can only make amendment to the width of the fan-out line part in certain zone between the adjacent fan-out line pad of two-phase, can keep original width to the fan-out line part in all the other zones.
Amending method in the foregoing description can participate in finishing by operating personnel, also can finish automatically by software.Therefore, one of ordinary skill in the art will appreciate that all or part of flow process that realizes in the foregoing description method, be to instruct relevant hardware to finish by computer program, described program can be stored in the computer read/write memory medium, this program can comprise the flow process as the embodiment of above-mentioned each side method when carrying out.Wherein, described storage medium can be magnetic disc, CD, read-only storage memory body (Read-Only Memory, ROM) or at random store memory body (Random Access Memory, RAM) etc.
In addition, the embodiment of the invention also provides a kind of circuit board.Wherein said circuit board comprises the board layer that multilayer is piled up mutually, and described circuit board has the structure of the fan-out degree of depth that reduces fan-out line on the circuit board, and the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.
The circuit board that provides in the present embodiment, because the fan-out degree of depth of fan-out line is relevant with the exponent number and the number of plies of circuit board on the circuit board, be that the fan-out degree of depth is big more, it is just many more for these fan-out line circuitry needed flaggy numbers are set, and it is also high more for the blind buried via hole exponent number that these fan-out lines adopt is set, even the blind buried via hole technology that needs the employing random layer to interconnect, therefore by reducing the fan-out degree of depth of fan-out line on the circuit board, can be reduced to these fan-out line circuitry needed flaggy numbers and blind buried via hole exponent number are set, to reach the purpose that reduces the circuit board exponent number and the number of plies.
Contrast is with reference to Fig. 2 and shown in Figure 6, in the present embodiment, with respect to original fan-out line of drawing between the two adjacent fan-out line pads on the top layer of described circuit board, increase leads to a fan-out line and (is not limited to one between two adjacent fan-out line pads on the top layer of this circuit board, if allowing can be more than two or two), this fan-out line is shifted by the fan-out line on the second layer board layer and is provided with.And on second layer board layer, be provided with by the 3rd layer circuit board and shift whole two fan-out lines that are provided with.With regard to the setting of fan-out line, the use that can omit the 3rd layer circuit board layer on the one hand can avoid being provided with the blind buried via hole that leads to this at least one layer circuit board layer on the other hand in circuit board, therefore reduced the exponent number and the number of plies of circuit board like this.Also promptly, described circuit board top layer has fan-out line, in the board layer except that top layer, has at least one deck not have fan-out line.
Except that drawing the fan-out line in the top layer increase, with respect to original fan-out line of drawing between the two adjacent fan-out line via holes on other board layers except that top layer in the described circuit board, also can increase between the two adjacent fan-out line via holes on other board layers in this circuit board except that top layer and draw at least one fan-out line.
Particularly, for the fan-out line pad on the top layer, draw at least one fan-out line in order can between two adjacent fan-out line pads, to increase, can:
Be fan-out line pad after revising shape at the fan-out line pad that increases the fan-out line both sides of drawing on the described top layer, the width of the fan-out line pad after the above modification shape of line direction of two adjacent fan-out line pads is less than the width of former fan-out line pad, and have first between the inboard opposite edges of the fan-out line pad after two adjacent these modification shapes at interval, this first allows to increase at interval and draws at least one fan-out line.Wherein, the area of the described fan-out line pad of revising shape with revise before the area of fan-out line pad identical or roughly the same, to guarantee the yields of welding.And the described fan-out line pad of revising shape is Long Circle, ellipse or long polygon etc.Also promptly, described top layer is provided with and is shaped as Long Circle, ellipse or long polygonal fan-out line pad, and described being shaped as between Long Circle, ellipse or the adjacent fan-out line pad with at least one of long polygonal fan-out line pad has fan-out line to pass; And described Long Circle, ellipse or long polygonal short side direction, with described be shaped as Long Circle, ellipse or grow the line direction of polygonal fan-out line pad and described adjacent fan-out line pad identical.
Perhaps, at the fan-out line that increases between the two adjacent fan-out line pads on the top layer of described circuit board after the fan-out line of drawing is to revise width.Also promptly, the fan-out line that between two adjacent fan-out line pads, passes, the width of the part between described two adjacent fan-out line pads is littler than the width of this fan-out line remainder.And can be coated with insulating layer coating on the fan-out line that described increase is drawn, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.Also promptly, be coated with insulating barrier on the fan-out line that passes between the two adjacent fan-out line pads, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.
Again or, the spacing of the spacing of the spacing between each fan-out line on the top layer of described circuit board and/or each fan-out line and adjacent with it fan-out line pad for revising, this spacing is feasible can increase draw at least one fan-out line between two adjacent fan-out line pads.
Correspondingly, for the fan-out line via hole on other the board layer, draw at least one fan-out line in order can between two adjacent fan-out line via holes, to increase, can:
Be the fan-out line via hole after revising shape at the fan-out line via hole that increases the fan-out line both sides of drawing on described other the board layer, the width of the fan-out line via hole after the above modification shape of line direction of two adjacent fan-out line via holes is less than the width of former fan-out line via hole, and have second between the inboard opposite edges of the fan-out line via hole after two adjacent these modification shapes at interval, this second allows to increase at interval and draws at least one fan-out line.Wherein, the area of the described fan-out line via hole of revising shape with revise before the area of fan-out line via hole identical or roughly the same, to guarantee the excellent contact performance.And the described fan-out line via hole of revising shape is Long Circle, circle, ellipse or regular polygon etc.Also be, have at least outside the described top layer on the board layer fan-out line is arranged, the described board layer that fan-out line arranged is provided with and is shaped as Long Circle, ellipse or long polygonal fan-out line via hole, described be shaped as Long Circle, ellipse or grow between the adjacent fan-out line via hole of polygonal fan-out line via hole with at least one have fan-out line to pass; And described Long Circle, ellipse or long polygonal short side direction, with described be shaped as Long Circle, ellipse or grow the line direction of polygonal fan-out line via hole and described adjacent fan-out line via hole identical.
Perhaps, increasing the fan-out line of drawing between the two adjacent fan-out line via holes on other board layers except that top layer in described circuit board is the fan-out line of revising width.Also be, be provided with the fan-out line via hole on the board layer that fan-out line is arranged in described circuit board except that top layer, the fan-out line that between two adjacent fan-out line via holes, passes, the width of the part between described two adjacent fan-out line pads is littler than the width of this fan-out line remainder.And can be coated with insulating layer coating on the fan-out line that described increase is drawn, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.Also promptly, be coated with insulating barrier on the fan-out line that passes between the two adjacent fan-out line via holes, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.
Again or, the spacing of the spacing of the spacing between each fan-out line on other board layers of described circuit board and/or each fan-out line and adjacent with it fan-out line via hole for revising, this spacing is feasible can increase draw at least one fan-out line between two adjacent fan-out line via holes.
In addition, the embodiment of the invention also provides a kind of electronic equipment, and the circuit board that is provided among the invention described above embodiment is provided this electronic equipment.
Because the circuit board among the electronic equipment embodiment of the present invention has identical technical characterictic with the circuit board among the circuit board embodiment of the present invention, therefore can produce identical technique effect, solves identical technical problem.
This electronic equipment can be for portable mobile termianl etc., as mobile phone or palmtop PC.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection range with claim.

Claims (20)

1. a circuit board designing method is characterized in that, described circuit board comprises the board layer that multilayer is piled up mutually, and described method comprises:
Reduce the fan-out degree of depth of fan-out line on the circuit board, the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.
2. circuit board designing method according to claim 1 is characterized in that, the described fan-out degree of depth that reduces fan-out line on the circuit board comprises:
Whole fan-out lines transfers at least one layer circuit board layer except that top layer in the described circuit board are arranged on described top layer or other the board layer.
3. circuit board designing method according to claim 2 is characterized in that, described method also comprises:
Revise the shape of the fan-out line pad on the described top layer, and between the opposite edges of the inboard of two adjacent fan-out line pads, form first at interval, described first allows to draw at least one velamen and shift the fan-out line that is provided with from increasing between described two adjacent fan-out line pads at interval;
And/or,
Revise the shape of fan-out line via hole on described other the board layer, and between the opposite edges of the inboard of two adjacent fan-out line via holes, form second at interval, described second allows to draw at least one velamen and shift the fan-out line that is provided with from increasing between described two adjacent fan-out line via holes at interval.
4. circuit board designing method according to claim 3 is characterized in that, described method also comprises:
Area to amended fan-out line pad compensates, and makes the area of the fan-out line pad after the compensation identical with the area of revising preceding fan-out line pad;
And/or,
Area to amended fan-out line via hole compensates, and makes the area of the fan-out line via hole after the compensation identical with the area of revising preceding fan-out line via hole.
5. circuit board designing method according to claim 4 is characterized in that,
With the described compensation becoming of fan-out line pad Long Circle, ellipse or long polygon, and the line direction of described Long Circle, ellipse or the adjacent fan-out line pad with at least one of long polygonal short side direction is identical, has fan-out line to pass between described amended fan-out line pad and the described adjacent fan-out line pad;
And/or,
With the described compensation becoming of fan-out line via hole Long Circle, ellipse or long polygon, and the line direction of described Long Circle, ellipse or the adjacent fan-out line via hole with at least one of long polygonal short side direction is identical, has fan-out line to pass between described amended fan-out line via hole and the described adjacent fan-out line via hole.
6. circuit board designing method according to claim 2 is characterized in that, also comprises:
Modification is transferred the width of fan-out line between two adjacent fan-out line pads of setting, so as first between the two adjacent fan-out line pads allow at interval from increase between this two adjacent fan-out line pad draw at least one this be transferred the fan-out line of setting;
And/or,
Modification is transferred the width of fan-out line between two adjacent fan-out line via holes of setting, so as second between the two adjacent fan-out line via holes allow at interval from increase between this two adjacent fan-out line via hole draw at least one this be transferred the fan-out line of setting.
7. circuit board designing method according to claim 6, it is characterized in that, after whole fan-out lines at least one layer circuit board layer in described circuit board except that top layer shifted and are arranged on described top layer or other the board layer, described method also comprised:
Be coated with insulating layer coating being transferred on the fan-out line of setting, the coverage of described insulating barrier exceeds this fan-out line that is transferred setting.
8. circuit board designing method according to claim 2 is characterized in that, also comprises:
Revise the spacing of each fan-out line between the two adjacent fan-out line pads on the described top layer and/or the spacing of each fan-out line and these two adjacent fan-out line pads, draw the fan-out line that at least one velamen shifts setting from increasing between this two adjacent fan-out line pad so that allow;
And/or,
Revise on described other the board layer each the fan-out line spacing between the two adjacent fan-out line via holes and/or the spacing of each fan-out line and these two adjacent fan-out line via holes, draw at least one velamen and shift the fan-out line that is provided with from increasing between this two adjacent fan-out line via hole so that allow.
9. circuit board, be characterised in that, described circuit board comprises the board layer that multilayer is piled up mutually, and described circuit board has the structure of the fan-out degree of depth that reduces fan-out line on the circuit board, and the described fan-out degree of depth is the number of plies that is distributed with the described board layer of fan-out line in the circuit board.
10. circuit board according to claim 9 is characterized in that,
Described circuit board top layer has fan-out line, in the board layer except that top layer, has at least one deck not have fan-out line.
11. circuit board according to claim 10, it is characterized in that: described top layer is provided with and is shaped as Long Circle, ellipse or long polygonal fan-out line pad, and described being shaped as between Long Circle, ellipse or the adjacent fan-out line pad with at least one of long polygonal fan-out line pad has fan-out line to pass; And described Long Circle, ellipse or long polygonal short side direction, with described be shaped as Long Circle, ellipse or grow the line direction of polygonal fan-out line pad and described adjacent fan-out line pad identical.
12., it is characterized in that according to claim 10 or 11 described circuit boards:
Have at least outside the described top layer on the board layer fan-out line is arranged, the described board layer that fan-out line arranged is provided with and is shaped as Long Circle, ellipse or long polygonal fan-out line via hole, described be shaped as Long Circle, ellipse or grow between the adjacent fan-out line via hole of polygonal fan-out line via hole with at least one have fan-out line to pass; And described Long Circle, ellipse or long polygonal short side direction, with described be shaped as Long Circle, ellipse or grow the line direction of polygonal fan-out line via hole and described adjacent fan-out line via hole identical.
13. circuit board according to claim 10 is characterized in that:
Described top layer is provided with the fan-out line pad;
The fan-out line that between two adjacent fan-out line pads, passes, the width of the part between described two adjacent fan-out line pads is littler than the width of this fan-out line remainder.
14., it is characterized in that according to claim 10 or 13 described circuit boards:
Be provided with the fan-out line via hole on the board layer that fan-out line is arranged in described circuit board except that top layer, the fan-out line that between two adjacent fan-out line via holes, passes, the width of the part between described two adjacent fan-out line pads is littler than the width of this fan-out line remainder.
15. circuit board according to claim 13 is characterized in that:
Be coated with insulating barrier on the fan-out line that passes between the two adjacent fan-out line pads, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.
16. circuit board according to claim 14 is characterized in that:
Be coated with insulating barrier on the fan-out line that passes between the two adjacent fan-out line via holes, the coverage of described insulating barrier exceeds the width of the fan-out line that described increase draws.
17. an electronic equipment is characterized in that: have in the described electronic equipment as claim 9,10,13,15 or described circuit board.
18. an electronic equipment is characterized in that: have in the described electronic equipment as claim 12 or described circuit board.
19. an electronic equipment is characterized in that: have in the described electronic equipment as claim 14 or described circuit board.
20. an electronic equipment is characterized in that: have in the described electronic equipment as claim 16 or described circuit board.
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Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103167736A (en) * 2011-12-16 2013-06-19 北大方正集团有限公司 Printed circuit board (PCB) compensation processing method, equipment and PCB
CN103514313A (en) * 2012-06-29 2014-01-15 联想(北京)有限公司 Method for processing information
CN107275365A (en) * 2016-04-05 2017-10-20 三星显示有限公司 Display device
CN111383932A (en) * 2018-12-30 2020-07-07 浙江宇视科技有限公司 Small-pitch BGA automatic wire outgoing method and device
CN112004315A (en) * 2020-08-21 2020-11-27 苏州浪潮智能科技有限公司 PCB and special-shaped bonding pad structure suitable for BGA chip thereof
CN112752398A (en) * 2020-11-24 2021-05-04 广州朗国电子科技有限公司 Chip bonding pad structure of PCB
CN114501849A (en) * 2022-04-15 2022-05-13 北京万龙精益科技有限公司 Improved design method of integrated circuit packaging bonding pad and bonding pad packaging library

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111885815A (en) * 2020-08-20 2020-11-03 苏州浪潮智能科技有限公司 PCB and pad structure suitable for narrow center distance BGA chip thereof

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784262A (en) * 1995-11-06 1998-07-21 Symbios, Inc. Arrangement of pads and through-holes for semiconductor packages
US6271478B1 (en) * 1997-11-19 2001-08-07 Shinko Electric Industries Co., Ltd. Multi-layer circuit board
CN201134977Y (en) * 2007-12-14 2008-10-15 福建星网锐捷网络有限公司 Circuit board
US20090146318A1 (en) * 2007-12-03 2009-06-11 Shinko Electric Industries Co., Ltd. Multilayer wiring board and semiconductor device
US7725860B1 (en) * 2000-06-19 2010-05-25 Herman Kwong Contact mapping using channel routing

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784262A (en) * 1995-11-06 1998-07-21 Symbios, Inc. Arrangement of pads and through-holes for semiconductor packages
US6271478B1 (en) * 1997-11-19 2001-08-07 Shinko Electric Industries Co., Ltd. Multi-layer circuit board
US7725860B1 (en) * 2000-06-19 2010-05-25 Herman Kwong Contact mapping using channel routing
US20090146318A1 (en) * 2007-12-03 2009-06-11 Shinko Electric Industries Co., Ltd. Multilayer wiring board and semiconductor device
CN201134977Y (en) * 2007-12-14 2008-10-15 福建星网锐捷网络有限公司 Circuit board

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103167736A (en) * 2011-12-16 2013-06-19 北大方正集团有限公司 Printed circuit board (PCB) compensation processing method, equipment and PCB
CN103167736B (en) * 2011-12-16 2015-10-14 北大方正集团有限公司 A kind of printed circuit board (PCB) compensation deals method, equipment and PCB
CN103514313A (en) * 2012-06-29 2014-01-15 联想(北京)有限公司 Method for processing information
CN107275365A (en) * 2016-04-05 2017-10-20 三星显示有限公司 Display device
CN111383932A (en) * 2018-12-30 2020-07-07 浙江宇视科技有限公司 Small-pitch BGA automatic wire outgoing method and device
CN111383932B (en) * 2018-12-30 2022-04-12 浙江宇视科技有限公司 Small-pitch BGA automatic wire outgoing method and device
CN112004315A (en) * 2020-08-21 2020-11-27 苏州浪潮智能科技有限公司 PCB and special-shaped bonding pad structure suitable for BGA chip thereof
CN112752398A (en) * 2020-11-24 2021-05-04 广州朗国电子科技有限公司 Chip bonding pad structure of PCB
CN114501849A (en) * 2022-04-15 2022-05-13 北京万龙精益科技有限公司 Improved design method of integrated circuit packaging bonding pad and bonding pad packaging library

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Address after: 523808 Southern Factory Building (Phase I) Project B2 Production Plant-5, New Town Avenue, Songshan Lake High-tech Industrial Development Zone, Dongguan City, Guangdong Province

Patentee after: Huawei Device Co., Ltd.

Address before: 523808 Southern Factory Building (Phase I) Project B2 Production Plant-5, New Town Avenue, Songshan Lake High-tech Industrial Development Zone, Dongguan City, Guangdong Province

Patentee before: HUAWEI terminal (Dongguan) Co., Ltd.