CN101312447B - Integral frequency bias and fine synchronization method and apparatus of receiver - Google Patents

Abstract

The invention discloses an integer frequency bias estimation and fine synchronization method of a receiver and discloses a device thereof, for processing integer frequency bias estimation on the received signals of different frame head sequence modes and carrier frequency bias. The method comprises that: (1) a receiver first processes synchronous capture on the received signals, to attain the coarse synchronization positions and the frame head modes of the received signals; (2) the receiver processes decimal frequency bias estimation on the received signals and then processes decimal frequency bias compensation on the received signals; (3) the receiver attains the real phase of the pseudo random sequence of the frame head with the frame head mode having phase rotation; (4) according to the coarse synchronization position, the frame head mode and the phase of the frame of the received signals, the receiver processes integer frequency bias estimation on the received signals after the decimal frequency bias compensation. The invention can realize integer frequency bias estimation on the receiver of a DTMB system, having better estimation performance and large estimation range.

Description

The integer frequency bias estimation of receiver and fine synchronization method and device

Technical field

The invention belongs to the ground digital television broadcast technical field, relate in particular to a kind of receiver integer frequency bias method of estimation and device, and carry out simultaneously that integer frequency bias is estimated and the method and apparatus of fine synchronization.

Background technology

2006 08 month; China has issued mandatory standard GB 20600-2006 " digital television ground broadcast transmission system frame structure, chnnel coding and modulation "; Thereby be through with for many years about digital TV ground transmission standard techniques arguement, and opened a fan gate for the industrialization process of subsequently terrestrial DTV.In the document usually with the abbreviation of DTMB (Digital Terrestrial/Television MultimediaBroadcasting) as the China Digital TV ground transmission standard.

The external main three item of digital TV ground transmission standards that exist in removing in the world at present.With the U.S. is that some main countries have adopted ATSC (Advanced Television System Committee) standard; With Europe is that some main countries have adopted DVB-T (Digital Video Broadcasting-Terrestrial) standard, and Japan has adopted ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) standard.Wherein, the ATSC standard is the single-carrier modulated pattern, and DVB-T standard and ISDB-T standard have then adopted multi-carrier OFDM (Orthogonal Frequency DivisionMultiplexing, OFDM) modulating mode.

With respect to other standard, the DTMB standard has exclusive characteristic, can simply be described below:

1) the DTMB standard is supported single-carrier modulated pattern and multi-carrier OFDM modulating mode simultaneously.

2) the DTMB standard does not adopt traditional OFDM modulation technique based on CP (Cyclic Prefix, Cyclic Prefix) sequence, but traditional CP sequence has been replaced to PN (Pseudo-randomNoise, pseudo random sequence) sequence.

3) the DTMB standard has adopted LDPC (Low-Density Parity-Check, low density parity check code) sign indicating number as channel coding schemes.

4) the frame head PN sequence of DTMB standard has three kinds: PN420, PN595 and PN945, represent that respectively frame head PN sequence comprises: 420 data symbols, 595 data symbols and 945 data symbols.

5) system information of DTMB standard has adopted spread spectrum protection.

After the receiver of DTMB system had obtained initial frame synchronization, the estimation of carrier wave frequency deviation just became a crucial task.The method of traditional solution DTMB system carrier frequency bias estimation problem usually is to utilize the double pilot signal of transmitting terminal emission to carry out estimation approach, or utilizes the PN sequence that is stored in receiver in advance and the PN sequence in transmitting to carry out the method etc. of cross correlation process.But the double pilot signal is as an option of DTMB standard, and the emission that may not be bound to if then do not launch, will cause carrier wave frequency deviation to be unable to estimate; In addition, cross-correlation method also exists the relatively poor shortcoming of estimated performance.In addition, other method of in the past mentioning in the DTMB document also exists the less shortcoming of estimation range.

The carrier wave frequency deviation of DTMB system receiver comprises two parts: integer frequency bias and decimal frequency bias; Thereby admissible a kind of method is; After decimal frequency bias and integer frequency bias estimated separately, the carrier wave frequency deviation of the DTMB system receiver of reentrying, still; How the integer frequency bias of DTMB system receiver is estimated, still present an open question.

In addition, in order to realize the fine synchronization of signal frame, be provided with independent method in the prior art.How in additive method, to realize fine synchronization, thereby reduce the complexity that fine synchronization is handled, become the problem that the technical staff need consider.

Summary of the invention

Integer frequency bias method of estimation and device that technical problem to be solved by this invention provides a kind of receiver carry out the estimation of integer frequency bias.

In order to solve the problems of the technologies described above, the invention provides a kind of integer frequency bias method of estimation of receiver, be used for said method comprising the steps of to having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out the integer frequency bias estimation:

(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

(2) receiver carries out the decimal frequency bias estimation to received signal, and after estimating decimal frequency bias, receives the decimal frequency bias compensation of signal;

(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;

(4) estimate carrying out integer frequency bias according to thick sync bit, frame head mode and the said phase place of the frame of said reception signal through the reception signal after the decimal frequency bias compensation;

Wherein, estimate carrying out integer frequency bias described in the step (4), may further comprise the steps through the signal after the decimal frequency bias compensation:

(401) from reception signal r (n) through the decimal frequency bias compensation, n=0,1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-I _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;

I _CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

(402) according to the frame head mode that calculates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence _Pn(n), length is P, and wherein the span of index n is 0～P-1;

(403) the power factor threshold T is set _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

(404) maximum power value that obtains all correlated serieses is P _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content of correlated series be P _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

(405) with P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, operation below then carrying out: upgrade receiver state, get into tracking mode; Confirm δ _IΔ B is integer frequency bias; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}, then integer frequency bias is estimated failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates successfully until integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

Further, the frame head mode of the signal of reception described in the step (1) is one of PN420, PN595 or PN945; Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.

Further, power factor threshold T in the step (403) _PowerConcrete value comprise 64.

Further, step (404) is specially and carries out following cycling:

Index k to the integer factor of integer frequency bias gets different values one by one, and the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer,, all carry out following step the value of k each time:

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

(a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

(b) to sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

(c) the sample point s of acquisition correlated series _Corr(l);

(d) obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

(e) obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value And average power

(f) afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is 0, δ _IInitial value is 0.

Further, described in the step (a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground _Pn(n) exp (j2 π k Δ Bn/F) multiply operation;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

Further, obtain the sample point s of correlated series described in the step (c) _Corr(l) step comprises:

Make

wherein, the operation of conj () expression complex conjugate.

Further, obtain power sequence P described in the step (e) _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And average power Concrete steps, comprising: the order

And order Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation.

Further, said undated parameter comprises and upgrades T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

In order to solve the problems of the technologies described above; The present invention also provides a kind of integer frequency bias estimation unit of receiver; Be used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out the integer frequency bias estimation, said device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain unit, integer frequency bias estimation unit;

Said synchronization acquistion unit links to each other with said decimal frequency bias estimation unit and said integer frequency bias estimation unit, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

The decimal frequency bias estimation unit links to each other with said synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

The decimal frequency bias compensating unit links to each other with said decimal frequency bias estimation unit, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains the unit, links to each other with said decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;

Said integer frequency bias estimation unit; Obtain the unit with said synchronization acquistion unit and said phase place and link to each other, be used for estimating carrying out integer frequency bias through the reception signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the said phase place of the frame that receives signal;

Wherein, said integer frequency bias estimation unit further comprises: performance number and the integer factor that data sequence interception unit, secondary processing sequence are chosen unit, power factor threshold settings unit, correlated series confirms that unit, comparing unit, updating block, integer frequency bias confirm the unit;

Said data sequence interception unit is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for the acquisition of said synchronization acquistion unit; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen the unit; Link to each other with said data sequence interception unit; The frame head mode and the said phase place that are used for going out according to said synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(n), length is P, and wherein the span of index n is 0～P-1;

Said power factor threshold settings unit is chosen the unit with said secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

The performance number and the integer factor of said correlated series are confirmed the unit, link to each other with said power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit confirms that with the performance number and the integer factor of said correlated series the unit links to each other, and is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}The time, undated parameter, and export an enable signal and confirm the unit to the performance number and the integer factor of said correlated series;

Said updating block links to each other with said comparing unit, is used to receive an enable signal of said comparing unit, upgrades receiver state, gets into tracking mode;

Said integer frequency bias is confirmed the unit, links to each other with said updating block, is used for confirming δ _IΔ B is an integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

Further, said phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.

Further, said power factor threshold settings unit is further used for the power factor threshold T _PowerConcrete value be set at 64.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that the unit all is used to carry out following operation;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

Obtain the sample point s of correlated series _Corr(l);

Obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And the average power of power sequence

Afterwards, carry out as judging and assign operation: if Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is 0; δ _IInitial value is 0.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order

To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order

And order And order

To obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation.

Further, said comparing unit is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

Integer frequency bias estimation and fine synchronization method and device that another technical problem to be solved by this invention provides a kind of receiver carry out the estimation of integer frequency bias, and accomplish the meticulous frame synchronization process of DTMB system simultaneously.

In order to solve the problems of the technologies described above; The integer frequency bias that the invention provides a kind of receiver is estimated and fine synchronization method; Be used for said method comprising the steps of to having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing:

(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

(2) receiver carries out the decimal frequency bias estimation to received signal, and after estimating decimal frequency bias, receives the decimal frequency bias compensation of signal;

(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;

(4) integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the said phase place of the frame of said reception signal;

Wherein, integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation described in the step (4), may further comprise the steps:

(401) from reception signal r (n) through the decimal frequency bias compensation, n=0,1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;

I _CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

(402) according to the frame head mode that estimates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence _Pn(n), length is P, and wherein the span of index n is 0～P-1;

(403) the power factor threshold T is set _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

(404) maximum power value that obtains all correlated serieses is P _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content of correlated series be P _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _IAnd maximum power value P _{Corr, max}Sample point index value I in the corresponding correlated series _{Corr, peak}

(405) with P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, operation below then carrying out: upgrade receiver state, get into tracking mode; Confirm δ _IΔ B is integer frequency bias; Confirm I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index of acquisition; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}, then integer frequency bias is estimated and the fine synchronization failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates and the fine synchronization success until integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

Further, the frame head mode of the signal of reception described in the step (1) is one of PN420, PN595 or PN945; Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.

Further, power factor threshold T in the step (403) _PowerConcrete value comprise 64.

Further, step (404) is specially and carries out following cycling:

Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and, all carry out following step the value of k each time;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

(a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

(b) to sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

(c) the sample point s of acquisition correlated series _Corr(l);

(d) obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

(e) obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

(f) carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is is 0; I _{Corr, peak}Initial value is 0; δ _IInitial value is 0.

Further, described in the step (a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground _Pn(n) exp (j2 π k Δ Bn/F) multiply operation;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

Further, obtain the sample point s of correlated series described in the step (c) _Corr(l) step comprises:

Make

wherein, the operation of conj () expression complex conjugate.

Further, obtain power sequence P described in the step (e) _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

Concrete steps, comprising: the order

And order

And order

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation.

Further, said undated parameter comprises and upgrades t _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

In order to solve the problems of the technologies described above; The present invention also provides a kind of integer frequency bias of receiver to estimate and the fine synchronization device; Be used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing, said device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain the unit, integer frequency bias is estimated and the fine synchronization unit;

Said synchronization acquistion unit; Estimate with said decimal frequency bias estimation unit and said integer frequency bias and the fine synchronization unit links to each other; Be used for handling the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal to carrying out synchronization acquistion to received signal;

The decimal frequency bias estimation unit links to each other with said synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

The decimal frequency bias compensating unit links to each other with said decimal frequency bias estimation unit, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains the unit, links to each other with said decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;

Said integer frequency bias is estimated and the fine synchronization unit; Link to each other with said synchronization acquistion unit and said phase place acquisition unit, be used for the reception signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the said phase place of the frame that receives signal;

Wherein, said integer frequency bias is estimated and the fine synchronization unit further comprises: performance number and the integer factor that data sequence interception unit, secondary processing sequence are chosen unit, power factor threshold settings unit, correlated series confirms that unit, comparing unit, updating block, integer frequency bias and fine synchronization confirm the unit;

Said data sequence interception unit is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode that receives signal, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for the acquisition of said synchronization acquistion unit; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen the unit; Link to each other with said data sequence interception unit; The frame head mode and the said phase place that are used for going out according to said synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(n), length is P, and wherein the span of index n is 0～P-1;

Said power factor threshold settings unit is chosen the unit with said secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

The performance number and the integer factor of said correlated series are confirmed the unit, link to each other with said power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses _{Corr, max}, and this maximum power value

Corresponding power sequence sample point index

And obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit confirms that with the performance number and the integer factor of said correlated series the unit links to each other, and is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}The time, undated parameter, and export an enable signal and confirm the unit to the performance number and the integer factor of said correlated series;

Said updating block links to each other with said comparing unit, is used to receive an enable signal of said comparing unit, upgrades receiver state, gets into tracking mode;

Said integer frequency bias and fine synchronization are confirmed the unit, link to each other with said updating block, are used for confirming δ _IΔ B is an integer frequency bias, and is used for confirming I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index that obtains;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

Further, said phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.

Further, said power factor threshold settings unit is further used for power factor threshold value t _PowerConcrete value be set at 64.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that the unit all carries out following processing;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

Obtain the sample point s of correlated series _Corr(l);

Obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value Corresponding power sequence sample point index

And the average power of power sequence

Afterwards, carry out as judging and assign operation: if Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is 0; I _{Corr, peak}Initial value is 0; δ _IInitial value is 0.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order

To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation.

Further, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order

And order

And order

To obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation.

Further, said comparing unit is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

Nonlinear Transformation in Frequency Offset Estimation problem to the DTMB receiver; The present invention proposes a kind of new integer frequency bias method of estimation and device to the DTMB system receiver; Can realize the integer frequency bias of DTMB system receiver is estimated, and have the advantages that estimated performance is good, estimation range is big.The present invention also provides a kind of at the method and apparatus that receiver is carried out carry out simultaneously when integer frequency bias is estimated fine synchronization, realizes handling when integer frequency bias is estimated with fine synchronization, and the method than independent fine synchronization is handled has the little advantage of complexity.In fact, the processing thought of this scheme for combining can be applied to all and the similar transmission system of DTMB system.

Fig. 1 is four layers of frame structure sketch map based on multi-frame of DTMB system.

Fig. 2 is the structural representation of the PN420 of DTMB standard.

Description of drawings

Fig. 3 is the structural representation of the PN945 of DTMB standard.

Fig. 4 is the constructive variation sketch map of the PN420 of DTMB standard.

Fig. 5 is the constructive variation sketch map of the PN945 of DTMB standard.

Fig. 6 is that the corresponding frame structure of three kinds of frame head modes has identical constructive variation sketch map.

Fig. 7 is the integer frequency bias method of estimation flow chart of receiver of the present invention.

Fig. 8 is the integer frequency bias estimation unit block diagram of receiver of the present invention.

Fig. 9 is the included integer frequency bias estimation unit structural representation of integer frequency bias estimation unit shown in Figure 8.

Figure 10 is that the integer frequency bias of receiver of the present invention is estimated and fine synchronization device block diagram.

Figure 11 is that the integer frequency bias of receiver shown in Figure 10 is estimated and the integer frequency bias of fine synchronization device is estimated and fine synchronization cellular construction sketch map.

Basic thought of the present invention is, the carrier frequency offset that exists between the transmitter and receiver is divided into integer frequency bias and decimal frequency bias, estimates decimal frequency bias earlier, estimates integer frequency bias again; Specifically, when the DTMB system obtain thick synchronously, estimate decimal frequency bias and carried out the decimal frequency bias compensation and known the frame head PN pattern and frame head PN sequence of transmitter emission after, just can carry out the estimation of integer frequency deviation.

The present invention has also proposed when estimating integer frequency bias, to accomplish the method and apparatus of the meticulous frame synchronization process of DTMB system.

Embodiment

Below in conjunction with accompanying drawing to a preferred embodiment of the present invention will be described in detail.

With reference to shown in Figure 1, be four layers of frame structure sketch map based on multi-frame of DTMB system, provided four layers of frame structure based on multi-frame of DTMB system.Can know that by Fig. 1 signal frame is the most basic transmission unit, comprise frame head and frame.Frame head is filled the PN sequence, and frame can be the data of single carrier mode, also can be the data of multi-carrier mode.Under multi-carrier mode, the size of IFFT (Inverse FastFourier Transform, inverse fast Fourier transform) is 3780 points.

Wherein, the length of frame head PN sequence has three kinds: 420 data symbols, 595 data symbols and 945 data symbols, thus there are three kinds of signal frame length accordingly.The structure of frame head sequence will be introduced following.The baseband sampling rate of DTMB system is 7.56MSPS (Mega-Samples-Per-Second, per second sample 1,000,000 times).Therefore, the time span of three kinds of corresponding PN frame head sequences is respectively 420/7.56=55.56 microsecond, 595/7.56=78.703 microsecond and 945/7.56=125 microsecond.And the time span of frame is 500 microseconds.Thereby the time span of each corresponding signal frame is respectively 555.56 microseconds, 578.703 microseconds and 625 microseconds.Be superframe on signal frame, the time span of each superframe is unified to be 125ms.Accordingly, a superframe comprises 225,216 and 200 signal frames respectively.For dividing frame, time span is one minute on the superframe.A branch frame comprises 480 superframes.Up be a day frame again, corresponding one day 24 hours.One day, frame comprised 1440 branch frames.

The building method of three kinds of PN frame head sequences is also inconsistent.Below in conjunction with Fig. 2 and Fig. 3 the structure of PN420 sequence and the structure of PN945 sequence are elaborated.

With reference to shown in Figure 2, the structural representation for the PN420 of DTMB standard has provided the structural representation of frame head PN420 sequence.In the middle of this sequence be the PN255 sequence, is the m sequence on one 8 rank, and reaching " 1 " through " 0 " to+1 value is the binary character of non-return-to-zero to the mapping transformation of-1 value.The PN420 sequence comprises synchronizing sequence (length is 83 symbols) behind a preamble sequence (length is 82 symbols), PN255 sequence and.Preamble sequence is the Cyclic Prefix sequence of PN255 sequence, and back synchronizing sequence is the cyclic suffix sequence of PN255 sequence.The PN255 sequence adopts linear feedback shift register, and (Linear Feedback Shift Register LFSR) generates, and the initial phase of different LFSR will generate different PN255 sequences.

With reference to shown in Figure 3, the structural representation for the PN945 of DTMB standard has provided the structural representation of frame head PN945 sequence.The structure of PN945 and the similar of PN420 all have preamble sequence and back synchronizing sequence.The intermediate sequence of PN945 sequence is a PN511 sequence, adopts the m sequence on one 9 rank to generate, and the mapping transformation to-1 value is the binary symbol sequence of non-return-to-zero to+1 value and " 1 " through " 0 " again.The concrete value of PN945 sequence also is variable, and is relevant with the initial phase of LFSR.And in order to reduce adjacent PN420 sequence or the correlation between the PN945 sequence, the DTMB standard has been arranged initial phase once through Computer Simulation specially meticulously.

Can know that by above narration the building method of PN420 and PN945 is the same, but the building method of the building method of PN595 and PN420 and PN945 differs widely.The PN595 sequence is to adopt 10 rank maximum length pseudo-random binary sequence brachymemmas to form, and is that length is preceding 595 chips of 1023 m sequence.And the initial phase of LFSR that generates the m sequence of this 1023 length is also fixed, and is 0000000001, and promptly the PN595 sequence that adopts of each signal frame is identical.Preceding 595 chips of pseudo random sequence, the mapping transformation to-1 value is the binary symbol sequence of non-return-to-zero to+1 value and " 1 " through " 0 ", is PN595 frame head sequence.

The form of expression of the frame head sequential structure of Fig. 2 and Fig. 3 is changed slightly, see Fig. 4 and Fig. 5.Fig. 4 is the constructive variation sketch map of the frame head PN420 of DTMB standard, and Fig. 5 is the constructive variation sketch map of the frame head PN945 of DTMB standard.

Can find out that from Fig. 4 and Fig. 5 PN420 sequence and PN945 sequence can be regarded the form of " CP+PN sequence " as, be respectively " the new PN255 sequence of the CP+ " form of Fig. 4 and " the new PN511 sequence of CP+ " form of Fig. 5.

Thereby three kinds of frame head sequences have all had identical form in the frame structure of DTMB system.

With reference to shown in Figure 6, be that three kinds of frame head structures have identical constructive variation sketch map.Can be known that by Fig. 6 three kinds of frame head structures have identical version, are the version of N+L+N, (L) at set intervals promptly just has same PN sequence to occur.For the PN420 frame head mode, L=90 symbol, N=165 symbol; For the PN595 frame head mode, L=3780 symbol, N=595 symbol; For the PN945 frame head mode, L=77 symbol, N=434 symbol.

With reference to shown in Figure 7, be the integer frequency bias method of estimation flow chart of receiver of the present invention.Said method comprising the steps of:

Step 701: receiver carries out synchronization acquistion at first to received signal to be handled, and obtains the thick sync bit of the frame of reception signal, and the frame head mode of said reception signal;

Said frame head mode is one of PN420, PN595 or PN945;

Step 702: receiver carries out decimal frequency bias to be estimated, and after estimating decimal frequency bias, receives the decimal frequency bias compensation of signal;

Step 703:, judge the concrete phase place of current frame head PN sequence to PN420 frame head mode that has the phase place rotation and the PN945 frame head mode that has the phase place rotation;

So that select for use the frame head PN sequence that is stored in local corresponding phase to estimate and fine synchronization with the integer frequency bias that carries out subsequently according to said concrete phase place.

Step 704: thick sync bit, frame head mode and said phase place according to the frame of said reception signal are estimated carrying out integer frequency bias through the signal after the decimal frequency bias compensation.

Carrying out to carry out the fine synchronization processing when integer frequency bias is estimated.

Be elaborated in the face of the described decimal frequency bias estimation method of step 702 down.

Said decimal frequency bias estimation method may further comprise the steps:

Step 101: at receiving terminal all frame head sequence patterns are divided into identical version: N+L+N, and make Δ B for

wherein F be the baseband sampling rate of system;

Step 102: receiver receives the reception signal that has carrier frequency offset, and said reception signal is carried out knowing the concrete frame head sequence pattern that transmitting terminal is launched after the synchronization acquistion, selects corresponding N, L according to said frame head sequence pattern;

Step 103: the autocorrelation operation of sliding to received signal, the output result of acquisition slip autocorrelation operation;

Step 104: the output result according to the autocorrelation operation of sliding to received signal, carry out the estimation of decimal frequency bias.

Narrate in detail in the face of the realization of above-mentioned decimal frequency bias estimation method flow process down.

The carrier frequency offset that exists between the transmitter and receiver can be designated as Δ fHz.Generally can carrier wave frequency deviation Δ f be carried out normalization and handle, i.e. δ=Δ f/ Δ B, wherein the definition of Δ B is seen after; Thereby δ=δ _I+ δ _f, δ _IThe expression integer (0 ,+-number), δ _fThe expression decimal, δ _IΔ B representes integer frequency bias, δ _fΔ B representes decimal frequency bias.Therefore, as long as estimate decimal δ _f(smaller or equal to 1) just can obtain decimal frequency bias δ _fΔ B.Simultaneously, as long as estimate integer δ _I, just can obtain integer frequency bias δ _IΔ B.

Because the baseband sampling rate F of DTMB system is 7.56MHz, definition

$\mathrm{\ΔB}=\frac{F}{N+L}\mathrm{Hz}$

Thereby, for the PN420 frame head mode, Δ B=7.5610 ³/ 255=29.647KHz; For the PN595 frame head mode, Δ B=7.5610 ³/ 4375=1.728KHz; For the PN945 frame head mode, Δ B=7.5610 ³/ 511=14.79452KHz.

Before estimating carrier wave frequency deviation, the DTMB receiver at first will be carried out the synchronization acquistion process.After accomplishing the synchronization acquistion process, just can obtain corresponding synchronous information, comprise the thick sync bit that obtains frame, and the acquisition transmitting terminal frame head PN sequence of launching is which kind of form one of (is in PN420, PN595 or three kinds of frame patterns of PN945).

Exist the reception signal of the simplification of carrier frequency offset to be expressed as:

r(k)＝s(k)·exp(j2πkδ/M)，k＝0，1，2，L

Wherein, s (k) expression transmits, and we put M is M=N+L;

Then, receive signal through a slip autocorrelator, the autocorrelation operation of sliding.

The functional description of slip autocorrelator is following:

$R\left(n\right)=\underset{i=0}{\overset{N-1}{\mathrm{\Σ}}}\mathrm{conj}\left(r(n+i)\right)r(N+L+n+i);$

Wherein, the sample of signal that r (n) expression receives, conjugate function is got in conj () expression, and R (n) is a sequence, the output result of expression autocorrelation operation, N carries out value, vide ut supra with L according to different frame head modes.

Secondly, the output result according to the slip autocorrelation operation carries out the calculating of decimal frequency bias, the decimal frequency bias result that promptly can obtain to estimate.

The calculating of decimal frequency bias is accomplished by the decimal frequency bias computing module, and the concrete treatment step of decimal frequency bias computing module is described below:

At first to auto-correlation output as a result R (n) sequence take absolute value, obtain the amplitude sequence of R (n) sequence | R (n) |; Secondly, search out | R (n) | the maximum of sequence is designated as max (| R (n) |), and remembers that this amplitude maximum corresponding index value is n _Max, and then obtain R (n _Max); The 3rd, get R (n _Max) phase place, be designated as θ.

Generally speaking, phase theta has following form

θ＝2πδ(N+L)/M

Because putting M is M=N+L, thereby

θ＝2πδ

Further, because the periodicity of phase place (being the cycle with 2 π certainly)

θ＝2πδ _f

At last, will

B multiplies each other with Δ, promptly obtains the decimal frequency bias δ that estimates _fΔ B.

Because the synchronization acquistion stage has been known the concrete PN frame head mode of transmitting terminal emission, therefore can directly select corresponding parameters such as N, L and Δ B for use.

Be elaborated in the face of the step of carrying out the integer frequency bias estimation in the step 704 down.

Because the baseband sampling rate F of DTMB system is 7.56MHz, and is same, definition

$\mathrm{\ΔB}=\frac{F}{N+L}\mathrm{Hz}$

Thereby, for the PN420 frame head mode, Δ B=7.5610 ³/ 255=29.647KHz; For the PN595 frame head mode, Δ B=7.5610 ³/ 4375=1.728KHz; For the PN945 frame head mode, Δ B=7.5610 ³/ 511=14.79452KHz.

The note receiver to the area requirement of integer frequency bias is-δ _{I, max}Δ B～+ δ _{I, max}Δ B, wherein δ _{I, max}＞0, be integer.

The integer frequency bias that provides the DTMB receiver that the present invention proposes is below estimated and the concrete treatment step of fine synchronization scheme.

The first step: from reception signal r (n) through the decimal frequency bias compensation, n=0,1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1.

Wherein, the length of frame head PN sequence is P baseband sample point (the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values);

I _CoarseThick sync bit (this thick sync bit has identified the starting point of the frame head PN sequence) index that treatment step obtains is caught in preamble for it; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for the DTMB system docking;

Second step: according to frame head mode that estimates and the PN sequence phase of judging, choose corresponding local frame head PN sequence, be designated as s as secondary processing sequence _Pn(n), length is P, and wherein the span of index n is 0～P-1;

The 3rd step: the power factor threshold T is set _Power, a concrete value can be 64; Perhaps, accordingly, the amplitude factor threshold T is set _Amp, wherein

The 4th step: carry out following circular treatment;

The maximum power value of remembering all correlated serieses is P _{Corr, max}, its initial value is changed to 0; Note is corresponding to maximum power value P _{Corr, max}The average power content of correlated series be P _{Corr, avg}, its initial value is changed to 0; Note maximum power value P _{Corr, max}Sample point index value in the corresponding correlated series is I _{Corr, peak}, its initial value is changed to 0; The corresponding integer factor of note integer frequency bias is δ _I, its initial value is changed to 0.

Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, and, all carry out following operation to the value of k each time;

Wherein, k Δ B representes the integer frequency bias that current circular treatment step is corresponding;

(a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and a kind of concrete performing step can be represented as follows: r is carried out on sample-by-sample ground _Pn(n) exp (j2 π k Δ Bn/F) multiply operation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz;

(b) to sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

(c) wherein, obtain the sample point s of correlated series _Corr(l) step can be described below:

Order $s_{\mathrm{Corr}}\left(l\right)=\underset{m=0}{\overset{P-1}{\mathrm{\Σ}}}\mathrm{Conj}\left(s_{\mathrm{Pn}}\left(m\right)\right)\·r_{\mathrm{Pn},2}(I_{\mathrm{Coarse}}-L_{\mathrm{Ds},\mathrm{Max}}+l+m);$

Wherein, conj () expression complex conjugate operation.

(d) obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

(e) obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value Corresponding power sequence sample point index

And the average power of power sequence

Concrete grammar can be

With

And

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation.

(f) carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k further carried out for the 5th step; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation.

The 5th step: if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, operation below then carrying out:

Upgrade receiver state, get into tracking mode; Confirm δ _IΔ B is integer frequency bias; Confirm I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index of acquisition;

Otherwise then integer frequency bias is estimated and the fine synchronization failure; Subsequently, upgrade some parameter such as T _PowerPerhaps δ _{I, max}Perhaps L _{Ds, max}Deng, receiver still continues to carry out above-mentioned integer frequency bias to be estimated and fine synchronization method, until success.

Certainly, if only need estimate integer frequency bias, handle and need not carry out fine synchronization, the correlation step of then in above-mentioned flow process, removing the fine synchronization processing gets final product, and has so just constituted another embodiment of the present invention, and the present invention repeats no more at this.

Below through Fig. 8, Fig. 9, Figure 10, Figure 11 respectively to of the present inventionly carrying out device that integer frequency bias estimates separately, carrying out that integer frequency bias is estimated and the device of fine synchronization is elaborated simultaneously.

With reference to shown in Figure 8, be the integer frequency bias estimation unit block diagram of receiver of the present invention.Said integer frequency bias estimation unit is used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out the integer frequency bias estimation, and said integer frequency bias estimation unit comprises: synchronization acquistion unit 80, decimal frequency bias estimation unit 81, decimal frequency bias compensating unit 82, phase place obtain unit 83, integer frequency bias estimation unit 84;

Said synchronization acquistion unit 80 links to each other with said decimal frequency bias estimation unit 81 and said integer frequency bias estimation unit 84, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

Decimal frequency bias estimation unit 81 links to each other with said synchronization acquistion unit 80, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

Decimal frequency bias compensating unit 82 links to each other with said decimal frequency bias estimation unit 81, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains unit 83, links to each other with said decimal frequency bias compensating unit 82, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates; Said phase place obtains unit 83, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode;

Said integer frequency bias estimation unit 84; Obtain unit 83 with said synchronization acquistion unit 80 and said phase place and link to each other, be used for estimating carrying out integer frequency bias through the reception signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the said phase place of the frame that receives signal.

With reference to shown in Figure 9, be the included integer frequency bias estimation unit structural representation of integer frequency bias estimation unit shown in Figure 8.Said integer frequency bias estimation unit 84 further comprises: performance number and the integer factor that data sequence interception unit 841, secondary processing sequence are chosen unit 842, power factor threshold settings unit 843, correlated series confirms that unit 844, comparing unit 845, updating block 846, integer frequency bias confirm unit 847;

Said data sequence interception unit 841 is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for 80 acquisitions of said synchronization acquistion unit; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen unit 842; Link to each other with said data sequence interception unit 841; The frame head mode and the said phase place that are used for estimating according to said synchronization acquistion unit 80 obtain the pseudo random sequence phase place that unit 83 obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(n), length is P, and wherein the span of index n is 0～P-1;

Said power factor threshold settings unit 843, said secondary processing sequence are chosen unit 842 and are linked to each other, and are used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein

Said power factor threshold settings unit 843 is further used for the power factor threshold T _PowerConcrete value be set at 64;

The performance number of said correlated series and integer factor are confirmed unit 844, link to each other with said power factor threshold settings unit 843, are used to obtain the maximum power value P of all correlated serieses _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit 845 confirms that with the performance number and the integer factor of said correlated series unit 844 links to each other, and is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block 846; Said comparing unit 845 is further used at P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}The time, undated parameter, and export an enable signal and confirm unit 844 to the performance number and the integer factor of said correlated series; Said comparing unit 845 is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any;

Said updating block 846 with said comparing unit 845, is used to receive an enable signal of said comparing unit 845, upgrades receiver state, gets into tracking mode;

Said integer frequency bias is confirmed unit 847, links to each other with said updating block 846, is used for confirming δ _IΔ B is an integer frequency bias;

The performance number of said correlated series and integer factor are confirmed unit 844, are further used for the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that unit 844 all carries out following operation;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 844, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation; Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}Obtain the sample point s of correlated series _Corr(l);

In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 844, are further used for order

To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation;

Obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And the average power of power sequence

In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 844, are further used for order And order

And order

To obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation;

Afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is is 0; δ _IInitial value is 0.

With reference to shown in Figure 10, for the integer frequency bias of receiver of the present invention is estimated and fine synchronization device block diagram.Said integer frequency bias is estimated and the fine synchronization device is used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing simultaneously, and said integer frequency bias is estimated and the fine synchronization device comprises: synchronization acquistion unit 90, decimal frequency bias estimation unit 91, decimal frequency bias compensating unit 92, phase place obtain unit 93, integer frequency bias is estimated and fine synchronization unit 94;

Said synchronization acquistion unit 90; Estimate with said decimal frequency bias estimation unit 91 and said integer frequency bias and fine synchronization unit 94 links to each other; Be used for carrying out to received signal synchronization acquistion and handle, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

Decimal frequency bias estimation unit 91 links to each other with said synchronization acquistion unit 90, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

Decimal frequency bias compensating unit 92 links to each other with said decimal frequency bias estimation unit 91, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains unit 93, links to each other with said decimal frequency bias compensating unit 92, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates; Said phase place obtains unit 93, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode;

Said integer frequency bias is estimated and fine synchronization unit 94; Link to each other with said synchronization acquistion unit 90 and said phase place acquisition unit 93, be used for the reception signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the said phase place of the frame that receives signal.

With reference to shown in Figure 11, be the integer frequency bias estimation of receiver shown in Figure 10 and the integer frequency bias estimation and the fine synchronization cellular construction sketch map of fine synchronization device.Said integer frequency bias is estimated and fine synchronization unit 94 further comprises: performance number and the integer factor that data sequence interception unit 941, secondary processing sequence are chosen unit 942, power factor threshold settings unit 943, correlated series confirms that unit 944, comparing unit 945, updating block 946, integer frequency bias and fine synchronization confirm unit 947;

Said data sequence interception unit 941 is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2, intercepting one piece of data sequence is designated as r as pending data sequence among the L _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for the acquisition of said synchronization acquistion unit; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen unit 942; Link to each other 941 with said data sequence interception unit; The frame head mode and the said phase place that are used for estimating according to said synchronization acquistion unit 90 obtain the pseudo random sequence phase place that unit 93 obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(n), length is P, and wherein the span of index n is 0～P-1;

Said power factor threshold settings unit 943 is chosen the unit with said secondary processing sequence and is linked to each other 942, is used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein

Said power factor threshold settings unit 943 is further used for the power factor threshold T _PowerConcrete value be set at 64;

The performance number of said correlated series and integer factor are confirmed unit 944, link to each other with said power factor threshold settings unit 943, are used to obtain the maximum power value P of all correlated serieses _{Corr, max}, and this maximum power value

Corresponding power sequence sample point index

And obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit 945 confirms that with the performance number and the integer factor of said correlated series the unit links to each other 944, is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block; Said comparing unit 945 is further used at P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}, undated parameter, and export an enable signal and confirm unit 944 to the performance number and the integer factor of said correlated series; Said comparing unit 945 is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any;

Said updating block 946 links to each other with said comparing unit 945, is used to receive an enable signal of said comparing unit, upgrades receiver state, gets into tracking mode;

Said integer frequency bias and fine synchronization are confirmed unit 947, link to each other with said updating block 946, are used for confirming δ _IΔ B is an integer frequency bias, and is used for confirming I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index that obtains;

The performance number of said correlated series and integer factor are confirmed unit 944, are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that the unit all is used to carry out following operation;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 944, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation;

Wherein exp (x) representes e ^xOperation, e=2.71828K, j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1, L, 2L _{Ds, max}

Obtain the sample point s of correlated series _Corr(l);

In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 944, are further used for order

To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation;

Obtain correlated series s _Corr(l), l=0,1, L, 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1, L, 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

In the present embodiment, the performance number of said correlated series and integer factor are confirmed unit 944, are further used for order And order And order To obtain power sequence P _Corr(l), l=0,1, L, 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () representes to average operation;

Afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is is 0; I _{Corr, peak}Initial value is 0; δ _IInitial value is 0.

It should be noted last that above embodiment is only unrestricted in order to technical scheme of the present invention to be described, the modification that those of ordinary skill in the art carries out technical scheme of the present invention perhaps is equal to replacement, all is encompassed in the middle of the claim scope of the present invention.

Claims (32)

1. the integer frequency bias method of estimation of a receiver is used for it is characterized in that having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out the integer frequency bias estimation, said method comprising the steps of:

(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

(2) receiver carries out the decimal frequency bias estimation to received signal, and after estimating decimal frequency bias, receives the decimal frequency bias compensation of signal;

(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;

(4) estimate carrying out integer frequency bias according to thick sync bit, frame head mode and the said phase place of the frame of said reception signal through the reception signal after the decimal frequency bias compensation;

Wherein, estimate carrying out integer frequency bias described in the step (4), may further comprise the steps through the signal after the decimal frequency bias compensation:

(401) from reception signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;

I _CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

(402) according to the frame head mode that calculates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence _Pn(m), length is P, and wherein the span of index m is 0～P-1;

(403) the power factor threshold T is set _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

(404) to sequence r _Pn(n) do the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n); To sequence r _{Pn, 2}(n) and sequence s _Pn(m) do associative operation, obtain correlated series; N=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1, m=0～P-1;

The maximum power value that obtains all correlated serieses is P _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content of correlated series be P _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

(405) with P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, operation below then carrying out: upgrade receiver state, get into tracking mode; Confirm δ _IΔ B is integer frequency bias; If P _{Coor, max}Smaller or equal to T _PowerP _{Corr, avg}, then integer frequency bias is estimated failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates successfully until integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

2. the method for claim 1 is characterized in that, the frame head mode that receives signal described in the step (1) is one of PN420, PN595 or PN945; Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.

3. the method for claim 1 is characterized in that, power factor threshold T in the step (403) _PowerConcrete value comprise 64.

4. the method for claim 1 is characterized in that, step (404) is specially carries out following cycling:

Index k to the integer factor of integer frequency bias gets different values one by one, and the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer,, all carry out following step the value of k each time:

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

(a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

(b) to sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1 ..., 2L _{Ds, max}

(c) the sample point s of acquisition correlated series _Corr(l); L=0,1 ..., 2L _{Ds, max}

(d) obtain correlated series s _Corr(l), l=0,1 ..., 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1 ..., 2L _{Ds, max}

(e) obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And average power

(f) afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is 0, δ _IInitial value is 0.

5. method as claimed in claim 4 is characterized in that, described in the step (a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground _Pn(n) exp (j2 π k Δ Bn/F) multiply operation;

Wherein exp (x) representes e ^xOperation, e=2.71828..., j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

6. like claim 4 or 5 described methods, it is characterized in that, obtain the sample point s of correlated series described in the step (c) _Corr(l) step comprises:

Order $s_{\mathrm{Corr}}\left(l\right)=\underset{m=0}{\overset{P-1}{\mathrm{\Σ}}}\mathrm{Conj}\left(s_{\mathrm{Pn}}\left(m\right)\right)\·r_{\mathrm{Pn},2}(I_{\mathrm{Coarse}}-L_{\mathrm{Ds},\mathrm{Max}}+l+m);$ Wherein, conj () expression complex conjugate operation.

7. method as claimed in claim 6 is characterized in that, obtains power sequence P described in the step (e) _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And average power

Concrete steps, comprising: the order $P_{\mathrm{Corr},\mathrm{Max}}^t={\mathrm{Max}}_{l=0}^{2\·L_{\mathrm{Ds},\mathrm{Max}}}\left(P_{\mathrm{Corr}}\left(l\right)\right)$ And order $P_{\mathrm{Corr},\mathrm{Avg}}^t=\mathrm{Mean}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () representes to average operation.

8. the method for claim 1 is characterized in that, said undated parameter comprises and upgrades T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

9. the integer frequency bias estimation unit of a receiver; Be used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out the integer frequency bias estimation; It is characterized in that said device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain unit, integer frequency bias estimation unit;

Said synchronization acquistion unit links to each other with said decimal frequency bias estimation unit and said integer frequency bias estimation unit, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

The decimal frequency bias estimation unit links to each other with said synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

The decimal frequency bias compensating unit links to each other with said decimal frequency bias estimation unit, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains the unit, links to each other with said decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;

Said integer frequency bias estimation unit; Obtain the unit with said synchronization acquistion unit and said phase place and link to each other, be used for estimating carrying out integer frequency bias through the reception signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the said phase place of the frame that receives signal;

Wherein, said integer frequency bias estimation unit further comprises: performance number and the integer factor that data sequence interception unit, secondary processing sequence are chosen unit, power factor threshold settings unit, correlated series confirms that unit, comparing unit, updating block, integer frequency bias confirm the unit;

Said data sequence interception unit is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for the acquisition of said synchronization acquistion unit; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen the unit; Link to each other with said data sequence interception unit; The frame head mode and the said phase place that are used for going out according to said synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(m), length is P, and wherein the span of index m is 0～P-1;

Said power factor threshold settings unit is chosen the unit with said secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein

The performance number and the integer factor of said correlated series are confirmed the unit, link to each other with said power factor threshold settings unit, are used for sequence r _Pn(n) do the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n); To sequence r _{Pn, 2}(n) and sequence s _Pn(m) do associative operation, obtain correlated series; N=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1, m=0～P-1; Obtain the maximum power value P of all correlated serieses _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit confirms that with the performance number and the integer factor of said correlated series the unit links to each other, and is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}The time, undated parameter, and export an enable signal and confirm the unit to the performance number and the integer factor of said correlated series;

Said updating block links to each other with said comparing unit, is used to receive an enable signal of said comparing unit, upgrades receiver state, gets into tracking mode;

Said integer frequency bias is confirmed the unit, links to each other with said updating block, is used for confirming δ _IΔ B is an integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

10. device as claimed in claim 9 is characterized in that, said phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.

11. device as claimed in claim 9 is characterized in that, said power factor threshold settings unit is further used for the power factor threshold T _PowerConcrete value be set at 64.

12. device as claimed in claim 11 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that the unit all carries out following operation;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _On(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l) l=0,1 ..., 2L _{Ds, max}

Obtain the sample point s of correlated series _Corr(l); L=0,1 ..., 2L _{Ds, max}

Obtain correlated series s _Corr(l), l=0,1 ..., 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1 ..., 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And the average power of power sequence

Afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation

δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is put and is 0; δ _IInitial value is 0.

13. device as claimed in claim 12 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation;

Wherein exp (x) representes e ^xOperation, e=2.71828..., j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

14. device as claimed in claim 13 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order $s_{\mathrm{Corr}}\left(l\right)=\underset{m=0}{\overset{P-1}{\mathrm{\Σ}}}\mathrm{Conj}\left(s_{\mathrm{Pn}}\left(m\right)\right)\·r_{\mathrm{Pn},2}(I_{\mathrm{Coarse}}-L_{\mathrm{Ds},\mathrm{Max}}+l+m),$ To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation.

15. device as claimed in claim 14 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order $P_{\mathrm{Corr},\mathrm{Max}}^t={\mathrm{Max}}_{l=0}^{2\·L_{\mathrm{Ds},\mathrm{Max}}}\left(P_{\mathrm{Corr}}\left(l\right)\right)$ And order $I_{\mathrm{Corr},\mathrm{Peak}}^t=\mathrm{Arg}\mathrm{Max}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ And order $P_{\mathrm{Corr},\mathrm{Avg}}^t=\mathrm{Mean}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ To obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () representes to average operation.

16. device as claimed in claim 9 is characterized in that, said comparing unit is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

17. the integer frequency bias of a receiver is estimated and fine synchronization method; Be used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing; It is characterized in that, said method comprising the steps of:

(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal;

(2) receiver carries out the decimal frequency bias estimation to received signal, and after estimating decimal frequency bias, receives the decimal frequency bias compensation of signal;

(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;

(4) integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the said phase place of the frame of said reception signal;

Wherein, integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation described in the step (4), may further comprise the steps:

(401) from reception signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;

I _CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L _{Ds, max}Receive the requirement of the maximum delay expansion of machine for system docking;

(402) according to the frame head mode that estimates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence _Pn(m), length is P, and wherein the span of index m is 0～P-1;

(403) the power factor threshold T is set _Power, the amplitude factor threshold T perhaps is set _Amp, wherein $T_{\mathrm{Amp}}=\sqrt{T_{\mathrm{Power}}};$

(404) to sequence r _Pn(n) do the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n); To sequence r _{Pn, 2}(n) and sequence s _Pn(m) do associative operation, obtain correlated series; N=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1, m=0～P-1;

The maximum power value that obtains all correlated serieses is P _{Corr, max}, and obtain corresponding to maximum power value P _{Corr, max}The average power content of correlated series be P _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _IAnd maximum power value P _{Corr, max}Sample point index value I in the corresponding correlated series _{Corr, peak}

(405) with P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, operation below then carrying out: upgrade receiver state, get into tracking mode; Confirm δ _IΔ B is integer frequency bias; Confirm I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index of acquisition; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}, then integer frequency bias is estimated and the fine synchronization failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates and the fine synchronization success until integer frequency bias;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

18. method as claimed in claim 17 is characterized in that, the frame head mode that receives signal described in the step (1) is one of PN420, PN595 or PN945; Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.

19. method as claimed in claim 17 is characterized in that, power factor threshold T in the step (403) _PowerConcrete value comprise 64.

20. method as claimed in claim 17 is characterized in that, step (404) is specially carries out following cycling:

Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and, all carry out following step the value of k each time;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

(a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

(b) to sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1 ..., 2L _{Ds, max}

(c) the sample point s of acquisition correlated series _Corr(l); L=0,1 ..., 2L _{Ds, max}

(d) obtain correlated series s _Corr(l), l=0,1 ..., 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1 ..., 2L _{Ds, max}

(e) obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And this maximum power value Corresponding power sequence sample point index

And the average power of power sequence

(f) carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation $P_{\mathrm{Corr},\mathrm{Max}}=P_{\mathrm{Corr},\mathrm{Max}}^t;P_{\mathrm{Corr},\mathrm{Avg}}=P_{\mathrm{Corr},\mathrm{Avg}}^t;I_{\mathrm{Corr},\mathrm{Peak}}=I_{\mathrm{Corr},\mathrm{Peak}}^t;$ δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}Initial value is 0; I _{Corr, peak}Initial value is 0; δ _IInitial value is 0.

21. method as claimed in claim 20 is characterized in that, described in the step (a) to sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground _Pn(n) exp (j2 π k Δ Bn/F) multiply operation;

Wherein exp (x) representes e ^xOperation, e=2.71828..., j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

22. like claim 20 or 21 described methods, it is characterized in that, obtain the sample point s of correlated series described in the step (c) _Corr(l) step comprises:

Order $s_{\mathrm{Corr}}\left(l\right)=\underset{m=0}{\overset{P-1}{\mathrm{\Σ}}}\mathrm{Conj}\left(s_{\mathrm{Pn}}\left(m\right)\right)\·r_{\mathrm{Pn},2}(I_{\mathrm{Coarse}}-L_{\mathrm{Ds},\mathrm{Max}}+l+m);$ Wherein, conj () expression complex conjugate operation.

23. method as claimed in claim 22 is characterized in that, obtains power sequence P described in the step (e) _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And this maximum power value

Corresponding power sequence sample point index

And the average power of power sequence

Concrete steps, comprising: the order $P_{\mathrm{Corr},\mathrm{Max}}^t={\mathrm{Max}}_{l=0}^{2\·L_{\mathrm{Ds},\mathrm{Max}}}\left(P_{\mathrm{Corr}}\left(l\right)\right)$ And order $I_{\mathrm{Corr},\mathrm{Peak}}^t=\mathrm{Arg}\mathrm{Max}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ And order $P_{\mathrm{Corr},\mathrm{Avg}}^t=\mathrm{Mean}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () representes to average operation.

24. method as claimed in claim 17 is characterized in that, said undated parameter comprises and upgrades T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

25. the integer frequency bias of a receiver is estimated and the fine synchronization device; Be used for having different frame header sequence pattern and existing the reception signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing; It is characterized in that said device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain the unit, integer frequency bias is estimated and the fine synchronization unit;

Said synchronization acquistion unit; Estimate with said decimal frequency bias estimation unit and said integer frequency bias and the fine synchronization unit links to each other; Be used for handling the thick sync bit of the frame of acquisition reception signal and the frame head mode of said reception signal to carrying out synchronization acquistion to received signal;

The decimal frequency bias estimation unit links to each other with said synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out reception signal after the synchronization acquistion;

The decimal frequency bias compensating unit links to each other with said decimal frequency bias estimation unit, is used for after estimating decimal frequency bias, receiving the decimal frequency bias compensation of signal;

Said phase place obtains the unit, links to each other with said decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;

Said integer frequency bias is estimated and the fine synchronization unit; Link to each other with said synchronization acquistion unit and said phase place acquisition unit, be used for the reception signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the said phase place of the frame that receives signal

Wherein, said integer frequency bias is estimated and the fine synchronization unit further comprises: performance number and the integer factor that data sequence interception unit, secondary processing sequence are chosen unit, power factor threshold settings unit, correlated series confirms that unit, comparing unit, updating block, integer frequency bias and fine synchronization confirm the unit;

Said data sequence interception unit is used for from the reception signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence _Pn(n), wherein the span of the index n of sample of signal is I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode that receives signal, is one of 420,595 or 945 3 values; I _CoarseThick sync bit index for the acquisition of said synchronization acquistion unit; L _{Ds, ax}Receive the requirement of the maximum delay expansion of machine for system docking;

Said secondary processing sequence is chosen the unit; Link to each other with said data sequence interception unit; The frame head mode and the said phase place that are used for going out according to said synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains; Choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s _Pn(m), length is P, and wherein the span of index m is 0～P-1;

Said power factor threshold settings unit is chosen the unit with said secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T _Power, the amplitude factor threshold T perhaps is set _Amp, wherein

The performance number and the integer factor of said correlated series are confirmed the unit, link to each other with said power factor threshold settings unit, are used for sequence r _Pn(n) do the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n); To sequence r _{Pn, 2}(n) and sequence s _Pn(m) do associative operation, obtain correlated series; N=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1, m=0～P-1; Obtain the maximum power value P of all correlated serieses _{Corr, max}, and this maximum power value

Corresponding power sequence sample point index And obtain corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, avg}, and the corresponding integer factor δ of definite integer frequency bias _I

Said comparing unit confirms that with the performance number and the integer factor of said correlated series the unit links to each other, and is used for P _{Corr, max}With T _PowerP _{Corr, avg}Compare, if P _{Corr, max}Greater than T _PowerP _{Corr, avg}, then export an enable signal to updating block; If P _{Corr, max}Smaller or equal to T _PowerP _{Corr, avg}The time, undated parameter, and export an enable signal and confirm the unit to the performance number and the integer factor of said correlated series;

Said updating block links to each other with said comparing unit, is used to receive an enable signal of said comparing unit, upgrades receiver state, gets into tracking mode;

Said integer frequency bias and fine synchronization are confirmed the unit, link to each other with said updating block, are used for confirming δ _IΔ B is an integer frequency bias, and is used for confirming I _Coarse+ I _{Corr, peak}-L _{Ds, max}Be the fine synchronization location index that obtains;

Wherein, the frame head sequence of all patterns is divided into identical version: every length at a distance from L symbol, and just there is same PN sequence to occur, the length of said PN sequence is N symbol;

wherein, F is the baseband sampling rate of system.

26. device as claimed in claim 25 is characterized in that, said phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.

27. device as claimed in claim 25 is characterized in that, said power factor threshold settings unit is further used for the power factor threshold T _PowerConcrete value be set at 64.

28. device as claimed in claim 27 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ _{I, max}To+δ _{I, max}Between integer, δ _{I, max}Represent maximum positive integer, and to the value of k each time, the performance number of said correlated series and integer factor confirm that the unit all carries out following processing;

K Δ B representes the integer frequency bias that current circular treatment is corresponding;

To sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r _Pn(n) be r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1;

To sequence r _{Pn, 2}(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 and sequence s _Pn(m), m=0～P-1 does associative operation, obtains correlated series, is designated as sequence s _Corr(l), l=0,1 ..., 2L _{Ds, max}

Obtain the sample point s of correlated series _Corr(l); L=0,1 ..., 2L _{Ds, max}

Obtain correlated series s _Corr(l), l=0,1 ..., 2L _{Ds, max}Power sequence P _Corr(l)=| s _Corr(l) | ², l=0,1 ..., 2L _{Ds, max}

Obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And this maximum power value Corresponding power sequence sample point index

And the average power of power sequence

Afterwards, carry out as judging and assign operation: if

Greater than P _{Corr, max}, then carry out following assign operation $P_{\mathrm{Corr},\mathrm{Max}}=P_{\mathrm{Corr},\mathrm{Max}}^t;P_{\mathrm{Corr},\mathrm{Avg}}=P_{\mathrm{Corr},\mathrm{Avg}}^t;I_{\mathrm{Corr},\mathrm{Peak}}=I_{\mathrm{Corr},\mathrm{Peak}}^t;$ δ _I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;

Wherein, the maximum power value P of all correlated serieses _{Corr, max}And corresponding to maximum power value P _{Corr, max}The average power content P of correlated series _{Corr, max}Initial value is put and is 0; I _{Corr, peak}Initial value is 0; δ _IInitial value is 0.

29. device as claimed in claim 28 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for sample-by-sample ground and carry out r _Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r _Pn(n), n=I _Coarse-L _{Ds, max}～I _Coarse+ L _{Ds, max}+ P-1 does the integer frequency bias compensation;

Wherein exp (x) representes e ^xOperation, e=2.71828..., j represent plural indicator, F representes the baseband sampling rate, is 7.56MHz.

30. device as claimed in claim 29 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order $s_{\mathrm{Corr}}\left(l\right)=\underset{m=0}{\overset{P-1}{\mathrm{\Σ}}}\mathrm{Conj}\left(s_{\mathrm{Pn}}\left(m\right)\right)\·r_{\mathrm{Pn},2}(I_{\mathrm{Coarse}}-L_{\mathrm{Ds},\mathrm{Max}}+l+m),$ To obtain the sample point s of correlated series _Corr(l);

Wherein, conj () expression complex conjugate operation.

31. device as claimed in claim 30 is characterized in that, the performance number and the integer factor of said correlated series are confirmed the unit, are further used for order $P_{\mathrm{Corr},\mathrm{Max}}^t={\mathrm{Max}}_{l=0}^{2\·L_{\mathrm{Ds},\mathrm{Max}}}\left(P_{\mathrm{Corr}}\left(l\right)\right)$ And order $I_{\mathrm{Corr},\mathrm{Peak}}^t=\mathrm{Arg}\mathrm{Max}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ And order $P_{\mathrm{Corr},\mathrm{Avg}}^t=\mathrm{Mean}\left(P_{\mathrm{Corr}}\left(l\right)\right),$ To obtain power sequence P _Corr(l), l=0,1 ..., 2L _{Ds, max}Maximum power value

And this maximum power value Corresponding power sequence sample point index

And the average power of power sequence

Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () representes to average operation.

32. device as claimed in claim 25 is characterized in that, said comparing unit is further used for upgrading T _Power, δ _{I, max}Perhaps L _{Ds, max}In any one or two or more combination in any, δ _{I, max}Represent maximum positive integer.

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