CN101312447A - Integral frequency bias and fine synchronization method and apparatus of receiver - Google Patents
Integral frequency bias and fine synchronization method and apparatus of receiver Download PDFInfo
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Abstract
The invention discloses an integer frequency bias estimation and fine synchronization method of a receiver and discloses a device thereof, for processing integer frequency bias estimation on the received signals of different frame head sequence modes and carrier frequency bias. The method comprises that: (1) a receiver first processes synchronous capture on the received signals, to attain the coarse synchronization positions and the frame head modes of the received signals; (2) the receiver processes decimal frequency bias estimation on the received signals and then processes decimal frequency bias compensation on the received signals; (3) the receiver attains the real phase of the pseudo random sequence of the frame head with the frame head mode having phase rotation; (4) according to the coarse synchronization position, the frame head mode and the phase of the frame of the received signals, the receiver processes integer frequency bias estimation on the received signals after the decimal frequency bias compensation. The invention can realize integer frequency bias estimation on the receiver of a DTMB system, having better estimation performance and large estimation range.
Description
Technical field
The invention belongs to the ground digital television broadcast technical field, relate in particular to a kind of integer frequency bias method of estimation of receiver and device, and carry out simultaneously that integer frequency bias is estimated and the method and apparatus of fine synchronization.
Background technology
2006 08 month, China has issued mandatory standard GB 20600-2006 " digital television ground broadcast transmission system frame structure, chnnel coding and modulation ", thereby be through with for many years about digital TV ground transmission standard techniques arguement, and opened a fan gate for the industrialization process of subsequently terrestrial DTV.In the document usually with the abbreviation of DTMB (Digital Terrestrial/Television MultimediaBroadcasting) as the China Digital TV ground transmission standard.
The external main three item of digital TV ground transmission standards that exist in removing in the world at present.Some countries based on the U.S. have adopted ATSC (Advanced Television System Committee) standard, some countries based on Europe have adopted DVB-T (Digital Video Broadcasting-Terrestrial) standard, and Japan has adopted ISDB-T (Integrated Services Digital Broadcasting-Terrestrial) standard.Wherein, the ATSC standard is the single-carrier modulated pattern, and DVB-T standard and ISDB-T standard have then adopted multi-carrier OFDM (Orthogonal Frequency DivisionMultiplexing, OFDM) modulating mode.
With respect to other standard, the DTMB standard has exclusive feature, can be briefly described as follows:
1) the DTMB standard is supported single-carrier modulated pattern and multi-carrier OFDM modulating mode simultaneously.
2) the DTMB standard does not adopt traditional OFDM modulation technique based on CP (Cyclic Prefix, Cyclic Prefix) sequence, but traditional CP sequence has been replaced to PN (Pseudo-randomNoise, pseudo random sequence) sequence.
3) the DTMB standard has adopted LDPC (Low-Density Parity-Check, low density parity check code) sign indicating number as channel coding schemes.
4) the frame head PN sequence of DTMB standard has three kinds: PN420, PN595 and PN945, represent that respectively frame head PN sequence comprises: 420 data symbols, 595 data symbols and 945 data symbols.
5) system information of DTMB standard has adopted spread spectrum protection.
After the receiver of DTMB system had obtained initial frame synchronization, the estimation of carrier wave frequency deviation just became a crucial task.The method of traditional solution DTMB system carrier frequency bias estimation problem usually is to utilize the double pilot signal of transmitting terminal emission to carry out estimation approach, or utilizes the PN sequence that is stored in receiver in advance and the PN sequence in transmitting to carry out the method etc. of cross correlation process.But the double pilot signal is as an option of DTMB standard, and the emission that may not be bound to if then do not launch, will cause carrier wave frequency deviation to be unable to estimate; In addition, cross-correlation method also exists the relatively poor shortcoming of estimated performance.In addition, other method of in the past mentioning in the DTMB document also exists the less shortcoming of estimation range.
The carrier wave frequency deviation of DTMB system receiver comprises two parts: integer frequency bias and decimal frequency bias, thereby admissible a kind of method is, after decimal frequency bias and integer frequency bias estimated separately, the reentry carrier wave frequency deviation of DTMB system receiver, but, how the integer frequency bias of DTMB system receiver is estimated, still present an open question.
In addition, in order to realize the fine synchronization of signal frame, be provided with independent method in the prior art.How in additive method, to realize fine synchronization, thereby reduce the complexity that fine synchronization is handled, become the problem that the technical staff need consider.
Summary of the invention
Integer frequency bias method of estimation and device that technical problem to be solved by this invention provides a kind of receiver carry out the estimation of integer frequency bias.
In order to solve the problems of the technologies described above, the invention provides a kind of integer frequency bias method of estimation of receiver, be used for said method comprising the steps of to having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out the integer frequency bias estimation:
(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
(2) receiver carries out the decimal frequency bias estimation to received signal, and carries out the decimal frequency bias compensation of received signal after estimating decimal frequency bias;
(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;
(4) estimate carrying out integer frequency bias according to thick sync bit, frame head mode and the described phase place of the frame of described received signal through the received signal after the decimal frequency bias compensation.
Furthermore, the frame head mode of received signal is one of PN420, PN595 or PN945 described in the step (1); Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.
Furthermore, estimate carrying out integer frequency bias described in the step (4), may further comprise the steps through the signal after the decimal frequency bias compensation:
(401) from received signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;
I
CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
(402) according to the pseudo random sequence phase place of frame head mode of counting out and acquisition, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
(403) the power factor threshold T is set
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
(404) maximum power value that obtains all correlated serieses is P
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content of correlated series be P
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
(405) with P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then carry out following operation: upgrade receiver state, enter tracking mode; Determine δ
IΔ B is integer frequency bias.
Furthermore, power factor threshold T in the step (403)
PowerConcrete value comprise 64.
Furthermore, step (404) is specially and carries out following cycling:
Index k to the integer factor of integer frequency bias gets different values one by one, and the span of k is-δ
I, maxTo+δ
I, maxBetween integer, to the value of k each time, all carry out following step:
K Δ B represents the integer frequency bias of current circular treatment correspondence;
(a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
(b) to sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
(c) the sample point s of acquisition correlated series
Corr(l);
(d) obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| S
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
(e) obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Orr, max t, and average power P
Corr, avg t
(f) afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is 0, δ
IInitial value is 0.
Furthermore, described in the step (a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground
Pn(n) exp (j2 π k Δ Bn/F) multiply operation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
Furthermore, obtain the sample point s of correlated series described in the step (c)
Corr(l) step comprises:
Order
Wherein, conj () expression complex conjugate operation.
Furthermore, obtain power sequence P described in the step (e)
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd average power P
Corr, avg tConcrete steps, comprising: the order
And order
Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation.
Furthermore, step (405) also comprises: if P
Tcorr, maxSmaller or equal to T
PowerP
Corr, avg, then not carrying out any operation, integer frequency bias is estimated failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates successfully until integer frequency bias.
Furthermore, described undated parameter comprises and upgrades T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
In order to solve the problems of the technologies described above, the present invention also provides a kind of integer frequency bias estimation unit of receiver, be used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out the integer frequency bias estimation, described device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain unit, integer frequency bias estimation unit;
Described synchronization acquistion unit links to each other with described decimal frequency bias estimation unit and described integer frequency bias estimation unit, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
The decimal frequency bias estimation unit links to each other with described synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
The decimal frequency bias compensating unit links to each other with described decimal frequency bias estimation unit, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains the unit, links to each other with described decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;
Described integer frequency bias estimation unit, obtain the unit with described synchronization acquistion unit and described phase place and link to each other, be used for estimating carrying out integer frequency bias through the received signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
Furthermore, described phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.
Furthermore, described integer frequency bias estimation unit further comprises: data sequence interception unit, secondary processing sequence are chosen the performance number of unit, power factor threshold settings unit, correlated series and integer factor determining unit, comparing unit, updating block, integer frequency bias determining unit;
Described data sequence interception unit is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for the acquisition of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen the unit, link to each other with described data sequence interception unit, the frame head mode and the described phase place that are used for going out according to described synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit is chosen the unit with described secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
The performance number of described correlated series and integer factor determining unit link to each other with described power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit links to each other with the performance number and the integer factor determining unit of described correlated series, is used for P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then export an enable signal to updating block;
Described updating block links to each other with described comparing unit, is used to receive an enable signal of described comparing unit, upgrades receiver state, enters tracking mode;
Described integer frequency bias determining unit links to each other with described updating block, is used for determining δ
IΔ B is an integer frequency bias.
Furthermore, described power factor threshold settings unit is further used for the power factor threshold T
PowerConcrete value be set at 64.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit all are used to carry out following operation;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), n=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd the average power P of power sequence
Corr, avg t
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is 0; δ
IInitial value is 0.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for order
To obtain the sample point s of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation.
Furthermore, described comparing unit is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avgThe time, undated parameter, and export performance number and the integer factor determining unit of an enable signal to described correlated series.
Furthermore, described comparing unit is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
Integer frequency bias estimation and fine synchronization method and device that another technical problem to be solved by this invention provides a kind of receiver carry out the estimation of integer frequency bias, and finish the meticulous frame synchronization process of DTMB system simultaneously.
In order to solve the problems of the technologies described above, the integer frequency bias that the invention provides a kind of receiver is estimated and fine synchronization method, be used for said method comprising the steps of to having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing:
(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
(2) receiver carries out the decimal frequency bias estimation to received signal, and carries out the decimal frequency bias compensation of received signal after estimating decimal frequency bias;
(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;
(4) integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the described phase place of the frame of described received signal.
Furthermore, the frame head mode of received signal is one of PN420, PN595 or PN945 described in the step (1); Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.
Furthermore, integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation described in the step (4), may further comprise the steps:
(401) from received signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;
I
CparseThe thick sync bit index that treatment step obtains is caught in preamble for it; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
(402) according to the frame head mode that estimates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence
Pn(n), length is P, and wherein the span of index n is 0~P-1;
(403) the power factor threshold T is set
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
(404) maximum power value that obtains all correlated serieses is P
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content of correlated series be P
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
IAnd maximum power value P
Corr, maxSample point index value I in the corresponding correlated series
Corr, peak
(405) with P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then carry out following operation: upgrade receiver state, enter tracking mode; Determine δ
IΔ B is integer frequency bias; Determine I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index of acquisition.
Furthermore, power factor threshold T in the step (403)
PowerConcrete value comprise 64.
Furthermore, step (404) is specially and carries out following cycling:
Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and, all carry out following step to the value of k each time;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
(a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
(b) to sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
(c) the sample point s of acquisition correlated series
Corr(l);
(d) obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| S
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
(e) obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t,
(f) make the following judgment and assign operation: if P
Corr, max t, greater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is is 0; P
Corr, peakInitial value is 0; δ
IInitial value is 0.
Furthermore, described in the step (a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground
Pn(n) exp (j2 π k Δ Bn/F) multiply operation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
Furthermore, obtain the sample point s of correlated series described in the step (c)
Corr(l) step comprises:
Order
Wherein, conj () expression complex conjugate operation.
Furthermore, obtain power sequence P described in the step (e)
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg tConcrete steps, comprising: the order
And order
And order
Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation.
Furthermore, step (405) also comprises: if P
Corr, maxSmaller or equal to T
PowerP
Corr, avg, then integer frequency bias is estimated and the fine synchronization failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates and the fine synchronization success until integer frequency bias.
Furthermore, described undated parameter comprises and upgrades T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
In order to solve the problems of the technologies described above, the present invention also provides a kind of integer frequency bias of receiver to estimate and the fine synchronization device, be used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing, described device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain the unit, integer frequency bias is estimated and the fine synchronization unit;
Described synchronization acquistion unit, estimate with described decimal frequency bias estimation unit and described integer frequency bias and the fine synchronization unit links to each other, be used for handling the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal to carrying out synchronization acquistion to received signal;
The decimal frequency bias estimation unit links to each other with described synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
The decimal frequency bias compensating unit links to each other with described decimal frequency bias estimation unit, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains the unit, links to each other with described decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;
Described integer frequency bias is estimated and the fine synchronization unit, obtain the unit with described synchronization acquistion unit and described phase place and link to each other, be used for the received signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
Furthermore, described phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.
Furthermore, described integer frequency bias is estimated and the fine synchronization unit further comprises: data sequence interception unit, secondary processing sequence are chosen performance number and integer factor determining unit, comparing unit, updating block, integer frequency bias and the fine synchronization determining unit of unit, power factor threshold settings unit, correlated series;
Described data sequence interception unit is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of received signal, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for the acquisition of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen the unit, link to each other with described data sequence interception unit, the frame head mode and the described phase place that are used for going out according to described synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit is chosen the unit with described secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
The performance number of described correlated series and integer factor determining unit link to each other with described power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit links to each other with the performance number and the integer factor determining unit of described correlated series, is used for P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then export an enable signal to updating block;
Described updating block links to each other with described comparing unit, is used to receive an enable signal of described comparing unit, upgrades receiver state, enters tracking mode;
Described integer frequency bias and fine synchronization determining unit link to each other with described updating block, are used for determining δ
IΔ B is an integer frequency bias, and is used for determining I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index that obtains.
Furthermore, described power factor threshold settings unit is further used for the power factor threshold T
PowerConcrete value be set at 64.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit are all carried out following processing;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t,
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is 0; I
Corr, peakInitial value is 0; δ
IInitial value is 0.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for order
To obtain the sample point s of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation.
Furthermore, the performance number of described correlated series and integer factor determining unit are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation.
Furthermore, described comparing unit is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avgThe time, undated parameter, and export performance number and the integer factor determining unit of an enable signal to described correlated series.
Furthermore, described comparing unit is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
Nonlinear Transformation in Frequency Offset Estimation problem at the DTMB receiver, the present invention proposes a kind of new integer frequency bias method of estimation and device at the DTMB system receiver, can realize the integer frequency bias of DTMB system receiver is estimated, and have the advantages that estimated performance is good, estimation range is big.The present invention also provides a kind of at the method and apparatus that receiver is carried out carry out simultaneously when integer frequency bias is estimated fine synchronization, realizes handling when integer frequency bias is estimated with fine synchronization, and the method than independent fine synchronization is handled has the little advantage of complexity.In fact, the processing thought of this scheme for combining can be applied to all and the similar transmission system of DTMB system.
Description of drawings
Fig. 1 is four layers of frame structure schematic diagram based on multi-frame of DTMB system.
Fig. 2 is the structural representation of the PN420 of DTMB standard.
Fig. 3 is the structural representation of the PN945 of DTMB standard.
Fig. 4 is the constructive variation schematic diagram of the PN420 of DTMB standard.
Fig. 5 is the constructive variation schematic diagram of the PN945 of DTMB standard.
Fig. 6 is that the frame structure of three kinds of frame head mode correspondences has identical constructive variation schematic diagram.
Fig. 7 is the integer frequency bias method of estimation flow chart of receiver of the present invention.
Fig. 8 is the integer frequency bias estimation unit block diagram of receiver of the present invention.
Fig. 9 is the included integer frequency bias estimation unit structural representation of integer frequency bias estimation unit shown in Figure 8.
Figure 10 is that the integer frequency bias of receiver of the present invention is estimated and fine synchronization device block diagram.
Figure 11 is that the integer frequency bias of receiver shown in Figure 10 is estimated and the integer frequency bias of fine synchronization device is estimated and fine synchronization cellular construction schematic diagram.
Embodiment
Basic thought of the present invention is, the carrier frequency offset that exists between the transmitter and receiver is divided into integer frequency bias and decimal frequency bias, estimates decimal frequency bias earlier, estimates integer frequency bias again; Specifically, when the DTMB system obtain thick synchronously, estimate decimal frequency bias and carried out the decimal frequency bias compensation and known the frame head PN pattern and frame head PN sequence of transmitter emission after, just can carry out the estimation of integer frequency deviation.
The present invention has also proposed to finish the method and apparatus of the meticulous frame synchronization process of DTMB system when estimating integer frequency bias.
Below in conjunction with accompanying drawing to a preferred embodiment of the present invention will be described in detail.
With reference to shown in Figure 1, be four layers of frame structure schematic diagram based on multi-frame of DTMB system, provided four layers of frame structure based on multi-frame of DTMB system.As shown in Figure 1, signal frame is the most basic transmission unit, comprises frame head and frame.Frame head is filled the PN sequence, and frame can be the data of single carrier mode, also can be the data of multi-carrier mode.Under multi-carrier mode, the size of IFFT (1nverse Fast FourierTransform, inverse fast Fourier transform) is 3780 points.
Wherein, the length of frame head PN sequence has three kinds: 420 data symbols, 595 data symbols and 945 data symbols, thus there are three kinds of signal frame length accordingly.The structure of frame head sequence will be introduced following.The baseband sampling rate of DTMB system is 7.56MSPS (Mega-Samples-Per-Second, per second sample 1,000,000 times).Therefore, the time span of Dui Ying three kinds of PN frame head sequences is respectively 420/7.56=55.56 microsecond, 595/7.56=78.703 microsecond and 945/7.56=125 microsecond.And the time span of frame is 500 microseconds.Thereby the time span of each corresponding signal frame is respectively 555.56 microseconds, 578.703 microseconds and 625 microseconds.Be superframe on signal frame, the time span of each superframe is unified to be 125ms.Accordingly, a superframe comprises 225,216 and 200 signal frames respectively.For dividing frame, time span is one minute on the superframe.A branch frame comprises 480 superframes.Up be a day frame again, corresponding one day 24 hours.One day, frame comprised 1440 branch frames.
The building method of three kinds of PN frame head sequences is also inconsistent.Below in conjunction with Fig. 2 and Fig. 3 the structure of PN420 sequence and the structure of PN945 sequence are elaborated.
With reference to shown in Figure 2, the structural representation for the PN420 of DTMB standard has provided the structural representation of frame head PN420 sequence.In the middle of this sequence be the PN255 sequence, is the m sequence on one 8 rank, and reaching " 1 " through " 0 " to+1 value is the binary character of non-return-to-zero to the mapping transformation of-1 value.The PN420 sequence comprises synchronizing sequence (length is 83 symbols) behind a preamble sequence (length is 82 symbols), PN255 sequence and.Preamble sequence is the Cyclic Prefix sequence of PN255 sequence, and back synchronizing sequence is the cyclic suffix sequence of PN255 sequence.The PN255 sequence adopts linear feedback shift register, and (Linear Feedback Shift Register LFSR) generates, and the initial phase of different LFSR will generate different PN255 sequences.
With reference to shown in Figure 3, the structural representation for the PN945 of DTMB standard has provided the structural representation of frame head PN945 sequence.The structure of PN945 and the similar of PN420 all have preamble sequence and back synchronizing sequence.The intermediate sequence of PN945 sequence is a PN511 sequence, adopts the m sequence on one 9 rank to generate, and the mapping transformation to-1 value is the binary symbol sequence of non-return-to-zero to+1 value and " 1 " through " 0 " again.The concrete value of PN945 sequence also is variable, and is relevant with the initial phase of LFSR.And in order to reduce adjacent PN420 sequence or the correlation between the PN945 sequence, the DTMB standard has been arranged initial phase once meticulously by Computer Simulation specially.
By above narration as can be known, the building method of PN420 and PN945 is the same, but the building method of the building method of PN595 and PN420 and PN945 differs widely.The PN595 sequence is to adopt 10 rank maximum length pseudo-random binary sequence brachymemmas to form, and is that length is preceding 595 chips of 1023 m sequence.And the initial phase of LFSR that generates the m sequence of this 1023 length is also fixed, and is 0000000001, and promptly the PN595 sequence that adopts of each signal frame is identical.Preceding 595 chips of pseudo random sequence, the mapping transformation to-1 value is the binary symbol sequence of non-return-to-zero to+1 value and " 1 " through " 0 ", is PN595 frame head sequence.
The form of expression of the frame head sequential structure of Fig. 2 and Fig. 3 is changed slightly, see Fig. 4 and Fig. 5.Fig. 4 is the constructive variation schematic diagram of the frame head PN420 of DTMB standard, and Fig. 5 is the constructive variation schematic diagram of the frame head PN945 of DTMB standard.
As can be seen from Figure 4 and Figure 5, PN420 sequence and PN945 sequence can be regarded the form of " CP+PN sequence " as, are respectively " the new PN255 sequence of the CP+ " form of Fig. 4 and " the new PN511 sequence of CP+ " form of Fig. 5.
Thereby three kinds of frame head sequences have all had identical form in the frame structure of DTMB system.
With reference to shown in Figure 6, be that three kinds of frame head structures have identical constructive variation schematic diagram.As shown in Figure 6, three kinds of frame head structures have identical version, are the version of N+L+N, and (L) at set intervals promptly just has same PN sequence to occur.For the PN420 frame head mode, L=90 symbol, N=165 symbol; For the PN595 frame head mode, L=3780 symbol, N=595 symbol; For the PN945 frame head mode, L=77 symbol, N=434 symbol.
With reference to shown in Figure 7, be the integer frequency bias method of estimation flow chart of receiver of the present invention.Said method comprising the steps of:
Step 701: receiver carries out synchronization acquistion at first to received signal to be handled, and obtains the thick sync bit of the frame of received signal, and the frame head mode of described received signal;
Described frame head mode is one of PN420, PN595 or PN945;
Step 702: receiver carries out decimal frequency bias to be estimated, and carries out the decimal frequency bias compensation of received signal after estimating decimal frequency bias;
Step 703:, judge the concrete phase place of current frame head PN sequence at PN420 frame head mode that has the phase place rotation and the PN945 frame head mode that has the phase place rotation;
So that select for use the frame head PN sequence that is stored in local corresponding phase to estimate and fine synchronization with the integer frequency bias that carries out subsequently according to described concrete phase place.
Step 704: thick sync bit, frame head mode and described phase place according to the frame of described received signal are estimated carrying out integer frequency bias through the signal after the decimal frequency bias compensation.
Carrying out to carry out the fine synchronization processing when integer frequency bias is estimated.
Below the described decimal frequency bias estimation method of step 702 is elaborated.
Described decimal frequency bias estimation method may further comprise the steps:
Step 101: at receiving terminal all frame head sequence patterns are divided into identical version: N+L+N, and make Δ B be
Wherein F is the baseband sampling rate of system;
Step 102: receiver receives the received signal that has carrier frequency offset, and described received signal is carried out knowing the concrete frame head sequence pattern that transmitting terminal is launched after the synchronization acquistion, selects corresponding N, L according to described frame head sequence pattern;
Step 103: the autocorrelation operation of sliding to received signal, the output result of acquisition slip autocorrelation operation;
Step 104: the output result according to the autocorrelation operation of sliding to received signal, carry out the estimation of decimal frequency bias.
Below the realization of above-mentioned decimal frequency bias estimation method flow process is narrated in detail.
The carrier frequency offset that exists between the transmitter and receiver can be designated as Δ f Hz.Generally carrier wave frequency deviation Δ f can be carried out normalized, i.e. δ=Δ f/ Δ B, wherein the definition of Δ B is seen below; Thereby δ=δ
I+ δ
f, δ
IThe expression integer (0 ,+-number), δ
fThe expression decimal, δ
IΔ B represents integer frequency bias, δ
fΔ B represents decimal frequency bias.Therefore, as long as estimate decimal δ
f(smaller or equal to 1) just can obtain decimal frequency bias δ
fΔ B.Simultaneously, as long as estimate integer δ
I, just can obtain integer frequency bias δ
IΔ B.
Because the baseband sampling rate F of DTMB system is 7.56MHz, definition
Thereby, for the PN420 frame head mode, Δ B=7.5610
3/ 255=29.647KHz; For the PN595 frame head mode, Δ B=7.5610
3/ 4375=1.728KHz; For the PN945 frame head mode, Δ B=7.5610
3/ 511=14.79452KHz.
Before estimating carrier wave frequency deviation, the DTMB receiver at first will be carried out the synchronization acquistion process.After finishing the synchronization acquistion process, just can obtain corresponding synchronous information, comprise the thick sync bit that obtains frame, and the frame head PN sequence that obtains the transmitting terminal emission is which kind of form one of (is in three kinds of frame patterns of PN420, PN595 or PN945).
Exist the received signal of the simplification of carrier frequency offset to be expressed as:
r(k)=s(k)·exp(j2πkδ/M),k=0,1,2,…
Wherein, s (k) expression transmits, and we put M is M=N+L;
Then, received signal is through a slip autocorrelator, the autocorrelation operation of sliding.
The functional description of slip autocorrelator is as follows:
Wherein, the sample of signal that r (n) expression receives, conjugate function is got in conj () expression, and R (n) is a sequence, the output result of expression autocorrelation operation, N carries out value, vide ut supra with L according to different frame head modes.
Secondly, the output result according to the slip autocorrelation operation carries out the calculating of decimal frequency bias, the decimal frequency bias result that promptly can obtain to estimate.
The calculating of decimal frequency bias is finished by the decimal frequency bias computing module, and the concrete treatment step of decimal frequency bias computing module is described below:
At first to auto-correlation output as a result R (n) sequence take absolute value, obtain the amplitude sequence of R (n) sequence | R (n) |; Secondly, search out | R (n) | the maximum of sequence is designated as max (| R (n) |), and remembers that this amplitude maximum corresponding index value is n
Max, and then obtain R (n
Max); The 3rd, get R (n
Max) phase place, be designated as θ.In general, phase theta has following form
θ=2πδ(N+L)/M
Because putting M is M=N+L, thereby
θ=2πδ
Further, because the periodicity of phase place (being the cycle with 2 π certainly)
θ=2πδ
f
At last, will
B multiplies each other with Δ, promptly obtains the decimal frequency bias δ that estimates
fΔ B.
Because the synchronization acquistion stage has been known the concrete PN frame head mode of transmitting terminal emission, therefore can directly select parameters such as corresponding N, L and Δ B for use.
Below the step of carrying out the integer frequency bias estimation in the step 704 is elaborated.
Because the baseband sampling rate F of DTMB system is 7.56MHz, and is same, definition
Thereby, for the PN420 frame head mode, Δ B=7.5610
3/ 255=29.647KHz; For the PN595 frame head mode, Δ B=7.5610
3/ 4375=1728KHz; For the PN945 frame head mode, Δ B=7.5610
3/ 511=14.79452KHz.
The note receiver to the area requirement of integer frequency bias is-δ
I, maxΔ B~+ δ
I, maxΔ B, wherein δ
I, max>0, be integer.
The integer frequency bias that provides the DTMB receiver that the present invention proposes is below estimated and the concrete treatment step of fine synchronization scheme.
The first step: from received signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1.
Wherein, the length of frame head PN sequence is P baseband sample point (the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values);
I
CoarseThick sync bit (this thick sync bit has identified the starting point of the frame head PN sequence) index that treatment step obtains is caught in preamble for it; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for the DTMB system docking;
Second step: according to frame head mode that estimates and the PN sequence phase of judging, choose corresponding local frame head PN sequence, be designated as s as secondary processing sequence
Pn(n), length is P, and wherein the span of index n is 0~P-1;
The 3rd step: the power factor threshold T is set
Power, a concrete value can be 64; Perhaps, accordingly, the amplitude factor threshold T is set
Amp, wherein
The 4th step: carry out following circular treatment;
The maximum power value of remembering all correlated serieses is P
Corr, max, its initial value is changed to 0; Note is corresponding to maximum power value P
Corr, maxThe average power content of correlated series be P
Corr, avg, its initial value is changed to 0; Note maximum power value P
Corr, maxSample point index value in the corresponding correlated series is I
Corr, peak, its initial value is changed to 0; The integer factor of note integer frequency bias correspondence is δ
I, its initial value is changed to 0.
Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and, all carry out following operation to the value of k each time;
Wherein, k Δ B represents the integer frequency bias of current circular treatment step correspondence;
(a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and a kind of concrete performing step can be expressed as follows: r is carried out on sample-by-sample ground
Pn(n) exp (j2 π k Δ Bn/F) multiply operation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz;
(b) to sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
(c) wherein, obtain the sample point s of correlated series
Corr(l) step can be described below:
Order
Wherein, conj () expression complex conjugate operation.
(d) obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
(e) obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, concrete grammar can be
With
And
Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () represents to average operation.
(f) make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k further carried out for the 5th step; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation.
The 5th step: if P
Corr, maxGreater than T
PowerP
Corr, avg, then carry out following operation:
Upgrade receiver state, enter tracking mode; Determine δ
IΔ B is integer frequency bias; Determine I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index of acquisition;
Otherwise then integer frequency bias is estimated and the fine synchronization failure; Subsequently, upgrade some parameter such as T
PowerPerhaps δ
I, maxPerhaps L
Ds, maxDeng, receiver still continues to carry out above-mentioned integer frequency bias to be estimated and fine synchronization method, until success.
Certainly, if only need estimate integer frequency bias, handle and do not need to carry out fine synchronization, the correlation step of then removing the fine synchronization processing in above-mentioned flow process gets final product, and has so just constituted another embodiment of the present invention, and the present invention does not repeat them here.
Below by Fig. 8, Fig. 9, Figure 10, Figure 11 respectively to of the present inventionly carrying out device that integer frequency bias estimates separately, carrying out that integer frequency bias is estimated and the device of fine synchronization is elaborated simultaneously.
With reference to shown in Figure 8, be the integer frequency bias estimation unit block diagram of receiver of the present invention.Described integer frequency bias estimation unit is used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out the integer frequency bias estimation, and described integer frequency bias estimation unit comprises: synchronization acquistion unit 80, decimal frequency bias estimation unit 81, decimal frequency bias compensating unit 82, phase place obtain unit 83, integer frequency bias estimation unit 84;
Described synchronization acquistion unit 80 links to each other with described decimal frequency bias estimation unit 81 and described integer frequency bias estimation unit 84, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
Decimal frequency bias estimation unit 81 links to each other with described synchronization acquistion unit 80, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
Decimal frequency bias compensating unit 82 links to each other with described decimal frequency bias estimation unit 81, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains unit 83, links to each other with described decimal frequency bias compensating unit 82, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates; Described phase place obtains unit 83, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode;
Described integer frequency bias estimation unit 84, obtain unit 83 with described synchronization acquistion unit 80 and described phase place and link to each other, be used for estimating carrying out integer frequency bias through the received signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
With reference to shown in Figure 9, be the included integer frequency bias estimation unit structural representation of integer frequency bias estimation unit shown in Figure 8.Described integer frequency bias estimation unit 84 further comprises: data sequence interception unit 841, secondary processing sequence are chosen the performance number of unit 842, power factor threshold settings unit 843, correlated series and integer factor determining unit 844, comparing unit 845, updating block 846, integer frequency bias determining unit 847;
Described data sequence interception unit 841 is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for 80 acquisitions of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen unit 842, link to each other with described data sequence interception unit 841, the frame head mode and the described phase place that are used for estimating according to described synchronization acquistion unit 80 obtain the pseudo random sequence phase place that unit 83 obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit 843, described secondary processing sequence are chosen unit 842 and are linked to each other, and are used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
Described power factor threshold settings unit 843 is further used for the power factor threshold T
PowerConcrete value be set at 64;
The performance number of described correlated series and integer factor determining unit 844 link to each other with described power factor threshold settings unit 843, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit 845 links to each other with the performance number and the integer factor determining unit 844 of described correlated series, is used for P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then export an enable signal to updating block 846; Described comparing unit 845 is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avgThe time, undated parameter, and export performance number and the integer factor determining unit 844 of an enable signal to described correlated series; Described comparing unit 845 is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any;
Described updating block 846 with described comparing unit 845, is used to receive an enable signal of described comparing unit 845, upgrades receiver state, enters tracking mode;
Described integer frequency bias determining unit 847 links to each other with described updating block 846, is used for determining δ
IΔ B is an integer frequency bias;
The performance number of described correlated series and integer factor determining unit 844 are further used for the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit 844 are all carried out following operation;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; In the present embodiment, the performance number of described correlated series and integer factor determining unit 844 are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation; Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), n=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
In the present embodiment, the performance number of described correlated series and integer factor determining unit 844 are further used for order
To obtain the sample point S of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation;
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| S
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd the average power P of power sequence
Corr, avg t
In the present embodiment, the performance number of described correlated series and integer factor determining unit 844 are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd the average power P of power sequence
Corr, max t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation;
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is is 0; δ
IInitial value is 0.
With reference to shown in Figure 10, for the integer frequency bias of receiver of the present invention is estimated and fine synchronization device block diagram.Described integer frequency bias is estimated and the fine synchronization device is used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing simultaneously, and described integer frequency bias is estimated and the fine synchronization device comprises: synchronization acquistion unit 90, decimal frequency bias estimation unit 91, decimal frequency bias compensating unit 92, phase place obtain unit 93, integer frequency bias is estimated and fine synchronization unit 94;
Described synchronization acquistion unit 90, estimate with described decimal frequency bias estimation unit 91 and described integer frequency bias and fine synchronization unit 94 links to each other, be used for carrying out to received signal synchronization acquistion and handle, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
Decimal frequency bias estimation unit 91 links to each other with described synchronization acquistion unit 90, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
Decimal frequency bias compensating unit 92 links to each other with described decimal frequency bias estimation unit 91, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains unit 93, links to each other with described decimal frequency bias compensating unit 92, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates; Described phase place obtains unit 93, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode;
Described integer frequency bias is estimated and fine synchronization unit 94, obtain unit 93 with described synchronization acquistion unit 90 and described phase place and link to each other, be used for the received signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
With reference to shown in Figure 11, be the integer frequency bias estimation of receiver shown in Figure 10 and the integer frequency bias estimation and the fine synchronization cellular construction schematic diagram of fine synchronization device.Described integer frequency bias is estimated and fine synchronization unit 94 further comprises: data sequence interception unit 941, secondary processing sequence are chosen performance number and integer factor determining unit 944, comparing unit 945, updating block 946, integer frequency bias and the fine synchronization determining unit 947 of unit 942, power factor threshold settings unit 943, correlated series;
Described data sequence interception unit 941 is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for the acquisition of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen unit 942, link to each other 941 with described data sequence interception unit, the frame head mode and the described phase place that are used for estimating according to described synchronization acquistion unit 90 obtain the pseudo random sequence phase place that unit 93 obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit 943 is chosen the unit with described secondary processing sequence and is linked to each other 942, is used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
Described power factor threshold settings unit 943 is further used for the power factor threshold T
PowerConcrete value be set at 64;
The performance number of described correlated series and integer factor determining unit 944 link to each other with described power factor threshold settings unit 943, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit 945 links to each other 944 with the performance number and the integer factor determining unit of described correlated series, is used for P
Corr, maxWith T
PowerP
Tcorr, avgCompare, if P
Tcorr, maxGreater than T
PowerP
Tcorr, avg, then export an enable signal to updating block; Described comparing unit 945 is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avg, undated parameter, and export performance number and the integer factor determining unit 944 of an enable signal to described correlated series; Described comparing unit 945 is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any;
Described updating block 946 links to each other with described comparing unit 945, is used to receive an enable signal of described comparing unit, upgrades receiver state, enters tracking mode;
Described integer frequency bias and fine synchronization determining unit 947 link to each other with described updating block 946, are used for determining δ
IΔ B is an integer frequency bias, and is used for determining I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index that obtains;
The performance number of described correlated series and integer factor determining unit 944 are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit all are used to carry out following operation;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
In the present embodiment, the performance number of described correlated series and integer factor determining unit 944 are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
In the present embodiment, the performance number of described correlated series and integer factor determining unit 944 are further used for order
To obtain the sample point s of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation;
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Orr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t,
In the present embodiment, the performance number of described correlated series and integer factor determining unit 944 are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation;
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is is 0; I
Corr, peakInitial value is 0; δ
IInitial value is 0.
It should be noted last that above embodiment is only unrestricted in order to technical scheme of the present invention to be described, the modification that those of ordinary skill in the art carries out technical scheme of the present invention or be equal to replacement all is encompassed in the middle of the claim scope of the present invention.
Claims (40)
1, a kind of integer frequency bias method of estimation of receiver is used for it is characterized in that having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out the integer frequency bias estimation, said method comprising the steps of:
(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
(2) receiver carries out the decimal frequency bias estimation to received signal, and carries out the decimal frequency bias compensation of received signal after estimating decimal frequency bias;
(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;
(4) estimate carrying out integer frequency bias according to thick sync bit, frame head mode and the described phase place of the frame of described received signal through the received signal after the decimal frequency bias compensation.
2, the method for claim 1 is characterized in that, the frame head mode of received signal is one of PN420, PN595 or PN945 described in the step (1); Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.
3, method as claimed in claim 1 or 2 is characterized in that, estimates carrying out integer frequency bias through the signal after the decimal frequency bias compensation described in the step (4), may further comprise the steps:
(401) from received signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;
I
CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
(402) according to the frame head mode that calculates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence
Pn(n), length is P, and wherein the span of index n is 0~P-1;
(403) the power factor threshold T is set
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
(404) maximum power value that obtains all correlated serieses is P
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content of correlated series be P
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
(405) with P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then carry out following operation: upgrade receiver state, enter tracking mode; Determine δ
IΔ B is integer frequency bias.
4, method as claimed in claim 3 is characterized in that, power factor threshold T in the step (403)
PowerConcrete value comprise 64.
5, method as claimed in claim 3 is characterized in that, step (404) is specially carries out following cycling:
Index k to the integer factor of integer frequency bias gets different values one by one, and the span of k is-δ
I, maxTo+δ
I, maxBetween integer, to the value of k each time, all carry out following step:
K Δ B represents the integer frequency bias of current circular treatment correspondence;
(a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
(b) to sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
(c) the sample point s of acquisition correlated series
Corr(l);
(d) obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l)
2, l=0,1 ..., 2L
Ds, max
(e) obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max t, and average power P
Corr, avg t
(f) afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation P
Corr, max=P
Corr, max tP
Corr, avg=P
Corr, avg tδ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is 0, δ
IInitial value is 0.
6, method as claimed in claim 5 is characterized in that, described in the step (a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground
Pn(n) exp (j2 π k Δ Bn/F) multiply operation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
7, as claim 5 or 6 described methods, it is characterized in that, obtain the sample point s of correlated series described in the step (c)
Corr(l) step comprises:
Order
Wherein, conj () expression complex conjugate operation.
8, method as claimed in claim 7 is characterized in that, obtains power sequence P described in the step (e)
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd average power P
Corr, avg tConcrete steps, comprising: the order
And order
Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () represents to average operation.
9, method as claimed in claim 3 is characterized in that, step (405) also comprises: if P
Corr, maxSmaller or equal to T
PowerP
Corr, avg, then integer frequency bias is estimated failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates successfully until integer frequency bias.
10, method as claimed in claim 9 is characterized in that, described undated parameter comprises and upgrades T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
11, a kind of integer frequency bias estimation unit of receiver, be used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out the integer frequency bias estimation, it is characterized in that described device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain unit, integer frequency bias estimation unit;
Described synchronization acquistion unit links to each other with described decimal frequency bias estimation unit and described integer frequency bias estimation unit, is used for carrying out to received signal synchronization acquistion and handles, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
The decimal frequency bias estimation unit links to each other with described synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
The decimal frequency bias compensating unit links to each other with described decimal frequency bias estimation unit, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains the unit, links to each other with described decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;
Described integer frequency bias estimation unit, obtain the unit with described synchronization acquistion unit and described phase place and link to each other, be used for estimating carrying out integer frequency bias through the received signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
12, device as claimed in claim 11 is characterized in that, described phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.
13, as claim 11 or 12 described devices, it is characterized in that described integer frequency bias estimation unit further comprises: data sequence interception unit, secondary processing sequence are chosen the performance number of unit, power factor threshold settings unit, correlated series and integer factor determining unit, comparing unit, updating block, integer frequency bias determining unit;
Described data sequence interception unit is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for the acquisition of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen the unit, link to each other with described data sequence interception unit, the frame head mode and the described phase place that are used for going out according to described synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit is chosen the unit with described secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
The performance number of described correlated series and integer factor determining unit link to each other with described power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit links to each other with the performance number and the integer factor determining unit of described correlated series, is used for P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then export an enable signal to updating block;
Described updating block links to each other with described comparing unit, is used to receive an enable signal of described comparing unit, upgrades receiver state, enters tracking mode;
Described integer frequency bias determining unit links to each other with described updating block, is used for determining δ
IΔ B is an integer frequency bias.
14, device as claimed in claim 13 is characterized in that, described power factor threshold settings unit is further used for the power factor threshold T
PowerConcrete value be set at 64.
15, device as claimed in claim 14 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit are all carried out following operation;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd the average power P of power sequence
Corr, avg t
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
J=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is put and is 0; δ
IInitial value is 0.
16, device as claimed in claim 15 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
17, device as claimed in claim 16 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for order
To obtain the sample point s of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation.
18, device as claimed in claim 17 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () represents to average operation.
19, device as claimed in claim 18 is characterized in that, described comparing unit is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avgThe time, undated parameter, and export performance number and the integer factor determining unit of an enable signal to described correlated series.
20, device as claimed in claim 19 is characterized in that, described comparing unit is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
21, a kind of integer frequency bias of receiver is estimated and fine synchronization method, be used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing, it is characterized in that, said method comprising the steps of:
(1) receiver carries out the synchronization acquistion processing at first to received signal, the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal;
(2) receiver carries out the decimal frequency bias estimation to received signal, and carries out the decimal frequency bias compensation of received signal after estimating decimal frequency bias;
(3) obtain to exist the concrete phase place of frame head pseudo random sequence of the frame head mode of phase place rotation;
(4) integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation according to thick sync bit, frame head mode and the described phase place of the frame of described received signal.
22, method as claimed in claim 21 is characterized in that, the frame head mode of received signal is one of PN420, PN595 or PN945 described in the step (1); Having the frame head mode of phase place rotation described in the step (3) is PN420 and PN945 frame head mode.
As claim 21 or 22 described methods, it is characterized in that 23, integer frequency bias is estimated and fine synchronization is handled to carrying out through the signal after the decimal frequency bias compensation described in the step (4), may further comprise the steps:
(401) from received signal r (n) through the decimal frequency bias compensation, n=0,1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of transmitting terminal emission, is one of 420,595 or 945 3 values;
I
CoarseThe thick sync bit index that treatment step obtains is caught in preamble for it; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
(402) according to the frame head mode that estimates and the pseudo random sequence phase place of acquisition, choose corresponding local frame head pseudo random sequence, be designated as s as secondary processing sequence
Pn(n), length is P, and wherein the span of index n is 0~P-1;
(403) the power factor threshold T is set
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
(404) maximum power value that obtains all correlated serieses is P
Corr, max, and obtain corresponding to maximum power value P
Corr, maxThe average power content of correlated series be P
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
IAnd maximum power value P
Corr, maxSample point index value I in the corresponding correlated series
Corr, peak
(405) with P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then carry out following operation: upgrade receiver state, enter tracking mode; Determine δ
IΔ B is integer frequency bias; Determine I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index of acquisition.
24, method as claimed in claim 23 is characterized in that, power factor threshold T in the step (403)
PowerConcrete value comprise 64.
25, method as claimed in claim 23 is characterized in that, step (404) is specially carries out following cycling:
Index k to the integer factor of integer frequency bias gets different values one by one, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and, all carry out following step to the value of k each time;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
(a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
(b) to sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
(c) the sample point s of acquisition correlated series
Corr(l);
(d) obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
(e) obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t,
(f) make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avgInitial value is 0; I
Corr, peakInitial value is 0; δ
IInitial value is 0.
26, method as claimed in claim 25 is characterized in that, described in the step (a) to sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and concrete performing step comprises: r is carried out on sample-by-sample ground
Pn(n) exp (j2 π k Δ Bn/F) multiply operation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
27, as claim 25 or 26 described methods, it is characterized in that, obtain the sample point s of correlated series described in the step (c)
Corr(l) step comprises:
Order
Wherein, conj () expression complex conjugate operation.
28, method as claimed in claim 27 is characterized in that, obtains power sequence P described in the step (e)
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg tConcrete steps, comprising: the order
And order
And order
Wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in arg max () expression, and mean () represents to average operation.
29, method as claimed in claim 23 is characterized in that, step (405) also comprises: if P
Corr, maxSmaller or equal to T
PowerP
Corr, avg, then integer frequency bias is estimated and the fine synchronization failure; Subsequently, undated parameter, receiver still continues execution in step (404), estimates and the fine synchronization success until integer frequency bias.
30, method as claimed in claim 29 is characterized in that, described undated parameter comprises and upgrades T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
31, a kind of integer frequency bias of receiver is estimated and the fine synchronization device, be used for having different frame header sequence pattern and existing the received signal of carrier frequency offset to carry out integer frequency bias estimation and fine synchronization processing, it is characterized in that described device comprises: synchronization acquistion unit, decimal frequency bias estimation unit, decimal frequency bias compensating unit, phase place obtain the unit, integer frequency bias is estimated and the fine synchronization unit;
Described synchronization acquistion unit, estimate with described decimal frequency bias estimation unit and described integer frequency bias and the fine synchronization unit links to each other, be used for handling the thick sync bit of the frame of acquisition received signal and the frame head mode of described received signal to carrying out synchronization acquistion to received signal;
The decimal frequency bias estimation unit links to each other with described synchronization acquistion unit, is used for carrying out decimal frequency bias and estimating carrying out received signal after the synchronization acquistion;
The decimal frequency bias compensating unit links to each other with described decimal frequency bias estimation unit, is used for carrying out after estimating decimal frequency bias the decimal frequency bias compensation of received signal;
Described phase place obtains the unit, links to each other with described decimal frequency bias compensating unit, is used to obtain to exist the concrete phase place of the frame head pseudo random sequence of the frame head mode that phase place rotates;
Described integer frequency bias is estimated and the fine synchronization unit, obtain the unit with described synchronization acquistion unit and described phase place and link to each other, be used for the received signal after compensating through decimal frequency bias being carried out integer frequency bias estimation and fine synchronization processing according to thick sync bit, frame head mode and the described phase place of the frame of received signal.
32, device as claimed in claim 31 is characterized in that, described phase place obtains the unit, is further used for obtaining the concrete phase place of the frame head pseudo random sequence of PN420 and PN945 frame head mode.
33, as claim 31 or 32 described devices, it is characterized in that described integer frequency bias is estimated and the fine synchronization unit further comprises: data sequence interception unit, secondary processing sequence are chosen performance number and integer factor determining unit, comparing unit, updating block, integer frequency bias and the fine synchronization determining unit of unit, power factor threshold settings unit, correlated series;
Described data sequence interception unit is used for from the received signal r (n) through the decimal frequency bias compensation, n=0, and 1,2 ... middle intercepting one piece of data sequence is designated as r as pending data sequence
Pn(n), wherein the span of the index n of sample of signal is I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1; Wherein, the length of frame head pseudo random sequence is P baseband sample point, and the concrete value of P is relevant with the frame head mode of received signal, is one of 420,595 or 945 3 values; I
CoarseThick sync bit index for the acquisition of described synchronization acquistion unit; L
Ds, maxReceive the requirement of the maximum delay expansion of machine for system docking;
Described secondary processing sequence is chosen the unit, link to each other with described data sequence interception unit, the frame head mode and the described phase place that are used for going out according to described synchronization acquistion unit estimation obtain the pseudo random sequence phase place that the unit obtains, choose corresponding local frame head pseudo random sequence as secondary processing sequence, be designated as s
Pn(n), length is P, and wherein the span of index n is 0~P-1;
Described power factor threshold settings unit is chosen the unit with described secondary processing sequence and is linked to each other, and is used to be provided with the power factor threshold T
Power, the amplitude factor threshold T perhaps is set
Amp, wherein
The performance number of described correlated series and integer factor determining unit link to each other with described power factor threshold settings unit, are used to obtain the maximum power value P of all correlated serieses
Corr, max, and this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and obtain corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, avg, and the integer factor δ of definite integer frequency bias correspondence
I
Described comparing unit links to each other with the performance number and the integer factor determining unit of described correlated series, is used for P
Corr, maxWith T
PowerP
Corr, avgCompare, if P
Corr, maxGreater than T
PowerP
Corr, avg, then export an enable signal to updating block;
Described updating block links to each other with described comparing unit, is used to receive an enable signal of described comparing unit, upgrades receiver state, enters tracking mode;
Described integer frequency bias and fine synchronization determining unit link to each other with described updating block, are used for determining δ
IΔ B is an integer frequency bias, and is used for determining I
Coarse+ I
Corr, peak-L
Ds, maxBe the fine synchronization location index that obtains.
34, device as claimed in claim 33 is characterized in that, described power factor threshold settings unit is further used for the power factor threshold T
PowerConcrete value be set at 64.
35, device as claimed in claim 34 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for one by one the index k of the integer factor of integer frequency bias is got different values, and wherein the span of k is-δ
I, maxTo+δ
I, maxBetween integer, and to the value of k each time, the performance number of described correlated series and integer factor determining unit are all carried out following processing;
K Δ B represents the integer frequency bias of current circular treatment correspondence;
To sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation, and note is through integer frequency bias sequence after compensation r
Pn(n) be r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1;
To sequence r
Pn, 2(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 and sequence s
Pn(m), m=0~P-1 does associative operation, obtains correlated series, is designated as sequence s
Corr(l), l=0,1 ..., 2L
Ds, max
Obtain the sample point s of correlated series
Corr(l);
Obtain correlated series s
Corr(l), l=0,1 ..., 2L
Ds, maxPower sequence P
Corr(l)=| s
Corr(l) |
2, l=0,1 ..., 2L
Ds, max
Obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t,
Afterwards, make the following judgment and assign operation: if P
Corr, max tGreater than P
Corr, max, then carry out following assign operation
δ
I=k; Otherwise, then do not carry out any operation; Make k=k+1, continue circulation;
Wherein, the maximum power value P of all correlated serieses
Corr, maxAnd corresponding to maximum power value P
Corr, maxThe average power content P of correlated series
Corr, mvgInitial value is put and is 0; I
Corr, peakInitial value is 0; δ
IInitial value is 0.
36, device as claimed in claim 35 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for sample-by-sample ground and carry out r
Pn(n) exp (j2 π k Δ Bn/F) multiply operation is to realize sequence r
Pn(n), n=I
Coarse-L
Ds, max~I
Coarse+ L
Ds, max+ P-1 does the integer frequency bias compensation;
Wherein exp (x) represents e
xOperation, e=2.71828..., j represent plural indicator, F represents the baseband sampling rate, is 7.56MHz.
37, device as claimed in claim 36 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for order
To obtain the sample point s of correlated series
Corr(l);
Wherein, conj () expression complex conjugate operation.
38, device as claimed in claim 37 is characterized in that, the performance number of described correlated series and integer factor determining unit are further used for order
And order
And order
To obtain power sequence P
Corr(l), l=0,1 ..., 2L
Ds, maxMaximum power value P
Corr, max tAnd this maximum power value P
Corr, max tCorresponding power sequence sample point index I
Corr, peak t, and the average power P of power sequence
Corr, avg t, wherein maxima operation is got in max () expression, and the operation of maximum corresponding index value is got in argmax () expression, and mean () represents to average operation.
39, device as claimed in claim 38 is characterized in that, described comparing unit is further used at P
Corr, maxSmaller or equal to T
PowerP
Corr, avgThe time, undated parameter, and export performance number and the integer factor determining unit of an enable signal to described correlated series.
40, device as claimed in claim 39 is characterized in that, described comparing unit is further used for upgrading T
Power, δ
I, maxPerhaps L
Ds, maxIn any one or two or more combination in any.
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