CN101233619A - 微电子部件的封装及其制造方法 - Google Patents
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Abstract
本发明涉及一种微电子部件的封装(50,70),其包括:载体元件(12),具有包含导线(14)的第一侧(16);微电子部件(20),具有第一表面(24)和与第一表面朝向相反的第二表面(23);通过所述第二表面来把微电子部件安装在所述第一侧上并且经由键合线(28)把微电子部件连接到导线;一种聚合密封材料(30),密封所述键合线并且暴露所述第一表面(24)的中心区(40),该密封材料包括处在所述第一侧上的外边缘(36)和处在所述第一表面上的内边缘(38);与密封材料邻接的堤坝(42,44);其中,所述堤坝(44)包括处在所述第一侧(16)上的台阶状表面过渡(46),表面过渡邻接所述外边缘(36)。在密封材料的制造过程中,堤坝(44)影响外边缘(36)和内边缘(38)的形成并且扩大了中心区(40)的面积。本发明还涉及制造这种微电子部件封装的方法。
Description
技术领域
本发明涉及一种微电子部件的封装,其包括:载体元件,该载体元件具有导线;微电子部件,其被安装在载体元件上并且经由键合线连接到导线;以及密封材料,其用于密封键合线并暴露微电子部件的上表面的中心区。
背景技术
微电子部件的这种封装是公知的。下面描述现有技术中已知的这类封装的两种常见设计,以给出本发明的介绍。在图1和2中示出了这些设计,其中相同的标号表示相同或相似的部分。图1示出微电子部件的封装的示意截面图。封装10包括载体元件12,其具有包括导线14的第一侧16。微电子部件20通过粘合剂22安装在衬底的裸片焊盘18上,粘合剂22通常是导电和/或导热粘合剂。以这种方式,裸片焊盘(优选地包括金顶层)可以充当散热以及接地区域。典型地,微电子部件和裸片焊盘为四边形或甚至正方形的形状。微电子部件20具有第一表面24以及与第一表面24朝向相反的第二表面23。微电子部件通过它的第二表面23连接到载体元件12的第一侧16。微电子部件20包括在图中示意性示出的接触端子26或键合焊盘。接触端子26经由各个键合线(例如细金线)28被连接到各根导线14,一个末端附着于导线14而另一末端附着于微电子部件20。导线为作为微电子装置的完整封装提供输入和/或输出端子用以接收输入信号或提供输出信号。由于进行这种键合的方法是公知的,所以在此不必详细说明。
外层32,诸如阻焊层,覆盖了载体元件12的导线14中的一部分,层32确定了在第一侧16的连接区域34。连接区域34被用来把微电子装置连接到外部。例如区域34能被焊接或连接到其它电子装置或部件的连接器或端子。通常也已知这种连接,在这里不需要进一步说明。
密封材料30部分地密封载体元件12、微电子部件20和键合线28的组件。这种密封材料典型地包括一种聚合材料,通过某种注入装置把所述聚合材料注入到各个区域上。通常使用环氧基材料,其在注入后固化,在微电子部件周围形成环氧材料的闭环。注入装置被分别恰好定位在第一侧上和在第一表面上,并且在分配环氧材料时按照期望的图形移动,硬化后环氧材料形成上述闭环。在现有技术中,密封材料30有时指的是圆顶封装材料或圆顶封装环。固化后,密封材料30分别确定处在第一侧16上的外边缘36和处在第一表面24上的内边缘38。
内边缘38确定了微电子部件的暴露的中心区40。很多不同类型的微电子装置需要在密封塑性封装中开口,以暴露一个对周围环境敏感或活性(active)的区域。第一例子是微机电系统(MEMS),诸如安全气囊加速记和陀螺装置,这些装置包含独立式的结构,这些结构必须能移动、旋转等。同样地,具有化学敏感、压力敏感、或温度敏感区域的微传感器也必须通过传感器表面上的没有遮挡地暴露的区域暴露于环境。最后,光学活性微电子装置需要通过塑性封装中的开口或暴露区域进行光访问。光学活性装置的例子是电荷耦合器件(CCD)、光电池、光电二极管、和垂直空腔表面发射激光器(VCSEL’S)。这些装置中某些发射光而某些接收光;它们都被认为是“光学活性”的。所有装置的共同点是它们在一个表面上包含传感元件,这个传感元件必须没有遮挡地暴露于环境中以接收或提供来自外部环境的各个输入或输出信号。实际上已知这些类型的微电子装置的功能,因此在这里就不详细讨论。
如图1所示的这种微电子装置的一个问题是中心区40的总表面积难以控制。当密封材料被注入时,它将朝着图1中的箭头A、B和C所指示的方向流动。密封材料的最后形状至少依赖这些参数:注入过程、注入材料的材料特性(尤其它的流变能力特性)、注入前封装的确切几何形状和固化参数。考虑到这么多的影响因素,当注入密封材料时,很难获得关于中心区的总表面积的高处理可靠性。这样会减小必须没有遮挡地暴露的微电子部件上的传感元件的操作窗口,从而将导致收率损失大。当中心区被限制太多时,微电子部件不能正确地工作。因此,需要影响或控制密封材料的最后形状,尤其是控制其内边缘的形成。
美国专利6,674,159通过公布了类似于图1的封装解决了前段中所提到的问题。这种封装在图2中示出;封装50包括堤坝42,堤坝42被放置或被制作在微电子部件20的第一表面24的上面。应该注意US 6,674,159所公布的实际微电子装置在关于微电子部件与载体元件的连接结构上有某些不同的设计,例如没有裸片焊盘而是光学透明材料的窗口。然而这个不同与本发明不相关。相关的是US6,674,159中的封装也具有一个微电子部件,该微电子部件在上表面上具有中心区,这个中心区暴露于来自外部环境的输入和输出信号,并且该部件被安装在衬底或载体元件上,其中都通过键合线连接部件。聚合密封材料30被灌注或分配进堤坝42外的区域的键合线28的周围,用以密封和保护键合线28。堤坝42环绕中心区40并且阻止密封材料30流进中心区40。
US6,674,159中所提出的解决办法的一个明显的缺点是堤坝占据了微电子装置的上表面的相当宝贵的空间。这将减小接触端子和/或传感元件所能获得的面积。而且,这个表面包括敏感微电子装置,当把堤坝安装在微电子部件上时,这些微电子装置很容易被破坏。另一个缺点是例如通过粘合层把堤坝安装在微电子部件的表面可能导致位于附近的键合焊盘的污染。最后,堤坝的形成和安装向封装的制造过程添加了另外的处理步骤。
发明内容
本发明的目的是提供一种微电子部件的封装,这种封装能够使微电子部件获得具有足够表面积的暴露区,同时其相应的上表面不被干扰。因此,本发明提供一种微电子部件的封装,包括:
载体元件,具有包含导线的第一侧;
微电子部件,具有第一表面以及与第一表面朝向相反的第二表面;微电子部件通过所述第二表面被安装在所述第一侧上并且经由键合线与导线连接;
聚合密封材料,其密封键合线以及暴露所述第一表面的中心区,密封材料包括处在所述第一侧的外边缘和处在所述第一表面的内边缘;
堤坝,与所述密封材料邻接;
其中,堤坝包括处在所述第一侧的台阶状表面过渡,这个表面过渡与所述外边缘邻接。本发明基于以下认识,即在第一侧具有这样的表面过渡不仅影响密封材料外边缘而且影响内边缘的形成。实验已经指出这种堤坝不仅限制密封材料如图1中的方向B所示的向外流动而且还明显地限制方向C所指示的向内流动,因此扩大了中心区。所以,在制造密封材料的过程中,堤坝影响了外边缘和内边缘的形成。这改进了对中心区总面积的控制并且保证了这个表面积高于临界水平。因此改进了注入密封材料过程中的处理能力。这种现象的完整的理论解释还没有被发现,但是应该说已经超出了本公开的范围。假设由于外边缘与表面过渡邻接,所以在第一侧的接触角大大地增加,那么在固化阶段,密封材料上的变化的表面张力也会影响第一表面或内边缘上的接触角。
在一个优选的实施例中,在第一侧提供一个外层,所述层保护导线的一部分,其中所述表面过渡处在一方面为所述外层、另一方面为所述第一侧的所述导线和底层之间。外层优选地是阻焊层。阻焊层被特别设计用以既保护导电表面轨迹又在焊接过程中用以防止焊桥。在安装微电子部件前,这种层经常被应用在载体元件上。由于正常情况下在该外层和它下面的第一层或导线之间的某种表面过渡已经存在,所以可以有利地使用这个外层来产生堤坝。在这种情况下,应该确保正确放置产生表面过渡的外层的边缘并且保证它具有足够的厚度。
根据另一优选实施例,堤坝包括顶层,该顶层处在所述第一侧并且与所述外边缘相邻。尤其优选地,这个顶层呈矩形条带形状。这允许应用现有载体元件,这些载体元件只需要附加的顶层就能适合于根据本发明的封装。通过应用矩形条带形状的层,保证了需要最小数量的附加材料并且密封材料采用优选的形状。
根据另一优选实施例,堤坝的高度小于密封材料高度的十分之一。已经发现,只需一点材料在第一侧产生台阶状表面过渡即可满足本发明的目的。
根据前面提到的本发明实施例中的任何一个,本发明还涉及将用在微电子部件的封装中的载体元件。
根据前面提到的本发明实施例中的任何一个,本发明还涉及包括微电子部件封装的微电子装置。
本发明还进一步涉及制造微电子部件封装的方法,该方法包括:
- 在第一侧提供具有导线的载体元件;
- 在第一侧上提供包括台阶状表面过渡的堤坝;安装具有第一表面以及与第一表面朝向相反的第二表面的微电子部件,其中微电子部件的第二表面与载体元件的第一侧连接;
- 把微电子部件和导线进行引线键合;
- 把流体聚合密封材料分配给载体元件和微电子部件的组件以密封引线键合,同时暴露第一表面的中心区,并且密封材料的外边缘与表面过渡邻接;
- 在炉内固化密封材料。
优选地,在第一侧提供堤坝的步骤包括在第一侧上应用一个矩形条带形状的顶层。这种方法使得制造的封装具有足够表面积的中心区而不影响第一表面,并且只需要对现有部件做很小的改动。
注意美国专利6,861,683和6,303,978示出一种微电子部件的封装,该封装具有在载体元件的第一侧提供堤坝,所述堤坝邻接密封材料的外边缘。然而这些封装之间的重要区别是密封材料完全填满了堤坝和载体元件之间的空隙而不保留暴露于环境的中心区。通过应用透明的密封材料,该封装实际上可以用于需要用以提供和接收光信号的“光学活性区域”的微电子装置,但是这种封装明显地不能被用于以下微电子装置,诸如MEMS系统或在上表面包括有对热、压力或化学物质敏感的传感元件的装置。
附图说明
参考图表,接下来的描述将进一步说明本发明的上述方面以及其它方面、特征和优点,其中相同的标号表示相同或类似的部分,其中:
图1示出根据现有技术的微电子部件的封装的横截面图;
图2示出根据现有技术的微电子部件的另一封装的横截面图;
图3示出根据本发明的微电子部件的封装的优选实施例的横截面图;
图4a和图4b分别示出根据现有技术(图4a)和根据本发明(图4b)的微电子部件的封装的透视俯视图。
具体实施方式
在图3中,示出封装70的横截面图,该图是沿图4b中的线3-3截取的。封装70包括提供在第一侧的外层32上的堤坝44。该堤坝包括台阶状表面过渡46,台阶状表面过渡处在外层32和导线14或在外层下的层49(见图4a和图4b)之间。在圆顶封装材料30的固化过程中,该堤坝影响圆顶封装材料30的形状从而扩大中心区40的宽度L并且因此扩大中心区的表面面积。处理外层32的各个内边缘48(见图1)、使密封材料面对适当位置并且在层32的顶部上应用一个附加层,该附加层与层32的所述边缘平行,从而形成了堤坝44,如图3所示。另一种方案是,将外层32的边缘48布置得更靠近载体元件12的外部,而附加层被应用在导电轨迹和第一底层的上面,条带状的附加层分别邻接外层32和外边缘36。优选地,在这种情况下顶层被制成稍微厚些,或者至少比外层32厚。
外层32优选地是阻焊层,该层经常被应用于这些类型的封装中以覆盖和保护导电表面轨迹。
在第一侧产生表面过渡的备选方案是在外层32中布置一个凹槽,所述凹槽的一个基本上垂直的外壁用作所需的表面过渡。针对这种实施例,外层32应该具有足够的厚度。另一种可能的方案是,从图1中的实施例开始,不应用任何附加层,布置外层32使得其内边缘48(见图1)被移动到载体元件12的外部(方向B和C)。通过这种方法内边缘48可以形成表面过渡,密封材料30邻接这个边缘。对于这种实施例,外层32也应该具有足够的厚度。目前通常使用的防护外层的层厚度是不够的。
根据本发明的台阶状表面过渡应该是这样的:与密封材料的外边缘的周围区域中的第一侧是平坦的情况相比,台阶状表面过渡影响或大大增加了与第一侧的这个过渡邻接的密封材料的接触角。在与该过渡邻接的两个表面之间不需要垂直的壁。
堤坝的高度h优选地比圆顶封装环30的高度H低很多,H至少是h的十倍。典型的尺寸是圆顶封装高度为400μm而堤坝高度为20-30μm。实验已经显示对于具有2.75mm2原始表面积的封装来说,当根据本发明的堤坝被应用在第一侧上时,这个面积增加到5.724mm2。
载体元件12可以是包含导电结构或金属结构的任何元件,这种结构被嵌入在非导电复合材料中并且适合于容纳微电子部件。
可以把堤坝44的产生与载体元件12的制造集成到一起。优选地增加附加的阻焊顶层,该顶层呈矩形形状的条带。结合该堤坝相对小的高度,这意味着为了创建根据本发明的工作实施例,不仅需要较少的附加材料而且附加处理也相对少。与用以获得如US专利6,674,159所公布的堤坝所需要的附加制造相比,该附加处理尤其地少。在这些情况下,附加工作是部分封装本身的制造过程的一部分,并且这些附加工作涉及对微电子部件的处理步骤,而根据本发明,附加工作仅仅涉及对载体元件的很小改动。
按照下面的方式,可以在现有的载体元件或衬底上形成条带状的堤坝。首先,在第一侧的外部阻焊层顶部丝网印刷一层流体阻焊材料。然后把暴露矩形条带的掩模放置在这个层上,利用紫外光装置固化这个条带。最后化学剥除未曝光部分,留下所需要的堤坝结构。
图4a和4b分别示出根据本发明的微电子部件的封装70和根据现有技术的封装10的透视俯视图。图4b更清晰地示出具有矩形条带形状的堤坝44,密封材料30邻接该条带。该条带优选地是正方形。该堤坝包括在条带的上表面和导电轨迹14或第一底层49(在外层32正下)之间的台阶状表面过渡。为了清楚起见,仅示出了一半圆顶封装材料。密封材料30把中心区30暴露给外界环境,当在存在堤坝44的情况下固化圆顶封装材料时,中心区的表面积更大并且更好控制。通过对比图4a和图4b的圆顶封装材料30清晰地描述了这点。
对于密封材料,优选地使用环氧材料,诸如HysolFP4323。采用CAMALOT 3700环氧分配器把密封材料分配在封装上,该分配器具有一个以10-20mm/s的分配速度、40-60psi的压力和距离微电子部件0.7-0.8mm的高度来操作的注入针。分配环氧材料后,环氧材料在大约170℃的炉内固化大约3小时。
本发明可以被应用于所有封装,这些封装需要在微电子部件的上表面具有暴露的中心区域。当讨论如图1和2所示的现有技术时已经讨论了这些封装。一个典型的实例是把该封装应用于光电二极管集成电路。单个光学拾波器IC例如可以被用于读/写应用从而形成一个适合所有类型的CD和DVD装置的光学处理单元。根据本发明的封装可以进一步应用于球栅阵列(BGA)类型的封装以及用于体声波滤波器。
可以尤其有利地把根据本发明的封装用于所谓的蓝光光盘设备中所使用的光电二极管器件。这些设备使用紫外激光光束。目前已知的聚合或环氧材料不能抵挡这种类型的激光辐射。这意味着了代替保留暴露的中间区而利用光学透明材料不是这些蓝光装置的选择。而且,重要的是中心区具有保证激光辐射不损害密封材料的足够面积。
微电子部件可以是任何合适的部件,诸如集成电路、光电池或MEMS器件。而且可以组合几种微电子部件,这些微电子部件在封装(也称为系统级封装)内部彼此连接。在MEMS元件出现在微电子部件的第一表面的情况下,采用某种盖子(在图中没有示出)来保护暴露区域是有利的,这种盖子被连接到密封材料的外部区域。这种元件通常必须能够在一个自由空间内旋转、平移等,至于在其它情况下则优选地保护这种元件以免受外界影响。
所属领域技术人员应该明确的是本发明不限于上面讨论的示范性实施例,多种改变或修饰可以属于由权利要求所限制的本发明的保护范围内。
Claims (9)
1.一种微电子部件的封装(50,70),包括:
-载体元件(12),具有包含导线(14)的第一侧(16);
-微电子部件(20),具有第一表面(24)以及与第一表面朝向不同的第二表面(23);通过所述第二表面,该微电子部件被安装在所述第一侧上并且经由键合线(28)被连接到导线;
-聚合密封材料(30),其密封所述键合线并且暴露所述第一表面(24)的中心区(40),该密封材料包括处在所述第一侧的外边缘(36)和处在所述第一表面的内边缘(38);
-堤坝(42,44),与所述密封材料邻接;
所述堤坝的特征在于,堤坝(44)包括一个处在所述第一侧(16)的台阶状的表面过渡(46),该表面过渡邻接所述外边缘(36)。
2.如权利要求1所述的微电子部件的封装(50),其特征在于,在第一侧(16)上提供外层(32),所述外层保护导线(14)的一部分,并且其特征还在于,把所述表面过渡(46)布置在一方面为所述外层和另一方面为所述第一侧(16)上的所述导线与下层(49)之间。
3.如权利要求1所述的微电子部件的封装(50),其特征在于,所述堤坝(44)包括布置在与所述外边缘(36)邻接的所述第一侧(16)的顶层。
4.如权利要求3所述的微电子部件的封装(50),其特征在于,所述顶层形成呈矩形形状的条带。
5.如权利要求1所述的微电子部件的封装(50),其特征在于,所述堤坝的高度(h)小于所述密封材料的高度(H)的十分之一。
6.一种在根据上述权利要求中任何一项的微电子部件的封装(50)中使用的载体元件(12)。
7.一种包括根据权利要求1-5中的任何一项的微电子部件的封装(50)的微电子装置。
8.制造根据上述权利要求中任何一项的微电子部件的封装的方法,该方法包括:
-提供载体元件,该载体元件在第一侧具有导线;
-在第一侧提供堤坝,该堤坝包括台阶状表面过渡;
-安装具有第一表面和与第一表面朝向不同的第二表面的微电子部件,其中所述微电子部件的第二表面与所述载体单元的第一侧连接;
-把所述微电子部件引线键合到所述导线;
-把流体聚合密封材料分配到载体元件和微电子部件的组件上,从而密封引线键合而暴露所述第一表面的中心区,所述密封材料的外边缘与所述表面过渡邻接;
-在炉内固化密封材料。
9.根据权利要求8所述的制造微电子部件的封装的方法,其中在第一侧提供堤坝的步骤包括在第一侧应用一个具有矩形条带形状的顶层。
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EP05106971 | 2005-07-28 | ||
EP05106971.4 | 2005-07-28 | ||
PCT/IB2006/052385 WO2007012992A1 (en) | 2005-07-28 | 2006-07-13 | A package and manufacturing method for a microelectronic component |
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EP (1) | EP1913641A1 (zh) |
JP (1) | JP2009503837A (zh) |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103026513A (zh) * | 2010-07-22 | 2013-04-03 | 欧司朗光电半导体有限公司 | 半导体器件和用于制造半导体器件的方法 |
CN113526449A (zh) * | 2020-04-14 | 2021-10-22 | 鹰克国际股份有限公司 | 芯片封装结构及其制法 |
Families Citing this family (12)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8376801B2 (en) | 2008-03-13 | 2013-02-19 | Nxp B.V. | Luminescent component and manufacturing method |
US8247827B2 (en) * | 2008-09-30 | 2012-08-21 | Bridgelux, Inc. | LED phosphor deposition |
US9230874B1 (en) * | 2009-07-13 | 2016-01-05 | Altera Corporation | Integrated circuit package with a heat conductor |
EP2287596B1 (en) * | 2009-08-11 | 2014-03-19 | Sensirion AG | Sensor with glob-top and method for manufacturing the same |
DE102010031055B4 (de) * | 2010-07-07 | 2023-02-23 | Robert Bosch Gmbh | Sensormodul und Verfahren zum Herstellen eines Sensormoduls |
DE102010047156A1 (de) * | 2010-09-30 | 2012-04-05 | Osram Opto Semiconductors Gmbh | Optoelektronisches Bauelement und Verfahren zur Herstellung eines optoelektronischen Bauelements |
FR2986902A1 (fr) * | 2012-02-09 | 2013-08-16 | Pixinbio | Procede d'assemblage d'un dispositif portable d'analyse d'echantillon biologique |
CN109411486B (zh) * | 2017-08-16 | 2020-12-08 | 胜丽国际股份有限公司 | 感测器封装结构 |
EP3450391A1 (en) * | 2017-08-28 | 2019-03-06 | Indigo Diabetes N.V. | Encapsulation of sensing device |
JP2020047664A (ja) * | 2018-09-14 | 2020-03-26 | キオクシア株式会社 | 半導体装置および半導体装置の作製方法 |
DE102021133724A1 (de) * | 2020-12-25 | 2022-06-30 | Nichia Corporation | Lichtemittierendes modul und verfahren zum herstellen eines lichtemittierenden moduls |
DE102021113715A1 (de) * | 2021-05-27 | 2022-12-01 | OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung | Halbleiterbauelement und Verfahren zur Herstellung eines Halbleiterbauelements |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5219712A (en) * | 1987-11-28 | 1993-06-15 | Thorn Emi Plc | Method of forming a solid article |
US5175612A (en) * | 1989-12-19 | 1992-12-29 | Lsi Logic Corporation | Heat sink for semiconductor device assembly |
US6111306A (en) * | 1993-12-06 | 2000-08-29 | Fujitsu Limited | Semiconductor device and method of producing the same and semiconductor device unit and method of producing the same |
US5866953A (en) * | 1996-05-24 | 1999-02-02 | Micron Technology, Inc. | Packaged die on PCB with heat sink encapsulant |
DE19810060B4 (de) * | 1997-05-07 | 2005-10-13 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Verfahren zur Verbindung eines Bauelements mit einem Substrat und eine damit hergestellte elektrische Schaltung |
US6246566B1 (en) * | 1999-02-08 | 2001-06-12 | Amkor Technology, Inc. | Electrostatic discharge protection package and method |
US6566745B1 (en) * | 1999-03-29 | 2003-05-20 | Imec Vzw | Image sensor ball grid array package and the fabrication thereof |
FR2798226B1 (fr) * | 1999-09-02 | 2002-04-05 | St Microelectronics Sa | Procede de mise en boitier d'une puce de semi-conducteur contenant des capteurs et boitier obtenu |
JP3406270B2 (ja) * | 2000-02-17 | 2003-05-12 | 沖電気工業株式会社 | 半導体装置及びその製造方法 |
US6384473B1 (en) * | 2000-05-16 | 2002-05-07 | Sandia Corporation | Microelectronic device package with an integral window |
US6303978B1 (en) * | 2000-07-27 | 2001-10-16 | Motorola, Inc. | Optical semiconductor component and method of manufacture |
US6787388B1 (en) * | 2000-09-07 | 2004-09-07 | Stmicroelectronics, Inc. | Surface mount package with integral electro-static charge dissipating ring using lead frame as ESD device |
DE10118231A1 (de) * | 2001-04-11 | 2002-10-17 | Heidenhain Gmbh Dr Johannes | Optoelektronische Baulelmentanordnung und Verfahren zur Herstellun einer oploelektronischen Bauelementanordnung |
US6603183B1 (en) * | 2001-09-04 | 2003-08-05 | Amkor Technology, Inc. | Quick sealing glass-lidded package |
US6861750B2 (en) * | 2002-02-01 | 2005-03-01 | Broadcom Corporation | Ball grid array package with multiple interposers |
JP4686134B2 (ja) * | 2004-04-26 | 2011-05-18 | パナソニック株式会社 | 光学デバイスおよびその製造方法 |
-
2006
- 2006-07-13 EP EP06780068A patent/EP1913641A1/en not_active Withdrawn
- 2006-07-13 JP JP2008523497A patent/JP2009503837A/ja not_active Withdrawn
- 2006-07-13 CN CN2006800274397A patent/CN101233619B/zh active Active
- 2006-07-13 WO PCT/IB2006/052385 patent/WO2007012992A1/en active Application Filing
- 2006-07-13 US US11/996,331 patent/US20090127690A1/en not_active Abandoned
- 2006-07-25 TW TW095127118A patent/TW200709363A/zh unknown
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103026513A (zh) * | 2010-07-22 | 2013-04-03 | 欧司朗光电半导体有限公司 | 半导体器件和用于制造半导体器件的方法 |
CN113526449A (zh) * | 2020-04-14 | 2021-10-22 | 鹰克国际股份有限公司 | 芯片封装结构及其制法 |
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TW200709363A (en) | 2007-03-01 |
CN101233619B (zh) | 2012-02-15 |
WO2007012992A1 (en) | 2007-02-01 |
JP2009503837A (ja) | 2009-01-29 |
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