CN100465612C - Defect detection method - Google Patents
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- CN100465612C CN100465612C CNB200510076355XA CN200510076355A CN100465612C CN 100465612 C CN100465612 C CN 100465612C CN B200510076355X A CNB200510076355X A CN B200510076355XA CN 200510076355 A CN200510076355 A CN 200510076355A CN 100465612 C CN100465612 C CN 100465612C
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Abstract
The invention provides a method for detecting defaults. The method comprises steps of: providing a semi-conductor to be detected which has at least one default; then employing failure analysis (FA) technology to detect out at least one suspected area from the back side of the semi-conductor; employing a physical value to mark plural reference flags around the suspected area on the back side of the semi-conductor; finally employing these reference marks to point out the relative positions of the default from the front side of the semi-conductor.
Description
Technical field
The present invention relates to a kind of semiconductor detection piece defect inspection method, particularly relate to a kind of method of carrying out defects detection in the semiconductor detection piece back side.
Background technology
In the manufacturing process of integrated circuit, polytechnic factor usually is all linked with one another, that is to say that the defective that previous processing step produced usually also produces corresponding defective in next or technology afterwards, to such an extent as to cause the problem on the final product yield rate.Therefore, can make analysis to the defective that has produced in real time, find out the reason that defective takes place, and got rid of, just become one of core competence of product guarantor technology.And along with the semiconductor element size is constantly dwindled, the flaw size that is caused and be enough to yield rate is exerted an influence by semiconductor technology, also microminiaturization constantly.Under this kind trend, do accurate square section to these small defectives analyzes to have become and more and more is not easy, so various micro-and failure analysis (failure analysis, FA) technology constantly produces, in the hope of overcoming this problem by to test piece preparation method's improvement, the lifting of analytical instrument precision and the mutual utilization of analytical instrument and analysis principle.
Please refer to Fig. 1, Fig. 1 is the schematic flow sheet of a defect inspection method 10 in the prior art.As shown in Figure 1, at first take a sample 12, selected semiconductor wafer is that sample carries out follow-up defects detection and analytical work, then carries out a defect detection procedure 14.Generally speaking, utilize the mode of suitable defect detection machine mostly, compare and detect all defect on this semiconductor wafer with large area scanning.Because the defects count on the semiconductor wafer is quite big mostly, therefore can not carry out sweep electron microscope (SEM) in artificial mode one by one on practice detects again, be with for convenience's sake, existing mostly is to carry out artificial defect classification 16 earlier, set up a defect database, again by in all defect that can detect, sternly select some more representative major defects (killer defect) type, at last allow the slip-stick artist selected sample be carried out defective again and detect (defect review) 18 again in artificial mode, further this defective is carried out defect cause analysis (defect root cause analysis) 20, the phase is found out the method that suppresses or reduce these defectives.
In the prior art, the maximum problem that suffers from is exactly often can find a large amount of defects count in defects detection 14, for example possibility is 1,000, but the slip-stick artist often also can only therefrom pick out a part of defective as sample in the mode of sampling, for example 100, carry out defective and detect 18 and the work of follow-up defect analysis, eliminating again.Generally speaking, choosing of initial stage major defect (killer defect) almost is to judge by slip-stick artist's personal experience fully to carry out outside the check and analysis, most of times, also only therefrom some defectives of picked at random detect 18 sample again as defective, this will seriously fall and cause expending of time and manpower, the accuracy of the follow-up defect analysis of related influence.
In addition, in the middle of all defectives, be located immediately at the defective of semiconductor wafer surface except great majority, can utilize positive analytical technology (front side analysis) to do failure analysis (FA), the closely bound up defective of many and technology also is present in lower floor, bottom and the back side of semiconductor wafer, and to detect be arranged in the wafer bottom defective often technology very the difficulty step, especially for the chip (multi metal layers chip) of multiple layer metal lead.Therefore, convenient at present also assisting with positive analytical technology done more accurate failure analysis (FA) with back side analytical technology (backside analysis), and when being detected on the back side analytical technology of semiconductor wafer, generally can only utilize layout guidance system (layout navigationsystem) to carry out defects detection in the semiconductor element back side.Yet, because circuit arrangement map is each client's a height trade secret, and can't learn easily, the defect analysis when therefore often causing the wafer foundries, get rid of the significantly prolongation of time or when volume production, electrical property efficiency (electrical performance), fiduciary level (reliability), yield rate (yield rate) and production capacity (throughput) caused and seriously influence.Be with, press for a kind of quick and efficient defect inspection method at present, to address the above problem.
Summary of the invention
Fundamental purpose of the present invention is to provide a kind of defect inspection method, utilizes layout guidance system (layout navigation system) to carry out spent cost of defects detection and time in the semiconductor detection piece back side to improve to have now.
The disclosed a kind of defect inspection method of claim according to the present invention, the semiconductor detection piece at first is provided, and comprise at least one defective in this semiconductor detection piece, utilize a failure analysis (FA) technology then, detect at least one suspicious abnormal region (suspected area) in the back side of this semiconductor detection piece, then utilize a physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of reference markers, utilize these a plurality of reference markers at last, calibrate the relative position of this defective in the front of this semiconductor detection piece, wherein this physical energy is a laser.
The disclosed another kind of defect inspection method of claim according to the present invention, the semiconductor detection piece at first is provided, and comprise at least one defective in this semiconductor detection piece, utilize a failure analysis (FA) technology then, detect at least one suspicious abnormal region (suspected area) in the back side of this semiconductor detection piece, then utilize one first physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of first reference markers, utilize one second physical energy and these a plurality of first reference markers at last, form a plurality of second reference markers in the front of this semiconductor detection piece, to calibrate the relative position of this defective, wherein this first physical energy and second physical energy are laser.
The disclosed another kind of defect inspection method of claim according to the present invention, the semiconductor detection piece at first is provided, and comprise at least one defective in this semiconductor detection piece, utilize a failure analysis (FA) technology then, detect at least one suspicious abnormal region (suspected area) in the back side of this semiconductor detection piece, then utilize a physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of first reference markers, utilize a voltage-contrast unusual (voltage contrast abnormal) and these a plurality of first reference markers at last, calibrate the relative position of this defective in the front of this semiconductor detection piece, wherein this physical energy is a laser.
Be different from the method for carrying out defects detection in the semiconductor detection piece back side that has now, the present invention utilizes failure analysis (FA) technology earlier, to find out the position of suspicious abnormal region in the back side of semiconductor detection piece, then after the locking physical energy damages signal, utilize a contactless physical energy again, around the suspicious abnormal region at the semiconductor detection piece back side, form a plurality of reference markers in destructive mode, use the position of demarcating defective, therefore can effectively improve to have now and utilize the layout guidance system to carry out spent cost of defects detection and time in the semiconductor element back side.
Description of drawings
Fig. 1 is the schematic flow sheet of a defect inspection method in the prior art.
Fig. 2 inspects and demarcates the synoptic diagram of defective for first embodiment of the invention in the semiconductor detection piece back side.
Fig. 3 is the top view in the semiconductor detection piece front of first embodiment of the invention.
Fig. 4 to Fig. 6 inspects and demarcates the synoptic diagram of defective for another embodiment of the present invention in the back side, the front of semiconductor detection piece.
Fig. 7 inspects and demarcates the synoptic diagram of defective for further embodiment of this invention in the front of semiconductor detection piece.
The simple symbol explanation
12 samplings of 10 defect inspection methods
The classification of 14 defects detection, 16 artificial defects
18 defectives detect 20 defect cause analyses again
100 semiconductor detection pieces, 102 fronts
104 back sides, 106 defectives
120 laser beam emitting devices, 122 reference markers
200 semiconductor detection pieces, 202 fronts
204 back sides, 206 defectives
220 laser beam emitting devices, 222 reference markers
224 reference markers, 300 semiconductor detection pieces
302 positive 306 defectives
322 reference markers
Embodiment
Please refer to Fig. 2.Fig. 2 inspects and demarcates the synoptic diagram of defective for first embodiment of the invention in the semiconductor detection piece back side.As shown in Figure 2, semiconductor detection piece 100 at first is provided, semiconductor detection piece 100 is looked application technology stage difference and be can be semiconductor wafer (wafer), crystal grain (die) or chip (chip), at this is example with the semiconductor wafer, semiconductor detection piece 100 comprises positive 102 and one back side 104, and comprises an at least one defective 106 or a suspicious abnormity point (suspected spot) in the semiconductor detection piece 100.Wherein, defective 106 or suspicious abnormity point can be analyzed by focus (hot spot), infrared ray brings out impedance variation analysis (IR OBIRCH), radiation failure analysis (FA) technology such as (emission) is followed the trail of the suspicious abnormal signal (suspected signal) that semiconductor detection piece 100 back sides 104 are presented, and then the position of locking suspicious abnormal region (suspected area).
To bring out the mode of impedance variation analysis (OBIRCH) be example in order to carry out a laser beam with photon microscope (photo-emission microscope).At first, utilize laser beam to scan at the back side 104 of semiconductor detection piece 100.In scanning process, the portion of energy of laser beam then can be converted into heat.If exist any defective or cavity on semiconductor detection piece 100, near the heat conduction these zones will be different from other complete area, and causes that local temperature changes, and forms suspicious abnormal signal.In addition, also can utilize a fixed voltage conducting semiconductor detection piece 100 two ends, and the size that changes by electric current that this voltage provided is corresponding with the pixel intensity of one-tenth image, and when locations of pixels then changes with electric current and the position arrived of laser scanning is corresponding.So, just can produce the OBIRCH picture and determine defective locations.By this, the present invention can seek the defective in the semiconductor detection piece 100, to defect location in the circuit, such as the cavity in the lines, the cavity under the through hole etc., and effectively detects short circuit or electric leakage position with effectively.
One contactless physical energy (physical energy) then is provided, around the suspicious abnormal region (suspected area) at the back side 104 of semiconductor detection piece 100, forms a plurality of reference markers 122 in destructive mode.In other words, the present invention utilizes aforesaid focus, infrared ray to bring out the position that impedance variation, radiation failure analyses (FA) such as (emission) device (not shown) is found out the suspicious abnormal region (suspected area) at semiconductor detection piece 100 back sides 104 earlier, damage signal (physical energy damage signal) afterwards at the locking physical energy then, facility directly forms a plurality of reference markers 122 around 104 the defectives 106 overleaf with a laser beam emitting device 120, uses the position of demarcating defective 106.
It should be noted that the reference marker 122 around the defective 106 that is formed at the back side 104 needs and can observe it by the front 102 of semiconductor detection piece 100.Please refer to Fig. 3, Fig. 3 is the top view in semiconductor detection piece 100 fronts 102 of first embodiment of the invention.Generally speaking, the thickness of semiconductor wafer between 9000 dusts (
) to 14000 angstroms intervals, and in order to pick out the tram of reference marker 122 in the front 102 of semiconductor detection piece 100, the user can adjust the intensity of laser beam source, form a plurality of destructive damaged points with the back side 104 that is effective in semiconductor detection piece 100, that is aforesaid reference marker 122, and these a plurality of reference markers 122 need and can observe it by the front 102 of semiconductor detection piece 100.
At last utilize optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect again by the front 102 of semiconductor detection piece 100, and look actual state and need the complex rational faculty (as the plasma etching) method or removal rete (delayer) technology of chemical (as the effect of solution) to analyze, find out defective 106 positions and occurrence cause eventually, got rid of.
And according to another embodiment of the present invention, the present invention can utilize at least one contactless physical energy (physical energy) respectively to form a plurality of destructive damaged points respectively at the positive and negative two sides of semiconductor detection piece again, and judges the tram of defective by these a plurality of damaged points.Please refer to Fig. 4 to Fig. 6, Fig. 4 to Fig. 6 inspects and demarcates the synoptic diagram of defective for another embodiment of the present invention in the back side, the front of semiconductor detection piece.
As previous described first embodiment, semiconductor detection piece 200 at first is provided, semiconductor detection piece 200 comprises positive 202 and one back side 204, and comprises an at least one defective 206 or a suspicious abnormity point in the semiconductor detection piece 200.Then utilize aforesaid focus, infrared ray to bring out failure analysis (FA) device (not shown)s such as impedance variation, radiation are found out suspicious abnormal region (suspected area) by semiconductor detection piece 200 back sides 204 position, damage signal (physical energydamage signal) afterwards at the locking physical energy then, utilize a laser beam emitting device 220 directly to form a plurality of reference markers 222 around 204 the defective 206 overleaf immediately, use the position of demarcating defective 206, as shown in Figure 5.And then utilize laser beam emitting device 220 to form a plurality of reference markers 224 in addition in the front 202 of semiconductor detection piece 200, and look actual state, can repeat above-mentioned steps, so that each reference marker 222 at positive 202 reference marker 224 convergences (approach) back side 204, the position of reference marker 222 and the position of semiconductor detection piece 200 back sides 204 reference markers are overlapped mutually, as shown in Figure 6.
Similarly, at last utilize optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect again by the front 202 of semiconductor detection piece 200, and look actual state and need the removal rete technology of complex rational method or chemical to analyze, finding out defective 206 positions eventually is occurrence cause, is got rid of.
In addition, the present invention also can directly utilize a fixed voltage conducting semiconductor detection piece, and changes and calibrate the position of defective in the front of semiconductor detection piece by electric current that this voltage produced.Please refer to Fig. 7, Fig. 7 inspects and demarcates the synoptic diagram of defective for further embodiment of this invention in the front of semiconductor detection piece.Semiconductor detection piece 300 at first is provided, and semiconductor detection piece 300 comprises positive 302 and one back side (figure does not show), and comprises an at least one defective 306 or a suspicious abnormity point in the semiconductor detection piece 300.Then utilize aforesaid focus, infrared ray to bring out the position that failure analysis (FA) device (not shown)s such as impedance variation, radiation are found out the suspicious abnormal region at semiconductor detection piece 300 back sides, after the locking physical energy damages signal, convenient then with forming a plurality of marks 322 around the direct defective 306 overleaf of a laser beam emitting device (not shown).
One fixed voltage then is provided, and utilizes this voltage to form many current lead-through semiconductor detection pieces 300, wherein an end of semiconductor detection piece 300 connects a voltage source Vcc, and the other end is ground connection (ground) then.Because in the laser beam flying process, the portion of energy of laser beam then can be converted into heat, if therefore exist any defective on the semiconductor detection piece, near the heat conduction these defectives will be different from other complete area, causes that local temperature changes and damaging property damaged points.Therefore after destructive damaged points forms, just can utilize this fixed voltage conducting semiconductor detection piece 300, calibrate the position of defective 306 then via near the voltage-contrast the defective 306 unusual (voltage contrast abnormal) by the front 302 of semiconductor detection piece 300.
Compared to the existing method that is used for detecting semiconductor defect, the present invention utilizes failure analysis (FA) technology earlier, to find out the position of suspicious abnormal region in the back side of semiconductor detection piece, then after the locking physical energy damages signal, utilize a contactless physical energy again, around the suspicious abnormal region at the semiconductor detection piece back side, form a plurality of reference markers in destructive mode, use the position of demarcating defective.Follow the unusual modes such as (voltage contrast abnormal) of recycling laser labelling or voltage-contrast, also form a plurality of corresponding reference markers in the front of semiconductor detection piece or highlight the position of defective.At last utilize optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect again by the front of semiconductor detection piece, and the removal rete technology of complex rational method or chemical comes analyzing defect position and occurrence cause, got rid of.Thus, not only can solve the existing difficulty of utilizing the layout guidance system, can improve again to have now and utilize this system to carry out spent cost of defects detection and time in the semiconductor detection piece back side.
The above only is the preferred embodiments of the present invention, and all equalizations of doing according to claim of the present invention change and modify, and all should belong to covering scope of the present invention.
Claims (18)
1. defect inspection method, this defect inspection method comprises the following steps:
The semiconductor detection piece is provided, and comprises at least one defective in this semiconductor detection piece;
Utilize a FAILURE ANALYSIS TECHNOLOGY, detect at least one suspicious abnormal region in the back side of this semiconductor detection piece;
Utilize a physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of reference markers; And
Utilize this a plurality of reference markers, calibrate the relative position of this defective in the front of this semiconductor detection piece,
Wherein said physical energy is a laser.
2. defect inspection method as claimed in claim 1, wherein this semiconductor detection piece comprises semiconductor wafer, crystal grain or chip.
3. defect inspection method as claimed in claim 1, wherein this FAILURE ANALYSIS TECHNOLOGY utilizes focus, infrared ray to bring out the impedance variation analysis, radiation failure analysis device is implemented.
4. defect inspection method as claimed in claim 3, wherein this failure analysis is installed on the relative position of this defective and produces a suspicious abnormal signal in the back side of this semiconductor detection piece, and then detects the position of this suspicious abnormal region.
5. defect inspection method as claimed in claim 1, the step that wherein calibrates the relative position of this defective in the front of this semiconductor detection piece utilizes the unusual method of voltage-contrast to implement.
6. defect inspection method as claimed in claim 1, wherein after the front of this semiconductor detection piece calibrated the relative position of this defective, this defect inspection method also comprises inspected step.
7. defect inspection method as claimed in claim 6, wherein this is inspected step and utilizes optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect the front of this semiconductor detection piece.
8. defect inspection method as claimed in claim 7, wherein this inspects the position that removal rete technology that step also is combined with at least one physical property method or chemical is analyzed this defective.
9. defect inspection method, this defect inspection method comprises the following steps:
The semiconductor detection piece is provided, and comprises at least one defective in this semiconductor detection piece;
Utilize a FAILURE ANALYSIS TECHNOLOGY, detect at least one suspicious abnormal region in the back side of this semiconductor detection piece;
Utilize one first physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of first reference markers; And
Utilize one second physical energy and these a plurality of first reference markers, form a plurality of second reference markers in the front of this semiconductor detection piece, calibrating the relative position of this defective,
Wherein said first physical energy and second physical energy are laser.
10. defect inspection method as claimed in claim 9, wherein this semiconductor detection piece comprises semiconductor wafer, crystal grain or chip.
11. defect inspection method as claimed in claim 9, wherein this FAILURE ANALYSIS TECHNOLOGY utilizes focus, infrared ray to bring out the impedance variation analysis, radiation failure analysis device is implemented, and this failure analysis is installed on the relative position of this defective and produces a suspicious abnormal signal in the back side of this semiconductor detection piece, and then detects the position of this suspicious abnormal region.
12. defect inspection method as claimed in claim 9, wherein after the front of this semiconductor detection piece calibrates the relative position of this defective, this defect inspection method also comprises the step of inspecting in the front that utilizes optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect this semiconductor detection piece.
13. defect inspection method as claimed in claim 12, wherein this inspects the position that removal rete technology that step also is combined with at least one physical property method or chemical is analyzed this defective.
14. a defect inspection method, this defect inspection method comprises the following steps:
The semiconductor detection piece is provided, and comprises at least one defective in this semiconductor detection piece;
Utilize a FAILURE ANALYSIS TECHNOLOGY, detect at least one suspicious abnormal region in the back side of this semiconductor detection piece;
Utilize a physical energy, around this suspicious abnormal region at this semiconductor detection piece back side, form a plurality of first reference markers; And
Utilize a voltage-contrast to reach these a plurality of first reference markers unusually, calibrate the relative position of this defective in the front of this semiconductor detection piece,
Wherein this physical energy is a laser.
15. defect inspection method as claimed in claim 14, wherein this semiconductor detection piece comprises semiconductor wafer, crystal grain or chip.
16. defect inspection method as claimed in claim 14, wherein this FAILURE ANALYSIS TECHNOLOGY utilizes focus, infrared ray to bring out the impedance variation analysis, radiation failure analysis device is implemented, and this failure analysis is installed on the relative position of this defective and produces a suspicious abnormal signal in the back side of this semiconductor detection piece, and then detects the position of this suspicious abnormal region.
17. defect inspection method as claimed in claim 14, wherein after the front of this semiconductor detection piece calibrates the relative position of this defective, this defect inspection method also comprises the step of inspecting in the front that utilizes optical microscope, sweep electron microscope, transmission electron microscope or focused ion beam microscope to inspect this semiconductor detection piece.
18. defect inspection method as claimed in claim 17, wherein this inspects the position that removal rete technology that step also is combined with at least one physical property method or chemical is analyzed this defective.
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| CNB200510076355XA CN100465612C (en) | 2005-06-10 | 2005-06-10 | Defect detection method |
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| CNB200510076355XA CN100465612C (en) | 2005-06-10 | 2005-06-10 | Defect detection method |
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| CN100465612C true CN100465612C (en) | 2009-03-04 |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| TWI608232B (en) * | 2011-11-29 | 2017-12-11 | 克萊譚克公司 | Systems and methods for preparation of samples for sub-surface defect review |
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