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CN100383843C - Electro-optical device, method of driving the same, data line driving circuit and electronic apparatus - Google Patents

Electro-optical device, method of driving the same, data line driving circuit and electronic apparatus Download PDF

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Publication number
CN100383843C
CN100383843C CNB2005101069880A CN200510106988A CN100383843C CN 100383843 C CN100383843 C CN 100383843C CN B2005101069880 A CNB2005101069880 A CN B2005101069880A CN 200510106988 A CN200510106988 A CN 200510106988A CN 100383843 C CN100383843 C CN 100383843C
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CN
China
Prior art keywords
signal
data
throw
over gear
correction
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Expired - Fee Related
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CNB2005101069880A
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Chinese (zh)
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CN1755764A (en
Inventor
河西利幸
城宏明
野泽武史
堀内浩
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Seiko Epson Corp
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Seiko Epson Corp
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
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    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G09G3/3241—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror
    • G09G3/325—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element the current through the light-emitting element being set using a data current provided by the data driver, e.g. by using a two-transistor current mirror the data current flowing through the driving transistor during a setting phase, e.g. by using a switch for connecting the driving transistor to the data driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3283—Details of drivers for data electrodes in which the data driver supplies a variable data current for setting the current through, or the voltage across, the light-emitting elements
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3275—Details of drivers for data electrodes
    • G09G3/3291—Details of drivers for data electrodes in which the data driver supplies a variable data voltage for setting the current through, or the voltage across, the light-emitting elements
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
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    • G09G2320/0276—Adjustment of the gradation levels within the range of the gradation scale, e.g. by redistribution or clipping for the purpose of adaptation to the characteristics of a display device, i.e. gamma correction
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    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Control Of El Displays (AREA)
  • Liquid Crystal (AREA)
  • Electroluminescent Light Sources (AREA)

Abstract

A signal processing unit that generates data signals for controlling gray-scale levels of electro-optical elements includes a first D/A conversion unit that generates gray-scale signals from gray-scale data for designating the gray-scale levels of the electro-optical elements; a storage unit that stores correction data indicating correction values with respect to the gray-scale signals; a second D/A conversion unit that has resolution different from that of the first D/A conversion unit, and that generates correction signals from the correction data stored in the storage unit; and a synthesizing unit that synthesizes the gray-scale signals generated by the first D/A conversion unit with the correction signals generated by the second D/A conversion unit to generate the data signals.

Description

Electro-optical device and driving method thereof, data line drive circuit, e-machine
Technical field
The present invention relates to a kind of electro-optical device, its driving method, data line drive circuit, signal processing circuit and e-machine that the gray scale of pixel is proofreaied and correct.
Background technology
A kind of technology that the gray scale of each pixel is proofreaied and correct had been proposed in the past.For example in the patent documentation 1, disclose and a kind ofly added after the correction data by the D/A conversion, the technology that the gray scale of each pixel is adjusted for the gradation data of specifying each pixel grey scale.
But, in this structure, because the additive value according to gradation data and correction data generates data-signal by 1 D/A converter, therefore produce the minimum value of the correcting value of the data-signal corresponding, be subjected to the problem of the restriction of the resolution (variable quantity of the simulating signal of the lowest order of numerical data (LSB) when changing) when gradation data being carried out the D/A conversion with correction data.That is, owing to generate analog data signal according to gradation data, the data-signal that therefore can not contrast the also little correcting value of the resolution set in the D/A converter is proofreaied and correct.Certainly, if adopt the D/A converter corresponding to improve its resolution, then, so also can proofread and correct the gray-scale value of each pixel accurately because the minimum value of correcting value also can reduce with the numerical data of multidigit more.But, in this case, produce gigantism, the new problem that manufacturing cost also can increase along with the circuit scale of D/A converter.
Patent documentation 1: the spy opens 2000-307424 communique (0008 section and Fig. 1)
Summary of the invention
The present invention proposes just in view of the above problems, and its purpose is, no matter the resolution that a kind of D/A conversion to gradation data is provided how, can both proofread and correct the gray scale of each pixel accurately.
In order to solve above-mentioned problem, relevant signal processing circuit of the present invention, the signal processing circuit of the data-signal that to be a kind of generation control the gray scale of electrooptic element (being pixel), it is characterized in that, possess: 1D/A (Digital to Analog) throw-over gear, it generates grey scale signal according to the gradation data of specifying the electrooptic element gray scale; Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal; The throw-over gear with 2D/A, its resolution with 1D/A throw-over gear is different, generates correction signal according to the correction data of storing in the storing mechanism; And combination mechanism, the synthetic and generation data-signal of correction signal that it generates the grey scale signal and the 2D/A throw-over gear of 1D/A throw-over gear generation.
In addition,, be meant the variable quantity of the simulating signal when the lowest order byte to the digitalized data of this D/A throw-over gear input changes, promptly from the minimum value of the variable quantity of the simulating signal of D/A throw-over gear output as " resolution " of D/A throw-over gear.The resolution of D/A throw-over gear is high more, and is more little from the minimum value of the variable quantity of the simulating signal of this D/A throw-over gear output.And " electrooptic element " among the present invention is a kind of element that a side of electric flux and luminous energy is converted to the opposing party's character that has.Exemplary as such element, can enumerate organic (Electro Luminescent, electroluminescence) or OLED (the organic photic emitting diode of Organic Light Emitting Diode) element such as luminous condensate, be not limited in this but be suitable for scope of the present invention.
According to this structure, owing to generate grey scale signal according to gradation data by 1D/A throw-over gear, on the other hand, therefore generate correction signal by the 2D/A throw-over gear different according to gradation data, can select the resolution when gradation data carried out the D/A conversion arbitrarily and correction data carried out the resolution of D/A when changing with 1D/A throw-over gear resolution.Therefore, no matter to the resolution of the D/A of gradation data conversion how, can both proofread and correct the gray scale of each electrooptic element accurately.
As the storing mechanism among the present invention, adopt ROM (Read Only Memory) or RAM various storeies such as (Random Acess Memory).Adopting under the situation of ROM as storing mechanism, for example having when the manufacturing of electro-optical device, by in advance correction data being write storing mechanism, the advantage with regard to not needing the memory contents of storing mechanism is upgraded afterwards.On the other hand, if adopt RAM as storing mechanism, even then have characteristic in the various piece of for example electro-optical device (for example the characteristic of electrooptic element or the 1st and the characteristic of 2D/A throw-over gear) experience is long-time and under the situation about changing, by consistent with the variation of its characteristic and the correction data of storing mechanism is upgraded, can implement best advantage of proofreading and correct to the gray scale of each electrooptic element usually.
In the mode, combination mechanism has adding mechanism more specifically, the correction signal addition (with reference to Fig. 5, Fig. 9 and Figure 13) that it generates the grey scale signal and the 2D/A throw-over gear of 1D/A throw-over gear generation.According to such mode, can generate data-signal with simple structure.This mode, the structure that is adopted are that for example 1D/A throw-over gear and 2D/A throw-over gear all generates current signal or equal formation voltage signal.That is, this structure is, the corresponding current signal of 1D/A throw-over gear generation and gradation data is as grey scale signal, and 2D/A throw-over gear generation simultaneously and the corresponding current signal of correction data are as the formation of correction signal; Or 1D/A throw-over gear generation and gradation data corresponding voltage signal be as grey scale signal, and 2D/A throw-over gear generation simultaneously and correction data corresponding voltage signal are as the formation of correction signal.
And, in another way, 1D/A throw-over gear, generate the grey scale signal of the pulsewidth corresponding with gradation data, 2D/A throw-over gear generates the correction signal of the pulsewidth corresponding with correction data, synthesizer mechanism, at (for example Figure 14 during T1) output gray level signal during the 1st, and link to each other during with the 1st the 2nd during (for example Figure 14 during T2) output calibration signal.In other words, combination mechanism is by carrying out timesharing multichannel processing (promptly by grey scale signal and correction signal are coupled together) generation data-signal to grey scale signal and correction signal on time shaft.
In another embodiment, combination mechanism has multiplication mechanism, and it multiplies each other the correction signal that the grey scale signal and the 2D/A throw-over gear of 1D/A throw-over gear generation generate.For example, at the 1D/A throw-over gear generation current levels signal corresponding or voltage signal with gradation data as grey scale signal, in the structure of the correction signal of 2D/A throw-over gear generation and the corresponding pulsewidth of correction data, combination mechanism, with the grey scale signal that 1D/A throw-over gear generates, during corresponding, export (with reference to Figure 17) as data-signal with the pulsewidth of correction signal.Yet the structure that combination mechanism is used for synthetic grey scale signal and correction signal is not limited to this.
Relevant signal processing circuit of the present invention is according to for example each corresponding arrangement with data line and composition data line drive circuit.Promptly, this data line drive circuit, be a kind of according to many sweep traces and many data lines between each intersect corresponding and arrange the data line drive circuit of the electro-optical device of a plurality of electrooptic elements, it has each circuit provides a plurality of signal processing circuits from data-signal to data line respectively, each signal processing circuit, possess: 1D/A throw-over gear, it generates grey scale signal according to the gradation data of specifying the electrooptic element gray scale; Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal; 2D/A throw-over gear, its resolution is different with 1D/A throw-over gear, generates correction signal according to the correction data in the storing mechanism storage; And combination mechanism, it will be by the grey scale signal of 1D/A throw-over gear generation and the synthetic and generation data-signal of correction signal that is generated by 2D/A throw-over gear.Even in this data line drive circuit, about signal processing circuit of the present invention because of above-mentioned reason, no matter to the resolution of the D/A of gradation data conversion how, can both carry out high-precision correction to the gray scale of each electrooptic element.
For example, each electrooptic element with a certain luminous electro-optical device in the multiple demonstration look in, owing to might respectively show the characteristic difference of the electrooptic element of look, according to data line drive circuit of the present invention, after the difference of the characteristic of each such demonstration look proofreaied and correct, just can keep good white balance.And,,, can compensate this deviation by suitably selecting correction data even under the characteristic of each signal processing circuit in the data line drive circuit situation devious.Also have, even the electro-optical device of same type is because of the former of manufacture view thereby cause the various characteristics difference, if but according to data line drive circuit of the present invention, characteristic deviation to each such electro-optical device compensates, and also can realize the good display quality about all electro-optical devices.
In the optimal way of this data line drive circuit, the 2D/A throw-over gear in each signal processing circuit is adjusted signal change resolution according to the resolution that is provided.According to the manner, owing to adjust signal, the resolution of 2D/A throw-over gear is adjusted according to resolution, therefore adjust signal by suitably selecting resolution, just can at random adjust the mode that the gray scale of electrooptic element is proofreaied and correct.In addition, this structure also can be to be provided with resolution is adjusted the feed mechanism that signal offers the 2D/A throw-over gear in each signal processing circuit.This feed mechanism is adjusted signal with the corresponding generation of user's operation resolution, and is outputed to each signal processing circuit.According to such mode, the user can actually confirm simultaneously gamma characteristic to be adjusted by the image of electro-optical device demonstration.
In addition, each that especially has an electrooptic element such as OLED element shows all different situation of characteristic of look.Here, preferred resolution is adjusted signal and is offered each demonstration look.Promptly, in the manner, with a 2D/A throw-over gear that shows in the look corresponding signal processing circuit in a plurality of signal processing circuits, adjust signal according to the 1st resolution and change resolution accordingly, with in a plurality of signal processing circuits with other demonstration look corresponding signal processing circuit in 2D/A throw-over gear, adjust signal according to adjusting the 2nd different resolution of signal, change resolution with the 1st resolution.According to this mode, owing to adjust signal, the resolution that shows the 2D/A throw-over gear that look corresponding is adjusted with each according to each resolution, therefore each difference that shows the characteristic of look is compensated, just can realize good display quality.In addition, it can be to be different signals about each of a plurality of demonstration looks that each resolution is adjusted signal, also can be that 1 resolution is adjusted signal and shown that by more than 2 kinds each look shared.For example, the structure of each electrooptic element can be with red and green and blueness in certain corresponding formation, also can be, wherein the resolution of the 2D/A throw-over gear in the signal processing circuit of 2 kinds of color correspondences is adjusted the signal adjustment by the 1st resolution, and the resolution of simultaneously corresponding with other a kind of color 2D/A throw-over gear is adjusted the structure that signal is adjusted by the 2nd resolution.
The concrete form of 2D/A throw-over gear, then illustration is as follows if adjust the relation of signal with resolution especially emphatically.
At first, in the 1st mode, 2D/A throw-over gear (being equivalent to 2DAC32a shown in Figure 4), possess: current source (each transistor 41), its level of adjusting signal with resolution generates a plurality of electric currents as benchmark, and each of these a plurality of electric currents is weighted with different weights; Select circuit (each switch 43), it selects a plurality of electric currents according to correction data, generates correction signal based on the electric current of selecting circuit to select.In this mode, each level of adjusting signal according to resolution of a plurality of electric currents that generated by current source is adjusted.Therefore, by suitably the level of resolution adjustment signal being adjusted, just can adjust arbitrarily the resolution of 2D/A throw-over gear.
In the 2nd mode, 2D/A throw-over gear (being equivalent to 2DAC32b shown in Figure 7) possesses: voltage generation circuit, and its level of adjusting signal with resolution is that benchmark generates a plurality of voltages; Select circuit (each switch 53), it is according to correction data, selects some in a plurality of voltages, generates correction signal based on the voltage of selecting circuit to select.In the manner, each of a plurality of voltages that generated by voltage generation circuit is adjusted accordingly with the level of resolution adjustment signal.Therefore, by suitably the level of resolution adjustment signal being adjusted, just can adjust arbitrarily the resolution of 2D/A throw-over gear.
In the 3rd mode, it is clock signal that resolution is adjusted signal, 2D/A throw-over gear (being equivalent to 2DAC32c shown in Figure 11), possess: the pulse signal generative circuit, its cycle of adjusting signal with resolution is a benchmark, generate a plurality of pulse signals, each of these a plurality of pulse signals has the pulsewidth after being weighted with different weights; With select circuit (switch 63), it is according to correction data, in selecting in a plurality of pulse signals one is based on selecting the selected pulse signal of circuit to generate correction signal.In the manner, the cycle that each pulsewidth of a plurality of pulse signals that generated by the pulse signal generative circuit is adjusted signal according to resolution is adjusted.Therefore, adjust the cycle of signal, just can adjust arbitrarily the resolution of 2D/A throw-over gear by suitably adjusting resolution.
Relevant data line drive circuit of the present invention is used as the circuit that is used for data-signal is offered each data line of electro-optical device.This electro-optical device possesses: a plurality of electrooptic elements, its according to many sweep traces and many data lines between each intersect corresponding and arrange; Scan line drive circuit, it selects each root of many sweep traces successively; And data line drive circuit, it contains a plurality of signal processing circuits, and each of these a plurality of signal processing circuits is supplied with data-signal to data line, each signal processing circuit, respectively have: 1D/A throw-over gear, it generates grey scale signal according to the gradation data of specifying the electrooptic element gray scale; Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal; 2D/A throw-over gear, its resolution is different with 1D/A throw-over gear, generates correction signal according to the correction data of storing in the storing mechanism; And combination mechanism, it will be by the grey scale signal of 1D/A throw-over gear generation and the synthetic and generation data-signal of correction signal that is generated by 2D/A throw-over gear.According to this electro-optical device, about signal processing circuit of the present invention or data line drive circuit, as mentioned above, no matter because how to the resolution of the D/A of gradation data conversion, can both proofread and correct the gray scale of each electrooptic element accurately, therefore have the advantage that to keep to high level display quality.This electro-optical device can be typically be used as the display device of various e-machines.
And the present invention also can determine as the method that is used to drive electro-optical device.Promptly, this method, be a kind of the electro-optical device that is arranged with a plurality of electrooptic elements to be driven, each of these a plurality of electrooptic elements has the driving method of the electro-optical device of the gray scale corresponding with data-signal, gradation data according to the gray scale of specifying electrooptic element, generate grey scale signal by the 1D/A conversion, according to the correction data of storing in the storing mechanism, the 2D/A conversions different with the 1D/A conversion by resolution generate correction signal, will change grey scale signal that generates and the synthetic and generation data-signal of correction signal that is generated by the 2D/A conversion by 1D/A.
Description of drawings
Fig. 1 is the block diagram of all structures of the electro-optical device of the relevant embodiments of the present invention of expression.
Fig. 2 is the block diagram of the structure of data line drive circuit in the expression electro-optical device.
Fig. 3 is the circuit diagram of the structure of the 1DAC of expression current-output type.
Fig. 4 is the circuit diagram of the structure of the 2DAC of expression current-output type.
The block diagram of the structure of the combiner circuit when Fig. 5 is current-output type for expression 1DAC and 2DAC.
Fig. 6 is the circuit diagram of the structure of the 1DAC of expression voltage output type.
Fig. 7 is the circuit diagram of the structure of the 2DAC of expression voltage output type.
Fig. 8 is the circuit diagram of the structure of voltage generation circuit among the 2DAC of expression voltage output type.
The block diagram of the structure of the combiner circuit when Fig. 9 is the voltage output type for expression 1DAC and 2DAC.
Figure 10 is the block diagram of structure of the 1DAC of indicating impulse output type.
Figure 11 is the block diagram of structure of the 2DAC of indicating impulse output type.
Figure 12 is used to illustrate the sequential chart of action of the DAC of pulse output type for expression.
Figure 13 is the block diagram of the structure of 1DAC and the 2DAC combiner circuit when being the pulse output type.
Figure 14 is the sequential chart that is used to illustrate the action of combiner circuit.
Figure 15 is the circuit diagram of the structure of the image element circuit of expression current drive-type.
Figure 16 is the circuit diagram of the structure of the image element circuit of expression voltage driven type.
Figure 17 is the block diagram of the structure of the combiner circuit of the relevant variation of expression.
Figure 18 is the block diagram of the structure of the signal processing circuit of the relevant variation of expression.
Figure 19 is suitable for the stereographic map of the structure of personal computer of the present invention for expression.
Figure 20 is suitable for the stereographic map of the structure of portable telephone of the present invention for expression.
Figure 21 is suitable for the stereographic map of the structure of carrying type information terminal of the present invention for expression.
Among the figure: D-electro-optical device, G (Ga, Gb)-and image element circuit, the 100-OLED element, the 1-electro-optical panel, 2-scan line drive circuit, 3-data line drive circuit, the 12-sweep trace, 13-data line, 30-signal processing circuit, 31 (31a, 31b, 31c)-and 1DAC, 32 (32a, 32b, 32c)-and 2DAC, the 34-storer, 36 (36a, 36b, 36c, 36d)-combiner circuit, 41-transistor (current source), 43,53,63-switch (selection circuit), the 51-voltage generation circuit, the 55-demoder, 61-pulse signal generative circuit, 65,76,-OR circuit, 73, the 74-time sequence adjusting circuit, the Dg-gradation data, Dh (Dh-r, Dh-g, Dh-b)-and correction data, the Sg-gradation data, the Sh-correction signal, Sc (Sc-r, Sc-g, Sc-b)-and resolution adjustment signal, Yi-sweep signal, Xj-data-signal.
Embodiment
(1, electro-optical device)
At first, be applicable to that with regard to the present invention utilization describes as the mode of the electro-optical device of the OLED element of electrooptic element.Fig. 1 is the block diagram of electro-optical device structure in the relevant present embodiment of expression.As shown in the figure, electro-optical device D, the scan line drive circuit 2 and the data line drive circuit 3 that have the electro-optical panel 1 of display image, this electro-optical panel 1 is driven.Wherein, electro-optical panel 1 has the total m root sweep trace 12 that is connected with scan line drive circuit 2 that extends at directions X (line direction); The total n data lines 13 that is connected with data line drive circuit 3 in the Y of directions X quadrature direction (column direction) extension.Each infall of sweep trace 12 and data line 13 disposes image element circuit G.Therefore, these image element circuits G, across directions X and Y direction be arranged in vertical m capable * horizontal n row rectangular.Each image element circuit G has with a certain demonstration look luminous OLED element among red (R), green (G) and blue (B).In the present embodiment, illustration the image element circuit G of same color be arranged in the structure of Y direction (so-called strip line arrangement).
Scan line drive circuit 2 is a kind of circuit that are used for selecting successively each sweep trace 12.More particularly, scan line drive circuit 2, each horizontal scan period for each sweep trace 12 export in order the sweep signal Y1, the Y2 that become significant level (active level) ..., Ym.On the other hand, data line drive circuit 3, will with the corresponding data-signal X1 of the gray scale that should represent each image element circuit G, X2 ..., Xn, select each sweep trace 12 during export to each data line 13.The OLED element of each image element circuit G of sweep trace 12 correspondences of selecting by scan line drive circuit 2 is for luminous with the corresponding brightness of data-signal Xj (j is for satisfying the integer of 1≤j≤n) that provides by data line 13.In addition, among Fig. 1, though illustration the structure of scan line drive circuit 2 and data line drive circuit 3 as the key element different with electro-optical panel 1, also can be that scan line drive circuit 2 and data line drive circuit 3 are installed (built-in) structure at electro-optical panel 1.
Fig. 2 is the block diagram of the structure of expression data line drive circuit 3.As shown in the figure, data line drive circuit 3 has total n the signal processing circuit 30 corresponding with different separately data line 13.J column signal treatment circuit 30 is a kind of generation and the corresponding data-signal Xj of gradation data Dg and the circuit of exporting to data line 13.Gradation data Dg specifies the brightness (gray scale) of the OLED element among each image element circuit G.8 numerical data for example offers data line drive circuit 3 from the external mechanical such as CPU of e-machine that electro-optical device D is installed.In addition, though among Fig. 2, only illustrate the detailed structure about the signal processing circuit 30 of the 1st row, other signal processing circuit 30 too.Below, describe with regard to the structure of signal processing circuit 30 of the 1st row, also take into account other signal processing circuits 30 are described.
1DAC shown in Figure 2 (Digital to Analog Converter, digital to analog converter) 31 and 2DAC32 are a kind of mechanisms that converts the digital data into simulating signal.Wherein 1DAC31 will convert analog gray scale signal Sg to by the digital gray scale data Dg that external mechanical provides.On the other hand, the leading portion at 2DAC32 is equipped with storer 34.Storer 34 in the present embodiment is a kind of RAM that store correction data Dh.Correction data Dh is 8 a numerical data of the degree of correction (correcting value) that should implement gradation data Sg of a kind of expression, offers each signal processing circuit 30 and write store 34 by external mechanical.Also have specifically, correction data Dh, the moment the power supply of just connecting electro-optical device D after, or during the horizontal flyback sweep or during the vertical flyback moment in during such interruption (blocking) also write store 34 is provided.2DAC32 converts the correction data Dh that stores in the storer 34 to analog correction signal Sh.And combiner circuit 36 after will synthesizing by the grey scale signal Sg of 1DAC31 generation with by the correction signal Sh that 2DAC32 generates, generates data-signal X1.Therefore, data-signal X1, for based on the corresponding correction signal Sh of the correction data Dh pair of signal of proofreading and correct with the corresponding grey scale signal Sg of gradation data Dh (other data-signal X2 to Xn too).
As shown in Figure 2, provide respectively with the resolution of different demonstration looks corresponding 3 systems to data line drive circuit 3 by external mechanical and adjust signal Sc (Sc-r, Sc-g and Sc-b).Resolution is adjusted the 2DAC32 that signal Sc-r is provided for the signal processing circuit 30 corresponding with red pixel circuit G, resolution is adjusted the 2DAC32 that signal Sc-g is provided for the signal processing circuit 30 corresponding with green pixel circuit G, and resolution is adjusted the 2DAC32 that signal Sc-b offers the signal processing circuit 30 corresponding with blue pixel circuit G.These resolution are adjusted signal Sc, are a kind of signals that is used to adjust the resolution of 2DAC32.As " resolution " of the DAC in this instructions (1DAC31 and 2DAC32), be meant the variable quantity of the simulating signal when the lowest order of numerical data changes, promptly from the minimum value of the variable quantity of the simulating signal of this DAC output.That is,, be meant the variable quantity of the grey scale signal Sg when the lowest order of gradation data Dg changes, the resolution of 2DAC32, the variable quantity of the correction signal Sh the when lowest order that is meant correction data Dh changes as the resolution of 1DAC31.In the present embodiment, adjust signal Sc, adjust resolution accordingly with irrelevant this 2DAC32 of the resolution of 1DAC31 according to resolution to 2DAC32 input.Therefore, the resolution of 2DAC32 is different with the resolution of 1DAC31.Like this if adjust the resolution that signal Sc adjusts 2DAC32 accordingly according to resolution, then the correcting feature implemented of the grey scale signal Sg that 1DAC31 is generated can change.That is, in the present embodiment, the correcting feature of grey scale signal Sg correspondence is by to adjust the both sides of signal Sc corresponding and determine with correction data Dh and resolution.In more detail, resolution is adjusted signal Sc, be a kind of being used for the gamma characteristic across electro-optical panel 1 integral body of arranging a plurality of image element circuit G to be shown the key element that look is adjusted by each, correction data Dh is a kind ofly to be used for gamma characteristic to these image element circuits G by the key element of respectively itemizing and solely adjusting.
As mentioned above, in the present embodiment, compare with prior art, the prior art is according to generating correction signal Sh with the independently selected resolution of 1DAC31 and by 2DAC32 according to correction data Dh, then with after gradation data Dg and the correction data Dh addition, carry out the D/A conversion, then can proofread and correct accurately the gray scale of each image element circuit G.For example, if set the resolution height of the resolution of 2DAC32, then can the grey scale signal Sg of just also enough little than the minimum value of the level variable quantity of grey scale signal Sg correcting value be adjusted than 1DAC31.In other words, proofread and correct in order to carry out the best, owing to can select the resolution of the irrelevant 1DAC31 of the resolution that requires with 2DAC32, therefore even fully improving under the situation of the resolution that is used to proofread and correct, as long as just can according to the grey scale signal Sg that gradation data Dg obtains expecting about the resolution of 1DAC31.Therefore, according to present embodiment, about 1DAC31, can suppress miscellaneousization of the gigantism or the circuit structure of circuit scale, and realize high-precision correction.
And, in the present embodiment, owing to adjust the resolution that signal Sc can adjust 2DAC32 by resolution, therefore can be efficiently to adjusting across the gamma characteristic of electro-optical panel 1 integral body.Especially in the present embodiment, according to adjusting signal Sc (Sc-r, Sc-g and Sc-b) with the resolution of different separately demonstration looks corresponding 3 systems, resolution to the 2DAC32 in the signal processing circuit 30 of each demonstration look is adjusted, adjust by the correcting mode that each is shown look, just can be easy to adjust white balance across electro-optical panel 1 integral body.
In addition, owing to adopt the storer 34 of RAM as storage correction data Dh, therefore there is following advantage: even for example in the characteristic of the various piece of the electro-optical device D (characteristic of each image element circuit G or the OLED element that wherein contains for example, the characteristic that also has 1DAC31 and 2DAC32) through long-time and under the situation about changing, by upgrading, also can implement best the correction usually to the gamma characteristic of electro-optical panel 1 with the consistent correction data Dh of characteristic after its variation to storer 34.But, also can adopt ROM as storer 34.In this case, its advantage is, by when for example electro-optical device D makes or the forward direction storer 34 that dispatches from the factory write correction data Dh in advance, with regard to not needing the content of storer 34 is upgraded afterwards.
(structure of 1-2,1DAC31 and 2DAC32)
Next, the concrete mode of illustration 1DAC31 and 2DAC32.
In circuit, comprise by numerical data output simulating signal: will with the current-output type DAC of the current signal output of the corresponding current value of numerical data; Will with the voltage output D C of the voltage signal of the corresponding magnitude of voltage of numerical data output; Will with the pulse output D C of the pulse signal of the corresponding pulsewidth of numerical data output.Below, the structure of structure when just adopting these each DAC as 1DAC31 and 2DAC32 and the combiner circuit 36 of this moment describes.
(A: current-output type DAC)
Fig. 3 represents the circuit diagram of the 1DAC structure of current-output type.As shown in the figure, this 1DAC31a has 8 transistors 41 of every corresponding total with gradation data Dg; The switch 43 that is connected with drain electrode with each transistor 41.The source electrode grounding of each transistor 41.And, apply the constant reference voltage Vref that is predetermined to the gate electrode of all transistors 41.The characteristic of each transistor 41 (especially threshold voltage), according to when when each gate electrode applies public reference voltage V ref, flow through each of electric current A0 to A7 of each transistor 41, for being respectively chosen in the mode of 2 the power value size after as the weights weighting.More particularly, as shown in Figure 3, the ratio that flows through the electric current A0 to A7 in each transistor 41 of the 1st section to the 8th section is (A0: A1: A2: A3: A4: A5: A6: A7=1: 2: 4: 8: 16: 32: 64: 128).That is, these transistors 41, each is as the current source performance function that generates with a plurality of electric currents (A0 to A7) after the independent weights weighting.
On the other hand, in each switch 43 with the end of transistor 41 opposition sides, with public connection of terminal To of output gray level signal Sg.Each switch 43, the position corresponding with switch 43 among the gradation data Dg selected to connect to disconnect accordingly.For example, the 1st section switch 43 is if lowest order is for " 1 " then become the state of connection among the gradation data Dg, if this position is the state that " 0 " then becomes disconnection.According to this formation, if add up to the corresponding state that becomes conducting of the switch 43 more than 1 in 8 switches 43 with gradation data Dg, then electric current flows through the transistor 1 or more 41 corresponding with this switch 43, and the current signal behind these current summations is offered lead-out terminal To as grey scale signal Sg.
Then, Fig. 4 is the circuit diagram of the structure of the 2DAC of expression current-output type.In each key element with figure, the key element additional phase identical symbol together with each key element effect of Fig. 3.As shown in Figure 4, this 2DAC32a, remove according to correction data Dh this point is controlled in the connection disconnection of each switch 43, and adjust outside this point of signal Sc (certain among Sc-r, Sc-g and the Sc-b) to the public resolution that provides of the gate electrode of each transistor 41, have identical structure with 1DAC31a.In this structure, if add up to the switch more than 1 43 in 8 switches 43 to become on-state according to correction data Dh, then electric current flows through the transistor 1 or more 41 corresponding with this switch 43, and the current signal behind these current summations is offered lead-out terminal To as grey scale signal Sg.Here, each of electric current A0 to A7 that flows through each transistor 41 is identical with 1DAC31a with this point of independent weights weighting, among the 2DAC32a, is the level of resolution adjustment signal Sc as the voltage of the gate electrode of this current reference.Therefore, adjust the level of signal Sc, make the current value that flows through each transistor 41 change (but the ratio of each electric current does not change), make the resolution changing of 2DAC32a thus by adjusting resolution.
Fig. 5 is for focusing on combiner circuit 36, the block diagram of the structure of the 1DAC31a of expression employing current-output type and the signal processing circuit 30 of 2DAC32a.Combiner circuit 36a in this case, as shown in the figure, its structure is that the lead-out terminal To of 1DAC31a and the lead-out terminal To of 2DAC32a are connected to each other.Therefore, from the data-signal Xj of signal processing circuit 30 output, for will be from the grey scale signal Sg of 1DAC31a output and the current signal after the correction signal Sh addition of 2DAC32a output.That is, combiner circuit 36a is as the mechanism's performance function that is used for grey scale signal Sg and correction signal Sh addition.Therefore, 1DAC31a and 2DAC32a under the situation as current-output type, had the advantage that simplifies the structure that makes combiner circuit 36a.
(B: voltage output D C)
Fig. 6 is the block diagram of the structure of the 1DAC of expression voltage output type.As shown in the figure, this 1DAC31b has voltage generation circuit 51, adds up to 256 switches 53 and demoder 55.Wherein voltage generation circuit 51, and by the reference voltage V ref dividing potential drop that provides from external mechanical is provided, the voltage V0 that generates 256 kinds of total is to voltage V255.On the other hand, an end of each switch 53 is with some be connected of output voltage V 0 in the voltage generation circuit 51 to 256 lead-out terminals of total of voltage V255.The other end of these switches 53 is connected with the lead-out terminal of grey scale signal Sg is public.Demoder 55, by decoding gradation data Dg, generation makes certain switch 53 be the signal of on-state according to the mode of selecting.According to this formation, if with the corresponding switch 53 of gradation data Dg be on-state, then voltage V0 voltage corresponding with its switch 53 to the voltage V255 is offered lead-out terminal To as grey scale signal Sg.
Then, Fig. 7 represents the block diagram of structure of the 2DAC of voltage output type.Key element identical with each key element effect of Fig. 6 in each key element with figure is given identical symbol.As shown in Figure 7, this 2DAC32b, remove according to correction data Dh being carried out decoded results this point is controlled in the connection disconnection of each switch 53, and beyond voltage generation circuit 51 provides this point of resolution adjustment signal Sc, have identical structure with 1DAC31b.During this constituted, if according to correction data Dh is carried out decoded results, certain switch 53 became on-state, and then voltage that will be corresponding with this switch 53 (voltage V0 certain to the voltage V255) offers lead-out terminal To as correction signal Sh.
Here, Fig. 8 is the circuit diagram of the concrete structure of voltage generation circuit 51 among the expression 2DAC32b.As shown in the figure, this voltage generation circuit 51, its structure is, has a plurality of resistance R that are connected in series between terminal 512 and terminal 513, and the current potential of the intermediate point of the resistance R that adjoins each other is extracted out as voltage V0 to voltage V255.On the other hand, resolution is adjusted signal Sc, contains the signal (Sc1 and Sc2) of mutually different two kinds of voltage level, and a side signal Sc1 is wherein imposed on terminal 512, and the signal Sc2 with the opposing party imposes on terminal 513 simultaneously.Therefore, voltage V0 to voltage V255 be the voltage of benchmark for the level of adjusting signal Sc with resolution.That is, adjust the level of signal Sc, change each potential difference (PD) of voltage V0 and voltage V255, by changing the resolution of 2DAC32 like this by adjusting resolution.
Fig. 9 is for focusing on combiner circuit 36, the block diagram of the structure of the 1DAC31b of expression employing voltage output type and the signal processing circuit 30 of 2DAC32b.As shown in the figure, the combiner circuit 36b of this moment, be a kind of all be the grey scale signal Sg of voltage signal and the circuit of correction signal Sh addition with both sides, as shown in Figure 9, have: the operational amplifier 71 of side input terminal ground connection just; 2 resistance R 1 between the minus side input terminal of operational amplifier 71 and 1DAC31b and 2DAC32b, inserting respectively and R2; And the resistance R of between the lead-out terminal of operational amplifier 71 and minus side input terminal, inserting 3.According to this formation, from the data-signal Xj of synthetic short circuit 36b (operational amplifier 71 in more detail) output, for will be from the grey scale signal Sg of 1DAC31b output with from the voltage signal of the correction signal Sh addition of 2DAC32b output.
(C: pulse output D C)
Figure 10 is the block diagram of structure of the 1DAC of indicating impulse output type.As shown in the figure, this 1DAC31c has: the input by period demand carry out repeatedly the clock signal clk of level variation pulse signal generative circuit 61, with 8 switches 63 of every corresponding total of gradation data Dg and the OR circuit 65 of output gray level signal Sg.Wherein the pulse signal generative circuit 61, by the clock signal clk from the external mechanical input is suitably carried out the circuit that frequency division generates the pulse signal Spw (Spw1 to Spw7) that adds up to 8 kinds.As shown in figure 12, each pulse signal Spw is a kind of signal that has with the pulsewidth of different mutually weights weightings.For example, pulse signal Spw0 has the pulsewidth that equates with the cycle of clock signal clk, and pulse signal Spw1 has cycle 2 times the pulsewidth that is equivalent to clock signal clk, and pulse signal Spw2 has cycle 4 times the pulsewidth that is equivalent to clock signal clk.If describe in more detail, then pulse signal Spw0 to the ratio of the pulsewidth of pulse signal Spw7 be (Spw0: Spw1: Spw2: Spw3: Spw4: Spw5: Spw6: Spw7=1: 2: 4: 8: 16: 32: 64: 128).And each pulse signal Spw is during significant level (H level), the phase non-overlapping copies.
Each pulse signal Spw offers an end of the switch corresponding with this signal 63.The other end of each switch 63 is connected with the input terminal of OR circuit 65.Each switch 63, according to gradation data Dg in the position corresponding with its switch 63, select to connect and disconnect.For example, 1st section the switch 63 corresponding with pulse signal Spw0 if lowest order is " 1 " among the gradation data Dg, then is on-state, if this position is " 0 ", then is off-state.According to this formation, if add up to the switch more than 1 63 in 8 switches 63 to become on-state according to gradation data Dg, then the pulse signal Spw corresponding with this switch 63 offered OR circuit 65, the voltage signal after these pulse signals Spw addition is offered lead-out terminal To as grey scale signal Sg.Therefore, this grey scale signal Sg becomes the signal with the corresponding pulsewidth of gradation data Dg.The hypomere of Figure 12, illustration at the grey scale signal Sg of (being that gradation data Dg is under the situation of " 00011001 ") under the situation with pulse signal Spw0, Spw3 and Spw4 addition.
On the other hand, Figure 11 is the block diagram of structure of the 2DAC of indicating impulse output type.The key element identical in each key element with figure with each key element effect of Figure 10, give identical symbol, as shown in figure 12, this 2DAC32c, remove according to every connection disconnection of correction data Dh and control this point each switch 63, and provide resolution to adjust outside this point of signal Sc to pulse signal generative circuit 61, identical with the 1DAC31c structure.Resolution is in this case adjusted signal Sc, as shown in figure 12, is a kind of clock signal of carrying out level variation with period demand repeatedly.In this structure, will with add up to 8 switches 63 in, become the corresponding pulse signal Spw of the switch 63 of on-state according to correction data Dh and offer OR circuit 65, the correction signal Sh after these pulse signals Spw addition is offered lead-out terminal To.Thereby, this correction signal Sh, identical with the illustrative content of hypomere of Figure 12, become with grey scale signal Sg similarly, pulse signal Spw0, the Spw3 that will select according to correction data Dh and the voltage signal after the Spw4 addition.
Figure 13 is for especially focusing on combiner circuit 36, the block diagram of the structure of the 1DAC31c of expression employing pulse output type and the signal processing circuit 30 of 2DAC32c.As shown in the figure, combiner circuit 36c in this case comprises: from the time sequence adjusting circuit 73 of 1DAC31c input gray level signal Sg; Time sequence adjusting circuit 74 from 2DAC32c input correction signal Sh; With will be from the logic of the output signal of time sequence adjusting circuit 73 and 74 with as the OR circuit 76 of data-signal Xj output.Time sequence adjusting circuit 73 and 74 is mechanisms that a kind of signal with each input suitably postpones back output.If be described in more detail, then as shown in figure 14, time sequence adjusting circuit 73 will be exported to OR circuit 76 at the first-half period T1 of 1 horizontal scan period from the grey scale signal Sg that 1DAC31c provides.On the other hand, time sequence adjusting circuit 74 will be exported to OR circuit 76 from correction signal Sh T2 between the latter half of 1 horizontal scan period that 2DAC32c provides.Signal from time sequence adjusting circuit 73 and 74 outputs passes through 76 additions of OR circuit like this, as shown in figure 14, in whole 1 horizontal scan period with gradation data Dg and correction data Dh corresponding during, the voltage signal that will become significant level is as data-signal Xj, from combiner circuit 36 outputs.In addition, among Figure 14, though illustration during T1 with during T2 be long situation of identical time, the time length during each can be done suitable adjustment.For example, during T2 be than during short time of T1 long.
(1-3: the structure of image element circuit G)
As mentioned above, as 1DAC31 and 2DAC32 as shown in Figure 2, adopt a certain in current-output type (31a and 32a), voltage output type (31b and 32b) and the pulse output type (31c and 32c).And, to the data-signal Xj of each data line 13 outputs, for the corresponding current signal of mode of 1DAC31 and 2DAC32 and voltage signal in a certain.Below, describe as the structure of the image element circuit G of the mode (promptly 1DAC31 and 2DAC32 are a certain mode in voltage output type and the pulse output type) of voltage signal as the structure of the image element circuit G in the mode (promptly 1DAC31 and 2DAC32 are the mode of current-output type) of current signal and data-signal Xj with regard to data-signal Xj.In addition, though the structure of 1 image element circuit G that the following j that just belongs to i capable (i is for satisfying the integer of 1≤i≤m) is listed as describes, the structure of all image element circuit G is all same.And the structure of image element circuit G is not limited to following illustrative content.
(A: the image element circuit G of current drive-type)
Figure 15, the circuit diagram of the structure of the image element circuit Ga that adopts during for current signal as data-signal Xj for expression.As shown in the figure, image element circuit Ga possesses: 4 transistor T a1 to Ta4, capacity cell Ca, OLED element 100.Wherein the source electrode of the transistor T a1 of p channel-type is connected with the power lead of the high-order side current potential Vdd that applies power supply.The drain electrode of transistor T a1 is connected with the drain electrode of the transistor T a3 of the source electrode of the transistor T a2 of the source electrode of the transistor T a4 of p channel-type, n channel-type, n channel-type.The gate electrode of transistor T a4 is connected with sweep trace 12, and its drain electrode is connected with the anode of OLED element 100.The plus earth of OLED element 100 (Gnd).The end of capacity cell Ca is connected with the source electrode of transistor T a1, and the other end is connected with the gate electrode of transistor T a1 and the drain electrode of transistor T a2.The gate electrode of the gate electrode of transistor T a2 and transistor T a3 is connected with sweep trace 12.And the source electrode of transistor T a3 is connected with data line 13.
In this structure, if in each vertical scanning period, when an i horizontal scan period arrives, sweep signal Yi is the H level, then because transistor T a2 is an on-state, so transistor T a1 is as gate electrode and the interconnective diode performance of drain electrode function.Therefore at this moment, because transistor T a3 also is in on-state, flow through data line 13 from power lead through transistor T a1 and transistor T a3 for the electric current of the data-signal Xj that data line 13 provides.Therefore, with the corresponding electric charge accumulation of the gate electrode of transistor T a1 in capacity cell Ca.In this process, be in off-state, so electric current does not flow through OLED element 100 owing to transistor T a4.Then, through after the horizontal scan period, if sweep signal Yi is the L level, then transistor T a2 and transistor T a3 are off-state, and transistor T a4 is an on-state on the other hand.At this moment, owing to will remain in the gate electrode that voltage among the capacity cell Ca imposes on transistor T a1, therefore in before horizontal scan period, the electric current corresponding with the data-signal Xj that flows through data line 13 flows through OLED element 100 through transistor T a1 and transistor T a4, and luminous.Like this, OLED element 100 is with luminous with the corresponding brightness of data-signal Xj as current signal.
(B: voltage driven type image element circuit G)
Next, Figure 16 is the circuit diagram of structure of the image element circuit Gb of the expression employing of (supposing that here 1DAC31 and 2DAC32 are the situation of voltage output type) when data-signal Xj is voltage signal.As shown in the figure, image element circuit Gb possesses: 2 transistor T b1 and Tb2, capacity cell Cb, OLED element 100.Wherein the source electrode of the transistor T b1 of p channel-type is connected with the power lead of the high-order side current potential Vdd that applies power supply, and its drain electrode is connected with the anode of OLED element 100.The plus earth of OLED element 100.And the gate electrode of transistor T b1 is connected with the drain electrode of the transistor T b2 of n channel-type.The gate electrode of this transistor T b2 is connected with sweep trace 12, and its source electrode is connected with data line 13.On the other hand, the end of capacity cell Cb is connected with the source electrode of transistor T b1, and the other end is connected with the gate electrode of transistor T b1 and the drain electrode of transistor T b2.
According to this formation, when the 1st horizontal scan period in each vertical scanning period arrives, if sweep signal Yi is the H level, then because transistor T b2 is an on-state, thereby with the corresponding electric charge accumulation of voltage of the data-signal Xj that applies to data line 13 in capacity cell Cb, in OLED element 100, flow also luminous with the corresponding electric current of this data-signal Xj simultaneously, on the other hand, if sweep signal Yi is the L level, though then transistor T b1 is an off-state, but impose on the gate electrode of transistor T b1 by the voltage that will remain in capacity cell Cb, flow through that the OLED element flows and luminous from transistor T b1 at before horizontal scan period and the corresponding electric current of data-signal Xj that applies to data line 13.Like this, OLED element 100 is with luminous with the corresponding brightness of data-signal Xj as voltage signal.In addition, among the voltage driven type image element circuit Gb as shown in figure 16, with as shown in figure 15 image element circuit Ga too, OLED element 100 constitutes: will be used between the drain electrode that transistor T a4 between regulation OLED element 100 actual light emission periods inserts the anode of OLED element 100 and transistor T a1, its gate electrode is connected with sweep trace 12.
Though suppose that here 1DAC31 and 2DAC32 are the situation of voltage output type, when they all are the pulse output type, also adopt same image element circuit Gb.At this moment, the 1st horizontal scan period, remain among the capacity cell Cb with the corresponding voltage of the pulsewidth of data-signal Xj, impose on the gate electrode of transistor T b1 simultaneously, even through after its horizontal scan period, also will remain in the gate electrode that voltage among the capacity cell Cb imposes on transistor T b1.Therefore, OLED element 100 is with luminous with the corresponding brightness of the pulsewidth of data-signal Xj.
(2, variation)
Also can add various distortion to the respective embodiments described above.Below enumerate concrete mode of texturing.In addition, can also adopt the structure that following each mode is suitably made up.
(1) in the above-mentioned embodiment, illustration with 1DAC31 and 2DAC32 be the structure of the DAC of same way as, but also can adopt the structure with 1DAC31 and 2DAC32 different modes.For example, as shown in figure 17, signal processing circuit 30 can be the structure of the 2DAC32c of 1DAC31a (the perhaps 1DAC31b of voltage output type) with current-output type and pulse output type.Combiner circuit 36d in this structure possesses with the switch shown in the figure 78.One end of this switch 78 is connected with the lead-out terminal To of 1DAC31a, and its other end is connected with data line 13.And the connection of switch 78 disconnects, according to the correction signal Sh Be Controlled from the 2DAC32c output of pulse output type.Being switch 78, is on-state when correction signal Sh is the H level, is off-state when correction signal Sh is the L level.In this structure, from the grey scale signal Sg of 1DAC31a output, only the correction signal Sh from 2DAC32c output be the H level during (promptly be equivalent to the corresponding pulsewidth of setting of correction data Dh during) just export to data line 13.That is, combiner circuit 36d is as mechanism's performance function of grey scale signal Sg and correction signal Sh are multiplied each other (pulsewidth of level * correction signal Sh of grey scale signal Sg).Therefore, the data-signal Xj from combiner circuit 36d output is the signal that grey scale signal Sg is proofreaied and correct by correction signal Sh.
In addition, here illustration the structure of 2DAC32c of the 1DAC31b of the 1DAC31a of combination current output type or voltage output type and pulse output type, but this combination also can be changed arbitrarily.For example, also can be the 1DAC31c of assembled pulse output type and the 2DAC32a of current-output type (the perhaps 2DAC32c of voltage output type) and constitute signal processing circuit 30.Combiner circuit 36 in this structure, and is identical with the example of Figure 17, as a kind of to as the grey scale signal Sg of pulse signal and mechanism's performance function of multiplying each other as the correction signal Sh of current signal (perhaps voltage signal).And the mode of 1DAC31 and 2DAC32 is not limited in current-output type or voltage output type or pulse output type.In a word, if a kind ofly generate the circuit of simulating signal, no matter then how its concrete mode all can adopt as 1DAC31 and 2DAC32 according to the such numerical data of gradation data Dg or correction data Dh.
(2) in the above-mentioned embodiment, though illustration provide the structure of correction data Dh separately to each signal processing circuit corresponding 30 with each pixel, but as shown in figure 18, also can be the structure that public correction data Dh is offered the signal processing circuit 30 that respectively shows look.In figure, correction data Dh-r, common storage is in the storer 34 of each signal processing circuit 30 corresponding with red pixel circuit G, correction data Dh-g, the public storer 34 that offers each signal processing circuit 30 corresponding with green, correction data Dh-b, the public storer 34 that offers each signal processing circuit 30 corresponding with blueness.According to such structure, just can show that the gamma characteristic of look efficiently proofreaies and correct and keep good white balance to each.In addition, among Figure 18, illustration in each signal processing circuit 30 structure of config memory 34, but also can be to be shown the shared structure of signal processing circuit 30 of look by each by each storer that shows look configuration.Promptly, its structure can be, not in each signal processing circuit 30, storer 34 to be set, but 3 storeies of the correction data Dh (Dh-r, Dh-g and Dh-b) of the different separately demonstration look of configuration store, and will output to 2DAC32 the signal processing circuit 30 that respectively shows look from the correction data Dh of each storer output.
(3) in the above-mentioned embodiment illustration be suitable for electro-optical device D as the OLED element 100 of electrooptic element, but the present invention can also be applicable to electro-optical device D in addition.For example, display device for liquid crystal indicator, employing field-emitter display (FED:Field Emission Display) or surface conductive type electron emission display device (SED:Surface-conduction Electron-emitterDisplay), ballistic electron emission display (BSD:Ballistic electron Surface emittingDisplay), light emitting diode, or the so various electro-optical devices of the write head of optical-write-in mode printer or electronic copier, also identically be fit to the present invention with the respective embodiments described above.Like this, as electro-optical device of the present invention, be a kind of element that a side of electric flux and luminous energy is converted to the opposing party's character that has, all devices with this electrooptic element can both be suitable for the present invention.
(3, application examples)
Then, describe about the e-machine that is suitable for electro-optical device of the present invention.Figure 19, expression is applicable to the electro-optical device D of relevant above-mentioned embodiment the stereographic map of structure of the mobile model personal computer of display device.Personal computer 2000 possesses electro-optical device D and main part 2010 as display device.In the main part 2010, be provided with power switch 2001 and keyboard 2002.Because this electro-optical device D adopts OLED element 100, can show that therefore angle of visibility more greatly and the picture of seeing easily.
Figure 20 represents to be suitable for the structure about the portable telephone of the electro-optical device D in the above-mentioned embodiment.Portable telephone 3000 possesses a plurality of operating keys 3001, scroll key 3002 and as the electro-optical device D of display device.By operation scroll key 3002, just can make the picture rolling that is presented among the electro-optical device D.
Figure 21 represents to be suitable for the structure of information carried terminal (PDA:Personal Digital Assistants) of the electro-optical device D of relevant above-mentioned embodiment.Information carried terminal 4000 possesses: a plurality of operating keys 4001 and power switch 4002, and as the electro-optical device D of display device.If operating power switch 4002, then the so various information of storehouse, address or schedule can be presented on the electro-optical device D.
In addition, as the e-machine that is suitable for relevant electro-optical device of the present invention, except that Figure 19 to the machine shown in Figure 21, can also enumerate digital quiet phase camera, televisor, video camera, automobile navigation apparatus, pager, electronic notebook, Electronic Paper, counter, word processor, workstation, videophone, POS terminal, printer, scanner, duplicating machine, video machines, have the machine of touch-screen etc.

Claims (15)

1. a signal processing circuit is the signal processing circuit that generates the data-signal that the gray scale of electrooptic element is controlled, and it is characterized in that possessing:
1D/A throw-over gear, it generates grey scale signal according to the gradation data of specifying described electrooptic element gray scale;
Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal;
2D/A throw-over gear, its resolution is different with described 1D/A throw-over gear, generates correction signal according to the correction data of storing in the described storing mechanism; With
Combination mechanism, the synthetic and generation data-signal of correction signal that it generates the grey scale signal and the described 2D/A throw-over gear of described 1D/A throw-over gear generation.
2. according to the signal processing circuit described in the claim 1, it is characterized in that,
Described combination mechanism has adding mechanism, the correction signal addition that it generates the grey scale signal and the described 2D/A throw-over gear of described 1D/A throw-over gear generation.
3. according to the signal processing circuit described in the claim 2, it is characterized in that,
Described 1D/A throw-over gear and described 2D/A throw-over gear all generate current signal or equal formation voltage signal.
4. according to the signal processing circuit described in the claim 1, it is characterized in that,
Described 1D/A throw-over gear, it generates the grey scale signal of the pulsewidth corresponding with described gradation data,
Described 2D/A throw-over gear, it generates the correction signal of the pulsewidth corresponding with described correction data,
Described synthesizer mechanism, the described grey scale signal of output during the 1st, and link to each other during with the described the 1st the 2nd during the output calibration signal.
5. according to the signal processing circuit described in the claim 1, it is characterized in that,
Described combination mechanism has multiplication mechanism, and it multiplies each other the correction signal that the grey scale signal and the described 2D/A throw-over gear of described 1D/A throw-over gear generation generate.
6. according to the signal processing circuit described in the claim 5, it is characterized in that,
Described 1D/A throw-over gear, the current signal or the voltage signal of level that will be corresponding with described gradation data generate as grey scale signal;
Described 2D/A throw-over gear generates the correction signal of the pulsewidth corresponding with described correction data;
Described combination mechanism with the grey scale signal that described 1D/A throw-over gear generates, is exported as data-signal during corresponding with the pulsewidth of described correction signal.
7. data line drive circuit, be with many sweep traces and many data lines between each intersect corresponding and arrange the data line drive circuit of the electro-optical device of a plurality of electrooptic elements, it is characterized in that,
Possess a plurality of signal processing circuits, each of these a plurality of signal processing circuits is supplied with data-signal to data line,
Described each signal processing circuit has:
1D/A throw-over gear, it generates grey scale signal according to the gradation data of specifying described electrooptic element gray scale;
Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal;
2D/A throw-over gear, its resolution is different with described 1D/A throw-over gear, generates correction signal according to the correction data in described storing mechanism storage; With
Combination mechanism, it will be by the grey scale signal of described 1D/A throw-over gear generation and the synthetic and generation data-signal of correction signal that is generated by described 2D/A throw-over gear.
8. according to the data line drive circuit described in the claim 7, it is characterized in that,
2D/A throw-over gear in described each signal processing circuit is adjusted signal change resolution according to the resolution that is supplied to.
9. the data line drive circuit described in according to Claim 8 is characterized in that,
Described each electrooptic element, corresponding with in the multiple demonstration look any,
In described a plurality of signal processing circuit and a kind of 2D/A throw-over gear that shows in the look corresponding signal processing circuit are adjusted signal change resolution according to the 1st resolution,
Show 2D/A throw-over gear in the looks corresponding signal processing circuit with other in described a plurality of signal processing circuit, adjust signal change resolution according to adjusting the 2nd different resolution of signal with described the 1st resolution.
10. the data line drive circuit described in according to Claim 8 is characterized in that,
Described 2D/A throw-over gear has: current source, and its level of adjusting signal with resolution generates a plurality of electric currents as benchmark, and each of these a plurality of electric currents is weighted with different weights; With the selection circuit, it selects described a plurality of electric current according to described correction data,
The electric current of selecting based on described selection circuit generates correction signal.
11. the data line drive circuit according to Claim 8 is characterized in that,
Described 2D/A throw-over gear has: voltage generation circuit, its level of adjusting signal with resolution as benchmark, generate a plurality of voltages; With select circuit, it selects in described a plurality of voltage one according to described correction data,
The voltage of selecting based on described selection circuit generates correction signal.
12. the data line drive circuit according to Claim 8 is characterized in that,
It is clock signal that described resolution is adjusted signal,
Described 2D/A throw-over gear has: the pulse signal generative circuit, and its cycle of adjusting signal with described resolution generates a plurality of pulse signals as benchmark, and each of these a plurality of pulse signals has the pulsewidth after being weighted with different weights; With select circuit, it selects in described a plurality of pulse signal one according to described correction data,
The pulse signal of selecting based on described selection circuit generates correction signal.
13. an electro-optical device is characterized in that possessing:
A plurality of electrooptic elements, its with many sweep traces and many data lines between each intersect corresponding and arrange;
Scan line drive circuit, it selects each root of described many sweep traces successively respectively; With
Data line drive circuit, it contains a plurality of signal processing circuits, and each of these a plurality of signal processing circuits is supplied with data-signal to data line,
Described each signal processing circuit has:
1D/A throw-over gear, it generates grey scale signal according to the gradation data of specifying described electrooptic element gray scale;
Storing mechanism, its storage representation is to the correction data of the corrected value of grey scale signal;
2D/A throw-over gear, its resolution is different with described 1D/A throw-over gear, generates correction signal according to the correction data of storing in the described storing mechanism; With
Combination mechanism, it will be by the grey scale signal of described 1D/A throw-over gear generation and the synthetic and generation data-signal of correction signal that is generated by described 2D/A throw-over gear.
14. an e-machine is characterized in that,
Have the electro-optical device described in the claim 13.
15. the driving method of an electro-optical device is that the electro-optical device that is arranged with a plurality of electrooptic elements is driven, each of these a plurality of electrooptic elements has the driving method of the electro-optical device of the gray scale corresponding with data-signal, it is characterized in that,
According to the gradation data of the gray scale of specifying described electrooptic element, generate grey scale signal by the 1D/A conversion,
According to the correction data of storing in the storing mechanism, the 2D/A conversions different with described 1D/A conversion by resolution generate correction signal,
To change grey scale signal that generates and the synthetic and generation data-signal of correction signal that generates by described 2D/A conversion by described 1D/A.
CNB2005101069880A 2004-09-29 2005-09-29 Electro-optical device, method of driving the same, data line driving circuit and electronic apparatus Expired - Fee Related CN100383843C (en)

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