CN109818507B - Overcurrent protection compensation circuit and method and flyback circuit - Google Patents
Overcurrent protection compensation circuit and method and flyback circuit Download PDFInfo
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Abstract
The invention discloses an overcurrent protection compensation circuit and method and a flyback circuit, wherein the compensation circuit comprises a secondary side demagnetizing time sampling unit and a current compensation unit; the secondary side demagnetization time sampling unit is used for sampling secondary side demagnetization time T dem; the current compensation unit is connected with the secondary side demagnetization time sampling unit and is used for compensating the primary side peak current value according to the acquired secondary side demagnetization time T dem under the preset frequency; or the compensation circuit comprises a secondary side demagnetization duty cycle acquisition unit and a current compensation unit, wherein the secondary side demagnetization duty cycle acquisition unit is used for respectively acquiring secondary side demagnetization time T dem and a working switch period T S, and acquiring a secondary side demagnetization duty cycle D_dem according to the secondary side demagnetization time T dem and the working switch period T S; the current compensation unit is connected with the secondary side demagnetization duty cycle acquisition unit and used for compensating the primary side peak current value according to the acquired secondary side demagnetization duty cycle D_dem. The invention can make the compensated OLP curve smoother, and solve the problem of adjustment rate of the chip under different inductance applications.
Description
Technical Field
The invention belongs to the technical field of circuit electronics, and relates to an overcurrent protection compensation circuit, an overcurrent protection compensation method and a flyback circuit.
Background
The overcurrent protection function of the flyback circuit is usually realized by limiting the primary side peak current. Therefore, to solve the problem of consistency of the overcurrent protection point of the system under different input voltages, the primary side peak current under different input voltages needs to be compensated. However, since the actual system may operate in DCM (discontinuous mode) or CCM (continuous mode), and the different overcurrent protection characteristics of the system are significantly different between DCM and CCM, it becomes difficult to have a better compensation effect when the system is gradually changed from low-voltage input to high-voltage input, if the system design is gradually changed from CCM to DCM.
Depending on the system characteristics, in DCM:
The method can be deduced that:
it can be seen that for a given system, I L_max in DCM is independent of V in, d_dcm, determined by the output current I o_OLP, and the duty cycle is related to the input voltage V in.
While in CCM state:
The method can be deduced that:
Where Vin and K are both functions of duty cycle D, it is therefore possible to obtain:
It can be seen that for a given system, I L_max in CCM is determined by both the output current I o_OLP and the duty cycle D. While the duty cycle D varies with the input voltage. Wherein η is system efficiency, I o_OLP is system output overcurrent value, I L_max is primary side peak current corresponding to output overcurrent, L m is primary side inductance of the transformer, N ps is primary and secondary side turn ratio of the transformer, V o is system output voltage, f s is system working switching frequency, ts is working switching period, vcs_max is primary side overcurrent point threshold value, R sens is primary side sampling resistor, K is current ripple coefficient, d_dcm is primary side duty ratio under DCM, D is primary side duty ratio under CCM, vin is output voltage (converted direct current value).
Fig. 1 is a graph of duty cycle versus primary peak current, and it can be seen from fig. 1 that I L_max increases with duty cycle in CCM state, whereas I L_max is independent of duty cycle in DCM state.
The currently common compensation schemes comprise two types, wherein the first compensation scheme uses a duty ratio as compensation, and the second compensation scheme is an external adjustable compensation.
In the first compensation scheme (the scheme using the duty ratio as compensation), since the curves of il_max and the duty ratio show different curve rules in DCM and CCM, the scheme has a distinct differentiation trend in DCM and CCM sections, and the switching points of DCM and CCM depend on the practical application system, so it is difficult to realize better consistency compensation of the overcurrent point in DCM and CCM full voltage, and the system is usually designed in the full voltage CCM mode and compensated by the curve of CCM, so the system inductance design is greatly limited.
In the first compensation scheme (external adjustable compensation scheme), on the system, adjustable compensation is performed by sampling the bus voltage. FIG. 2 is a schematic circuit diagram of an external adjustable compensation circuit in a conventional compensation scheme; as shown in fig. 2, the bus bar is sampled by the resistor R1 and the resistor R2 to compensate the CS peak. This solution requires the addition of additional devices; and although the compensation is adjustable, because the compensation is linear and the actually required compensation is nonlinear, the perfect compensation of the overcurrent point curve is still difficult.
In view of this, there is an urgent need to design a new compensation method in order to overcome the above-mentioned drawbacks of the existing compensation methods.
Disclosure of Invention
The invention provides an overcurrent protection compensation circuit, an overcurrent protection compensation method and a flyback circuit, which can enable an OLP curve after compensation to be smoother and solve the problem of adjustment rate of a chip under different inductance applications.
In order to solve the technical problems, according to one aspect of the present invention, the following technical scheme is adopted:
An overcurrent protection compensation circuit, the compensation circuit comprising: the secondary side demagnetizing time sampling unit and the current compensation unit; the secondary side demagnetization time sampling unit is used for sampling secondary side demagnetization time T dem; the current compensation unit is connected with the secondary side demagnetizing time sampling unit and is used for compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem under the preset frequency; or alternatively
The compensation circuit comprises a secondary side demagnetization duty ratio acquisition unit and a current compensation unit, wherein the secondary side demagnetization duty ratio acquisition unit is used for respectively acquiring secondary side demagnetization time T dem and a working switch period T S, and acquiring a secondary side demagnetization duty ratio D_dem according to the secondary side demagnetization time T dem and the working switch period T S; the current compensation unit is connected with the secondary side demagnetization duty cycle acquisition unit and used for compensating the primary side peak current value according to the acquired secondary side demagnetization duty cycle D_dem.
As an embodiment of the present invention, the current compensation unit compensates the primary side peak current value as follows:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, L m is the primary side inductance of the transformer, and f S is the system working switching frequency.
As one embodiment of the present invention, the secondary side demagnetization duty cycle obtaining unit obtains the secondary side demagnetization duty cycle d_dem in the following manner: d_dem=t dem/TS.
As one embodiment of the present invention, the compensation circuit includes a secondary side demagnetization duty cycle acquisition unit and a current compensation unit, the compensation circuit further including:
The secondary side demagnetization time sampling unit is used for obtaining secondary side demagnetization time T dem;
the working switch period acquisition unit is used for acquiring a working switch period T S;
The secondary side demagnetization time sampling unit and the working switch period acquisition unit are respectively connected with the secondary side demagnetization duty cycle acquisition unit, and the acquired data are sent to the secondary side demagnetization duty cycle acquisition unit.
As an embodiment of the present invention, the secondary side demagnetization duty cycle obtaining unit detects the secondary side demagnetization time T dem through the DEM pin.
As one embodiment of the present invention, the overcurrent protection compensation circuit includes: the device comprises a first demagnetization detection module, a frequency oscillator, a driving logic circuit, a switching period detection circuit, a secondary demagnetization time detection circuit, a secondary demagnetization duty cycle acquisition module and a peak current compensation module;
The output of the frequency oscillator is respectively connected with the input of the driving logic circuit and the input of the switching period detection circuit, and the output of the switching period detection circuit is connected with the secondary demagnetization duty cycle acquisition module;
the input of the driving logic circuit is also connected with the output of the first power amplifier; the output of the driving logic circuit is respectively connected with the secondary side demagnetization time detection circuit, the Gate pin of the chip and the first demagnetization detection module;
The input of the secondary side demagnetization time detection circuit is respectively connected with the driving logic circuit and the first demagnetization detection module, and the output of the secondary side demagnetization time detection circuit is connected with the secondary side demagnetization duty cycle acquisition module;
The input of the secondary side demagnetization duty cycle acquisition module is respectively connected with the switch period detection circuit and the secondary side demagnetization time detection circuit, and the output of the secondary side demagnetization duty cycle acquisition module is connected with the peak current compensation module;
the first demagnetization detection module is used for detecting signals coupled to a gate drive pin gate of the chip through the drain electrode drain demagnetization of the switching tube to obtain T dem;
The frequency oscillator is used for determining an internal switching frequency;
the driving logic circuit is used for generating a PWM on-off signal;
The switching period detection circuit is connected with the frequency oscillator and is used for obtaining a switching period T S through the internal frequency oscillator;
the secondary side demagnetization time detection circuit is used for detecting a demagnetization starting point, and the starting point is obtained by a turn-off signal of the driving logic circuit;
the secondary side demagnetization duty cycle acquisition module is used for acquiring a secondary side demagnetization duty cycle d_dem, wherein d_dem=t dem/TS;
the peak current compensation module compensates the peak current threshold Vth through the secondary side demagnetization duty ratio D_dem value, so that a certain relation between the overcurrent and the D_dem is maintained, and the consistency of overload of the output current under different input voltages is compensated.
As one embodiment of the present invention, the overcurrent protection compensation circuit includes: the device comprises a second demagnetization detection module, a frequency oscillator, a driving logic circuit, a switching period detection circuit, a secondary demagnetization time detection circuit, a secondary demagnetization duty cycle acquisition module and a peak current compensation module;
The output of the frequency oscillator is respectively connected with the input of the driving logic circuit and the input of the switching period detection circuit, and the output of the switching period detection circuit is connected with the secondary demagnetization duty cycle acquisition module;
the input of the driving logic circuit is also connected with the output of the first power amplifier; the output of the driving logic circuit is respectively connected with the secondary side demagnetization time detection circuit and the Gate pin of the chip;
the input of the secondary side demagnetization time detection circuit is respectively connected with the driving logic circuit and the second demagnetization detection module, and the output of the secondary side demagnetization time detection circuit is connected with the secondary side demagnetization duty cycle acquisition module;
The input of the secondary side demagnetization duty cycle acquisition module is respectively connected with the switch period detection circuit and the secondary side demagnetization time detection circuit, and the output of the secondary side demagnetization duty cycle acquisition module is connected with the peak current compensation module;
The second demagnetization detection module is used for detecting through a DEM pin sampled by the auxiliary winding to obtain secondary side demagnetization time T dem;
The frequency oscillator is used for determining an internal switching frequency;
the driving logic circuit is used for generating a PWM on-off signal;
The switching period detection circuit is connected with the frequency oscillator and is used for obtaining a switching period T S through the internal frequency oscillator;
the secondary side demagnetization time detection circuit is used for detecting a demagnetization starting point, and the starting point is obtained by a turn-off signal of the driving logic circuit;
the secondary side demagnetization duty cycle acquisition module is used for acquiring a secondary side demagnetization duty cycle d_dem, wherein d_dem=t dem/TS;
the peak current compensation module compensates the peak current threshold Vth through the secondary side demagnetization duty ratio D_dem value, so that a certain relation between the overcurrent and the D_dem is maintained, and the consistency of overload of the output current under different input voltages is compensated.
According to another aspect of the invention, the following technical scheme is adopted: a flyback circuit comprises the overcurrent protection compensation circuit.
According to a further aspect of the invention, the following technical scheme is adopted: an overcurrent protection compensation method, the compensation method comprising: obtaining secondary side demagnetization time T dem under a preset frequency; compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem; or alternatively
The compensation method comprises the following steps: obtaining a secondary side demagnetization time T dem and a working switch period TS, and obtaining a secondary side demagnetization duty ratio D_dem according to the secondary side demagnetization time T dem and the working switch period TS; and compensating the primary side peak current value according to the acquired secondary side demagnetization duty ratio D_dem.
As an embodiment of the present invention, the primary side peak current value is compensated according to the secondary side demagnetization duty ratio d_dem as follows:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, and f S is the system working switching frequency.
As an embodiment of the present invention, the secondary side demagnetization duty ratio d_dem is obtained by: d_dem=t dem/TS.
As an embodiment of the present invention, the secondary demagnetization time T dem is obtained by detecting the signal coupled to the gate driving pin gate of the chip through the end of the drain demagnetization of the switching transistor.
As an embodiment of the present invention, the secondary demagnetization time T dem is obtained by DEM foot detection of auxiliary winding sampling.
The invention has the beneficial effects that: the overcurrent protection compensation circuit, the overcurrent protection compensation method and the flyback circuit provided by the invention do not need additional devices to set and adjust the compensation amplitude of the overcurrent point, are simple to apply and save the cost. The compensation mode of the invention can obtain a better OLP compensation curve in the DCM and CCM modes in a self-adaptive way; the OLP curve after compensation can be smoother, and the problem of adjustment rate of the chip under different inductance applications is solved. In various inductive applications, the system can have a good OLP compensation curve no matter what input voltage position the system is in the critical mode.
Drawings
Fig. 1 is a schematic diagram of duty cycle versus primary side peak current curve.
Fig. 2 is a circuit schematic diagram of an external adjustable compensation circuit in a conventional compensation scheme.
FIG. 3 is a diagram illustrating a change in the demagnetization time of the secondary side of the system in the CCM state and the DCM state according to an embodiment of the present invention.
Fig. 4 is a schematic diagram illustrating an embodiment of an overcurrent protection compensation circuit.
Fig. 5 is a circuit diagram of an overcurrent protection compensation circuit according to an embodiment of the invention.
Fig. 6 is a schematic diagram of an OLP curve after the compensation of the over-current protection compensation circuit according to an embodiment of the invention.
Fig. 7 is a schematic circuit diagram of a secondary side demagnetization duty cycle obtaining module of an overcurrent protection compensation circuit according to an embodiment of the invention.
Fig. 8 is a circuit diagram of a first demagnetization detecting module of an overcurrent protection compensation circuit according to an embodiment of the invention.
Fig. 9 is a circuit diagram of a second demagnetization detecting module of the overcurrent protection compensation circuit according to an embodiment of the invention.
Detailed Description
Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
For a further understanding of the present invention, preferred embodiments of the invention are described below in conjunction with the examples, but it should be understood that these descriptions are merely intended to illustrate further features and advantages of the invention, and are not limiting of the claims of the invention.
The description of this section is intended to be illustrative of only a few exemplary embodiments and the invention is not to be limited in scope by the description of the embodiments. It is also within the scope of the description and claims of the invention to interchange some of the technical features of the embodiments with other technical features of the same or similar prior art.
The invention discloses an overcurrent protection compensation circuit, in one embodiment of the invention, the compensation circuit comprises: the secondary side demagnetizing time sampling unit and the current compensation unit; the secondary side demagnetization time sampling unit is used for sampling secondary side demagnetization time T dem; the current compensation unit is connected with the secondary side demagnetizing time sampling unit and is used for compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem under the preset frequency.
In another embodiment of the present invention, the compensation circuit includes a secondary side demagnetization duty cycle obtaining unit and a current compensation unit, where the secondary side demagnetization duty cycle obtaining unit is configured to obtain a secondary side demagnetization time T dem and an operation switching period T S, respectively, and obtain a secondary side demagnetization duty cycle d_dem according to the secondary side demagnetization duty cycle; the current compensation unit is connected with the secondary side demagnetization duty cycle acquisition unit and used for compensating the primary side peak current value according to the acquired secondary side demagnetization duty cycle D_dem.
In an embodiment of the present invention, the current compensation unit compensates the primary side peak current value as follows:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, L m is the primary side inductance of the transformer, and f S is the system working switching frequency.
In an embodiment of the present invention, the secondary side demagnetization duty cycle obtaining unit obtains the secondary side demagnetization duty cycle d_dem in the following manner: d_dem=t dem/TS.
In an embodiment of the present invention, the compensation circuit includes a secondary side demagnetization duty cycle acquisition unit and a current compensation unit, and the compensation circuit further includes: the secondary side demagnetizing time sampling unit and the working switch period obtaining unit. The secondary side demagnetization time sampling unit is used for obtaining secondary side demagnetization time T dem; the working switch period acquisition unit is used for acquiring the working switch period T S. The secondary side demagnetization time sampling unit and the working switch period acquisition unit are respectively connected with the secondary side demagnetization duty cycle acquisition unit, and the acquired data are sent to the secondary side demagnetization duty cycle acquisition unit.
In one embodiment of the present invention, the secondary side demagnetization duty cycle obtaining unit detects the secondary side demagnetization time T dem through the DEM pin.
In one embodiment of the invention, the primary side peak current is compensated by sampling the duty cycle of the secondary side demagnetization. FIG. 3 is a schematic diagram showing the change of the demagnetization time of the secondary side of the system in the CCM state and the DCM state according to an embodiment of the present invention; referring to fig. 3, in an embodiment of the present invention, according to the system characteristics, in the DCM state:
It can be seen that for a given system, il_max in DCM is independent of Vin, d_dem, determined by the output current io_olp, while the duty cycle is also independent of the input voltage Vin, and is dependent only on il_max. Therefore, the secondary demagnetization duty ratio d_dem is used as a compensation object in the DCM mode.
Whereas in CCM state, vin and K are both functions of duty cycle D, so it is possible to:
In the critical mode, equation (8) is equal to equation (10), equation (9) = (11), and the transition is smooth. Therefore, the peak current is compensated according to the formula (10), so that the overcurrent consistency is better in CCM, and the primary side peak current is not changed along with the change of the input voltage because D_dem becomes constant in DCM, and the characteristic that I L_max is irrelevant to Vin in DCM is just satisfied.
Wherein eta is system efficiency, I o_OLP is system output overcurrent value, I L_max is corresponding primary side peak current when output overcurrent, lp is transformer primary side inductance, N ps is transformer primary and secondary side turn ratio, vo is system output voltage, fs is system working switching frequency, ts is working switching period, vcs_max is primary side overcurrent point threshold, rsens is primary side sampling resistor, K is current ripple coefficient, D_DCM is primary side duty ratio under DCM, D is primary side duty ratio under CCM, vin is output voltage (converted direct current value), and D_dem is secondary side demagnetization duty ratio.
FIG. 4 is a schematic circuit diagram of an over-current protection compensation circuit according to an embodiment of the invention; referring to fig. 4, in an embodiment of the present invention, the secondary side demagnetization time T dem and the internal switching period T S are detected by the DEM pin of the chip, the demagnetization duty ratio d_dem is obtained, and the primary side peak current value is compensated by d_dem.
In one embodiment of the present invention, the overcurrent protection compensation circuit includes: the first demagnetization detection module 47, the frequency oscillator 41, the driving logic circuit 42, the switching cycle detection circuit 43, the secondary demagnetization time detection circuit 44, the secondary demagnetization duty cycle acquisition module 45, and the peak current compensation module 46. In an embodiment of the present invention, the overcurrent protection compensation circuit further includes a first power amplifier 49.
The output of the frequency oscillator 41 is connected to the input of the driving logic circuit 42 and the input of the switching period detection circuit 43, respectively, and the output of the switching period detection circuit 43 is connected to the secondary demagnetization duty cycle acquisition module 45.
The input of the drive logic circuit 42 is also connected to the output of a first power amplifier 49; the output of the driving logic circuit 42 is respectively connected with the secondary side demagnetization time detection circuit 44, the Gate pin of the chip and the first demagnetization detection module 47.
The input of the secondary demagnetization time detection circuit 44 is respectively connected with the driving logic circuit 42 and the first demagnetization detection module 47, and the output of the secondary demagnetization time detection circuit 44 is connected with the secondary demagnetization duty cycle acquisition module 45.
The input of the secondary demagnetization duty cycle acquisition module 45 is respectively connected with the switching period detection circuit 43 and the secondary demagnetization time detection circuit 44, and the output of the secondary demagnetization duty cycle acquisition module 45 is connected with the peak current compensation module 46.
FIG. 7 is a schematic circuit diagram of a secondary side demagnetization duty cycle obtaining module of an overcurrent protection compensation circuit according to an embodiment of the invention; referring to fig. 7, in an embodiment of the present invention, the secondary demagnetization duty cycle obtaining module 45 includes a current source Io, a subtractor 451, a first comparator 453, and a first capacitor C; the output end of the current source Io is connected with the first end of the first capacitor C and the first input end of the subtracter 451 through a switch, and the second end of the first capacitor C is grounded; a second input terminal of the subtractor 451 is connected to the first set voltage Vthmax, an output terminal of the subtractor 451 is connected to an inverting input terminal of the first comparator 453, a non-inverting input terminal of the first comparator 453 is connected to the voltage Vcs, and an output terminal of the first comparator 453 outputs a corresponding output voltage.
FIG. 8 is a schematic circuit diagram of a first demagnetization detection module of an over-current protection compensation circuit according to an embodiment of the present invention; referring to fig. 8, in an embodiment of the invention, the first demagnetization detecting module 47 includes a current detecting element 471 and a second comparator 473; the current detecting element 471 converts the current into a voltage, and outputs the voltage to the non-inverting input terminal of the second comparator 472, and the inverting input terminal of the second comparator 472 is connected to a second set voltage (for example, may be 0.1V).
The first demagnetization detecting module 447 is configured to detect T dem by detecting a signal coupled to the gate driving pin gate of the chip through the drain demagnetization end of the switching transistor.
The frequency oscillator 41 is used to determine the internal switching frequency; the driving logic circuit 42 is configured to generate a PWM on/off signal; the switching period detection circuit 43 is connected to the frequency oscillator 41, and is configured to obtain a switching period T S through the internal frequency oscillator 41; the secondary demagnetization time detection circuit 44 is configured to detect a demagnetization starting point, where the starting point is obtained by the off signal of the driving logic circuit 42.
The secondary side demagnetization duty cycle obtaining module 45 is configured to obtain a secondary side demagnetization duty cycle d_dem, d_dem=t dem/TS.
The peak current compensation module 46 compensates the peak current threshold Vth by the secondary demagnetization duty cycle d_dem value, thereby maintaining a relationship between the overcurrent and d_dem to compensate for the uniformity of the overload of the output current at different input voltages.
In another embodiment of the present invention, the overcurrent protection compensation circuit includes: the second demagnetization detection module 48, the frequency oscillator 41, the driving logic circuit 42, the switching cycle detection circuit 43, the secondary demagnetization time detection circuit 44, the secondary demagnetization duty cycle acquisition module 45 and the peak current compensation module 46. In an embodiment of the present invention, the overcurrent protection compensation circuit further includes a first power amplifier 49.
The output of the frequency oscillator 41 is respectively connected with the input of the driving logic circuit and the input of the switching period detection circuit, and the output of the switching period detection circuit is connected with the secondary demagnetization duty cycle acquisition module.
The input of the drive logic circuit 42 is also connected to the output of a first power amplifier 49; the output of the driving logic circuit 42 is respectively connected with the secondary side demagnetization time detection circuit 44 and the Gate pin of the chip.
The input of the secondary demagnetization time detection circuit 44 is connected with the driving logic circuit 42 and the second demagnetization detection module 48 respectively, and the output of the secondary demagnetization time detection circuit 44 is connected with the secondary demagnetization duty cycle acquisition module 45.
The input of the secondary demagnetization duty cycle acquisition module 45 is respectively connected with the switching period detection circuit 43 and the secondary demagnetization time detection circuit 44, and the output of the secondary demagnetization duty cycle acquisition module 45 is connected with the peak current compensation module 46.
The second demagnetization detecting module 48 is configured to obtain a secondary side demagnetization time T dem through DEM leg detection sampled by the auxiliary winding; the frequency oscillator 41 is used to determine the internal switching frequency; the driving logic circuit 42 is configured to generate a PWM on/off signal; the switching period detection circuit 43 is connected to the frequency oscillator 41, and is configured to obtain a switching period T S through the internal frequency oscillator 41.
FIG. 9 is a schematic circuit diagram of a second demagnetization detection module of the over-current protection compensation circuit according to an embodiment of the present invention; referring to fig. 9, in an embodiment of the invention, the second demagnetization detecting module 48 includes a third comparator 481, a first inductance L, a first resistor R1, and a second resistor R2; the first end of the first inductor L is connected with the first end of the first resistor R1, and the second end of the first inductor L is grounded; the second end of the first resistor R1 is connected to the first end of the second resistor R2 and the inverting input end of the third comparator 481, respectively; the non-inverting input of the third comparator 481 is coupled to a third set voltage (e.g., 80 mV).
The secondary demagnetization time detection circuit 44 is configured to detect a demagnetization starting point, where the starting point is obtained by the off signal of the driving logic circuit 42. The secondary side demagnetization duty cycle obtaining module 45 is configured to obtain a secondary side demagnetization duty cycle d_dem, d_dem=t dem/TS.
The peak current compensation module 46 compensates the peak current threshold Vth by the secondary demagnetization duty cycle d_dem value, thereby maintaining a relationship between the overcurrent and d_dem to compensate for the uniformity of the overload of the output current at different input voltages.
FIG. 5 is a schematic circuit diagram of an over-current protection compensation circuit according to an embodiment of the invention; referring to fig. 5, in an embodiment of the invention, the composition of the overcurrent protection compensation circuit can be shown in fig. 5.
FIG. 6 is a schematic diagram of an OLP curve compensated by the over-current protection compensation circuit according to an embodiment of the present invention; referring to fig. 6, in an embodiment of the present invention, the low voltage input system operates in CCM section to set a compensation curve (corresponding to the curve in fig. 6) for the system, and after the input voltage increases into DCM, the compensation becomes constant (the straight line in fig. 6) due to the constant d_dem, so the final compensation curve is shown as the solid line in fig. 6. Obviously, no matter the critical mode point of the system is at that position, the compensating mode can effectively lead the OLP curve after compensation to be smoother, and effectively solve the problem of the adjustment rate of the chip under different inductance applications.
The invention discloses a flyback circuit, which comprises the overcurrent protection compensation circuit. In an embodiment of the present invention, the composition of the flyback circuit may be described with reference to fig. 4 and 5.
The invention discloses an overcurrent protection compensation method, which comprises the following steps of: obtaining secondary side demagnetization time T dem under a preset frequency; and compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem.
In another embodiment of the present invention, the compensation method includes: obtaining a secondary side demagnetization time T dem and a working switch period T S, and obtaining a secondary side demagnetization duty ratio D_dem according to the secondary side demagnetization time T dem and the working switch period T S; and compensating the primary side peak current value according to the acquired secondary side demagnetization duty ratio D_dem.
In one embodiment of the present invention, the primary side peak current value is compensated according to the secondary side demagnetization duty cycle d_dem as follows:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, and f S is the system working switching frequency.
In an embodiment of the present invention, the secondary side demagnetization duty cycle d_dem is obtained by: d_dem=t dem/TS.
In one embodiment of the present invention, the secondary demagnetization time T dem is obtained by detecting the signal coupled to the gate driving pin gate of the chip through the drain demagnetization end of the switching transistor. In another embodiment of the invention, the secondary demagnetization time T dem is obtained by detecting the DEM leg sampled by the auxiliary winding.
In summary, the overcurrent protection compensation circuit, the overcurrent protection compensation method and the flyback circuit provided by the invention do not need additional devices to set and adjust the overcurrent point compensation amplitude, are simple to apply and save the cost. The compensation mode of the invention can obtain a better OLP compensation curve in the DCM and CCM modes in a self-adaptive way; the OLP curve after compensation can be smoother, and the problem of adjustment rate of the chip under different inductance applications is solved. In various inductive applications, the system can have a good OLP compensation curve no matter what input voltage position the system is in the critical mode.
The description and applications of the present invention herein are illustrative and are not intended to limit the scope of the invention to the embodiments described above. Variations and modifications of the embodiments disclosed herein are possible, and alternatives and equivalents of the various components of the embodiments are known to those of ordinary skill in the art. It will be clear to those skilled in the art that the present invention may be embodied in other forms, structures, arrangements, proportions, and with other assemblies, materials, and components, without departing from the spirit or essential characteristics thereof. Other variations and modifications of the embodiments disclosed herein may be made without departing from the scope and spirit of the invention.
Claims (13)
1. An overcurrent protection compensation circuit, the compensation circuit comprising: the secondary side demagnetizing time sampling unit and the current compensation unit; the secondary side demagnetization time sampling unit is used for sampling secondary side demagnetization time T dem; the current compensation unit is connected with the secondary side demagnetizing time sampling unit and is used for compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem under the preset frequency; or alternatively
The compensation circuit comprises a secondary side demagnetization duty ratio acquisition unit and a current compensation unit, wherein the secondary side demagnetization duty ratio acquisition unit is used for respectively acquiring secondary side demagnetization time T dem and a working switch period T S, and acquiring a secondary side demagnetization duty ratio D_dem according to the secondary side demagnetization time T dem and the working switch period T S; the current compensation unit is connected with the secondary side demagnetization duty cycle acquisition unit and used for compensating the primary side peak current value according to the acquired secondary side demagnetization duty cycle D_dem;
The overcurrent protection compensation circuit includes:
The demagnetization detection module is used for detecting and obtaining T dem through signals which are coupled to a gate drive pin gate of the chip through the end of the demagnetization of the drain electrode drain of the switching tube; or detecting the secondary side demagnetizing time T dem through a DEM pin sampled by the auxiliary winding;
a switching period detection circuit for obtaining a switching period T S by an internal frequency oscillator;
The secondary side demagnetization duty cycle acquisition module is used for acquiring a secondary side demagnetization duty cycle D_dem, wherein D_dem=T dem/TS;
The peak current compensation module is used for compensating the peak current threshold Vth through the secondary side demagnetization duty ratio D_dem value, so that a certain relation between the overcurrent and the D_dem is maintained, and the consistency of overload of the output current at different input voltages is compensated.
2. The overcurrent protection compensation circuit of claim 1, wherein:
the current compensation unit compensates the primary side peak current value in the following manner:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, L m is the primary side inductance of the transformer, and f S is the system working switching frequency.
3. The overcurrent protection compensation circuit of claim 1, wherein:
The secondary side demagnetization duty cycle obtaining unit obtains the secondary side demagnetization duty cycle D_dem in the following manner: d_dem=t dem/TS.
4. The overcurrent protection compensation circuit of claim 1, wherein:
The compensation circuit comprises a secondary side demagnetization duty cycle acquisition unit and a current compensation unit, and the compensation circuit further comprises:
The secondary side demagnetization time sampling unit is used for obtaining secondary side demagnetization time T dem;
the working switch period acquisition unit is used for acquiring a working switch period T S;
The secondary side demagnetization time sampling unit and the working switch period acquisition unit are respectively connected with the secondary side demagnetization duty cycle acquisition unit, and the acquired data are sent to the secondary side demagnetization duty cycle acquisition unit.
5. The overcurrent protection compensation circuit of claim 1, wherein:
the secondary side demagnetization duty ratio acquisition unit detects secondary side demagnetization time T dem through the DEM pin.
6. The overcurrent protection compensation circuit of claim 1, wherein:
The overcurrent protection compensation circuit further includes: a frequency oscillator, a driving logic circuit and a secondary side demagnetization time detection circuit; the demagnetization detection module is a first demagnetization detection module;
The output of the frequency oscillator is respectively connected with the input of the driving logic circuit and the input of the switching period detection circuit, and the output of the switching period detection circuit is connected with the secondary demagnetization duty cycle acquisition module;
the input of the driving logic circuit is also connected with the output of the first power amplifier; the output of the driving logic circuit is respectively connected with the secondary side demagnetization time detection circuit, the Gate pin of the chip and the first demagnetization detection module;
The input of the secondary side demagnetization time detection circuit is respectively connected with the driving logic circuit and the first demagnetization detection module, and the output of the secondary side demagnetization time detection circuit is connected with the secondary side demagnetization duty cycle acquisition module;
The input of the secondary side demagnetization duty cycle acquisition module is respectively connected with the switch period detection circuit and the secondary side demagnetization time detection circuit, and the output of the secondary side demagnetization duty cycle acquisition module is connected with the peak current compensation module;
the first demagnetization detection module is used for detecting signals coupled to a gate drive pin gate of the chip through the drain electrode drain demagnetization of the switching tube to obtain T dem;
The frequency oscillator is used for determining an internal switching frequency;
the driving logic circuit is used for generating a PWM on-off signal;
the secondary side demagnetization time detection circuit is used for detecting a demagnetization starting point, and the starting point is obtained by a turn-off signal of the driving logic circuit.
7. The overcurrent protection compensation circuit of claim 1, wherein:
the overcurrent protection compensation circuit further includes: a frequency oscillator, a driving logic circuit and a secondary side demagnetization time detection circuit; the demagnetization detection module is a second demagnetization detection module;
The output of the frequency oscillator is respectively connected with the input of the driving logic circuit and the input of the switching period detection circuit, and the output of the switching period detection circuit is connected with the secondary demagnetization duty cycle acquisition module;
the input of the driving logic circuit is also connected with the output of the first power amplifier; the output of the driving logic circuit is respectively connected with the secondary side demagnetization time detection circuit and the Gate pin of the chip;
the input of the secondary side demagnetization time detection circuit is respectively connected with the driving logic circuit and the second demagnetization detection module, and the output of the secondary side demagnetization time detection circuit is connected with the secondary side demagnetization duty cycle acquisition module;
The input of the secondary side demagnetization duty cycle acquisition module is respectively connected with the switch period detection circuit and the secondary side demagnetization time detection circuit, and the output of the secondary side demagnetization duty cycle acquisition module is connected with the peak current compensation module;
The second demagnetization detection module is used for detecting through a DEM pin sampled by the auxiliary winding to obtain secondary side demagnetization time T dem;
The frequency oscillator is used for determining an internal switching frequency;
the driving logic circuit is used for generating a PWM on-off signal;
the secondary side demagnetization time detection circuit is used for detecting a demagnetization starting point, and the starting point is obtained by a turn-off signal of the driving logic circuit.
8. A flyback circuit, characterized by: comprising an overcurrent protection compensation circuit according to any one of claims 1 to 7.
9. An overcurrent protection compensation method, characterized in that the compensation method comprises: obtaining secondary side demagnetization time T dem under a preset frequency; compensating the primary side peak current value according to the acquired secondary side demagnetizing time T dem; or alternatively
The compensation method comprises the following steps: obtaining a secondary side demagnetization time T dem and a working switch period T S, and obtaining a secondary side demagnetization duty ratio D_dem according to the secondary side demagnetization time T dem and the working switch period T S; compensating the primary side peak current value according to the acquired secondary side demagnetization duty ratio D_dem;
the compensation method specifically comprises the following steps:
Signal detection coupled to a gate drive pin gate of the chip is finished through drain demagnetization of the switching tube to obtain T dem; or detecting the secondary side demagnetizing time T dem through a DEM pin sampled by the auxiliary winding;
obtaining a switching period T S through an internal frequency oscillator;
Obtaining a secondary side demagnetization duty cycle d_dem, wherein d_dem=t dem/TS;
The peak current threshold Vth is compensated by the secondary demagnetization duty cycle d_dem value, so that a certain relationship between the overcurrent and d_dem is maintained to compensate the consistency of overload of the output current at different input voltages.
10. The overcurrent protection compensation method of claim 9, wherein:
the primary side peak current value is compensated according to the secondary side demagnetization duty cycle d_dem in the following manner:
Wherein, I L_max is the corresponding primary side peak current when the output overcurrent, I o_OLP is the system output overcurrent value, eta is the system efficiency, N ps is the primary and secondary side turn ratio of the transformer, D_dem is the secondary side demagnetization duty ratio, vo is the system output voltage, and f S is the system working switching frequency.
11. The overcurrent protection compensation method of claim 9, wherein:
the manner of obtaining the secondary side demagnetization duty cycle d_dem is as follows: d_dem=t dem/TS.
12. The overcurrent protection compensation method of claim 9, wherein:
And detecting a signal coupled to a gate driving pin gate of the chip through the drain electrode drain demagnetization of the switching tube to obtain secondary demagnetization time T dem.
13. The overcurrent protection compensation method of claim 9, wherein:
and detecting the DEM pin sampled by the auxiliary winding to obtain the secondary side demagnetizing time T dem.
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| WO2010015999A1 (en) * | 2008-08-06 | 2010-02-11 | Nxp B.V. | Converter with controlled output current |
| DE102011107721B4 (en) * | 2011-07-14 | 2014-02-13 | Ean Elektroschaltanlagen Gmbh | Method and device for measuring electrical currents using a current transformer |
| CN103066872B (en) * | 2013-01-17 | 2015-06-17 | 矽力杰半导体技术(杭州)有限公司 | Integration switch power supply controller and switch power supply using the same |
| CN103312200B (en) * | 2013-06-28 | 2016-08-10 | 成都芯源系统有限公司 | Power converter, current limiting unit, control circuit and related control method |
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| CN104993704B (en) * | 2015-07-17 | 2017-07-28 | 东南大学 | A kind of digital constant-current controller based on inverse-excitation type primary side feedback |
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| CN107508476B (en) * | 2017-03-17 | 2024-05-31 | 苏州智浦芯联电子科技股份有限公司 | Duty ratio calculating circuit for switching power supply line loss compensation |
| CN206698141U (en) * | 2017-03-17 | 2017-12-01 | 苏州智浦芯联电子科技股份有限公司 | A kind of dutycycle counting circuit for Switching Power Supply line loss compensation |
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